Follow up to d0858bffa11, add missing REQUIRES x86
[llvm-project.git] / llvm / test / MC / Hexagon / PacketRules / registers_readonly.s
blobe3759614da7af051492b2f281005e232ed55fc80
1 # RUN: not llvm-mc -triple=hexagon -filetype=obj %s 2>&1 | FileCheck %s
3 # CHECK: 4:3: error: Cannot write to read-only register `PC'
4 { pc = r0
5 r0 = r0 }