1 ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
2 ; RUN: opt -passes=slp-vectorizer -mtriple=arm64-apple-ios -S %s | FileCheck %s
3 ; RUN: opt -aa-pipeline='basic-aa,scoped-noalias-aa' -passes=slp-vectorizer -mtriple=arm64-apple-darwin -S %s | FileCheck %s
5 define void @loop1(ptr %A, ptr %B, i64 %N) {
8 ; CHECK-NEXT: br label [[LOOP:%.*]]
10 ; CHECK-NEXT: [[IV:%.*]] = phi i64 [ 0, [[ENTRY:%.*]] ], [ [[IV_NEXT:%.*]], [[LOOP]] ]
11 ; CHECK-NEXT: [[B_GEP_0:%.*]] = getelementptr inbounds i32, ptr [[B:%.*]], i64 [[IV]]
12 ; CHECK-NEXT: [[B_0:%.*]] = load i32, ptr [[B_GEP_0]], align 4
13 ; CHECK-NEXT: [[A_GEP_0:%.*]] = getelementptr inbounds i32, ptr [[A:%.*]], i64 [[IV]]
14 ; CHECK-NEXT: [[A_0:%.*]] = load i32, ptr [[A_GEP_0]], align 4
15 ; CHECK-NEXT: [[ADD_0:%.*]] = add i32 [[A_0]], 20
16 ; CHECK-NEXT: [[XOR_0:%.*]] = xor i32 [[ADD_0]], [[B_0]]
17 ; CHECK-NEXT: store i32 [[XOR_0]], ptr [[A_GEP_0]], align 4
18 ; CHECK-NEXT: [[IV_1:%.*]] = or i64 [[IV]], 1
19 ; CHECK-NEXT: [[B_GEP_1:%.*]] = getelementptr inbounds i32, ptr [[B]], i64 [[IV_1]]
20 ; CHECK-NEXT: [[B_1:%.*]] = load i32, ptr [[B_GEP_1]], align 4
21 ; CHECK-NEXT: [[A_GEP_1:%.*]] = getelementptr inbounds i32, ptr [[A]], i64 [[IV_1]]
22 ; CHECK-NEXT: [[A_1:%.*]] = load i32, ptr [[A_GEP_1]], align 4
23 ; CHECK-NEXT: [[ADD_1:%.*]] = add i32 [[A_1]], 20
24 ; CHECK-NEXT: [[XOR_1:%.*]] = xor i32 [[ADD_1]], [[B_1]]
25 ; CHECK-NEXT: store i32 [[XOR_1]], ptr [[A_GEP_1]], align 4
26 ; CHECK-NEXT: [[IV_2:%.*]] = or i64 [[IV]], 2
27 ; CHECK-NEXT: [[B_GEP_2:%.*]] = getelementptr inbounds i32, ptr [[B]], i64 [[IV_2]]
28 ; CHECK-NEXT: [[B_2:%.*]] = load i32, ptr [[B_GEP_2]], align 4
29 ; CHECK-NEXT: [[A_GEP_2:%.*]] = getelementptr inbounds i32, ptr [[A]], i64 [[IV_2]]
30 ; CHECK-NEXT: [[A_2:%.*]] = load i32, ptr [[A_GEP_2]], align 4
31 ; CHECK-NEXT: [[ADD_2:%.*]] = add i32 [[A_2]], 20
32 ; CHECK-NEXT: [[XOR_2:%.*]] = xor i32 [[ADD_2]], [[B_2]]
33 ; CHECK-NEXT: store i32 [[XOR_2]], ptr [[A_GEP_2]], align 4
34 ; CHECK-NEXT: [[IV_3:%.*]] = or i64 [[IV]], 3
35 ; CHECK-NEXT: [[B_GEP_3:%.*]] = getelementptr inbounds i32, ptr [[B]], i64 [[IV_3]]
36 ; CHECK-NEXT: [[B_3:%.*]] = load i32, ptr [[B_GEP_3]], align 4
37 ; CHECK-NEXT: [[A_GEP_3:%.*]] = getelementptr inbounds i32, ptr [[A]], i64 [[IV_3]]
38 ; CHECK-NEXT: [[A_3:%.*]] = load i32, ptr [[A_GEP_3]], align 4
39 ; CHECK-NEXT: [[ADD_3:%.*]] = add i32 [[A_3]], 20
40 ; CHECK-NEXT: [[XOR_3:%.*]] = xor i32 [[ADD_3]], [[B_3]]
41 ; CHECK-NEXT: store i32 [[XOR_3]], ptr [[A_GEP_3]], align 4
42 ; CHECK-NEXT: [[IV_NEXT]] = add nuw nsw i64 [[IV]], 16
43 ; CHECK-NEXT: [[COND:%.*]] = icmp ult i64 [[IV_NEXT]], [[N:%.*]]
44 ; CHECK-NEXT: br i1 [[COND]], label [[LOOP]], label [[EXIT:%.*]]
46 ; CHECK-NEXT: ret void
52 %iv = phi i64 [ 0, %entry ], [ %iv.next, %loop ]
53 %B.gep.0 = getelementptr inbounds i32, ptr %B, i64 %iv
54 %B.0 = load i32, ptr %B.gep.0, align 4
55 %A.gep.0 = getelementptr inbounds i32, ptr %A, i64 %iv
56 %A.0 = load i32, ptr %A.gep.0, align 4
57 %add.0 = add i32 %A.0, 20
58 %xor.0 = xor i32 %add.0, %B.0
59 store i32 %xor.0, ptr %A.gep.0, align 4
61 %B.gep.1 = getelementptr inbounds i32, ptr %B, i64 %iv.1
62 %B.1 = load i32, ptr %B.gep.1, align 4
63 %A.gep.1 = getelementptr inbounds i32, ptr %A, i64 %iv.1
64 %A.1 = load i32, ptr %A.gep.1, align 4
65 %add.1 = add i32 %A.1, 20
66 %xor.1 = xor i32 %add.1, %B.1
67 store i32 %xor.1, ptr %A.gep.1, align 4
69 %B.gep.2 = getelementptr inbounds i32, ptr %B, i64 %iv.2
70 %B.2 = load i32, ptr %B.gep.2, align 4
71 %A.gep.2 = getelementptr inbounds i32, ptr %A, i64 %iv.2
72 %A.2 = load i32, ptr %A.gep.2, align 4
73 %add.2 = add i32 %A.2, 20
74 %xor.2 = xor i32 %add.2, %B.2
75 store i32 %xor.2, ptr %A.gep.2, align 4
77 %B.gep.3 = getelementptr inbounds i32, ptr %B, i64 %iv.3
78 %B.3 = load i32, ptr %B.gep.3, align 4
79 %A.gep.3 = getelementptr inbounds i32, ptr %A, i64 %iv.3
80 %A.3 = load i32, ptr %A.gep.3, align 4
81 %add.3 = add i32 %A.3, 20
82 %xor.3 = xor i32 %add.3, %B.3
83 store i32 %xor.3, ptr %A.gep.3, align 4
84 %iv.next = add nuw nsw i64 %iv, 16
85 %cond = icmp ult i64 %iv.next, %N
86 br i1 %cond, label %loop, label %exit
92 define void @loop_iv_update_at_start(ptr %src, ptr %dst) #0 {
93 ; CHECK-LABEL: @loop_iv_update_at_start(
95 ; CHECK-NEXT: br label [[LOOP:%.*]]
97 ; CHECK-NEXT: [[IV:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[IV_NEXT:%.*]], [[LOOP]] ]
98 ; CHECK-NEXT: [[IV_NEXT]] = add i32 [[IV]], 1
99 ; CHECK-NEXT: [[COND:%.*]] = icmp ult i32 [[IV]], 2000
100 ; CHECK-NEXT: [[SRC_0:%.*]] = load float, ptr [[SRC:%.*]], align 8
101 ; CHECK-NEXT: [[ADD_0:%.*]] = fadd float [[SRC_0]], 1.000000e+00
102 ; CHECK-NEXT: [[MUL_0:%.*]] = fmul float [[ADD_0]], [[SRC_0]]
103 ; CHECK-NEXT: store float [[MUL_0]], ptr [[DST:%.*]], align 8
104 ; CHECK-NEXT: [[SRC_GEP_1:%.*]] = getelementptr inbounds float, ptr [[SRC]], i64 1
105 ; CHECK-NEXT: [[SRC_1:%.*]] = load float, ptr [[SRC_GEP_1]], align 8
106 ; CHECK-NEXT: [[ADD_1:%.*]] = fadd float [[SRC_1]], 1.000000e+00
107 ; CHECK-NEXT: [[MUL_1:%.*]] = fmul float [[ADD_1]], [[SRC_1]]
108 ; CHECK-NEXT: [[DST_GEP_1:%.*]] = getelementptr inbounds float, ptr [[DST]], i64 1
109 ; CHECK-NEXT: store float [[MUL_1]], ptr [[DST_GEP_1]], align 8
110 ; CHECK-NEXT: [[SRC_GEP_2:%.*]] = getelementptr inbounds float, ptr [[SRC]], i64 2
111 ; CHECK-NEXT: [[SRC_2:%.*]] = load float, ptr [[SRC_GEP_2]], align 8
112 ; CHECK-NEXT: [[ADD_2:%.*]] = fadd float [[SRC_2]], 1.000000e+00
113 ; CHECK-NEXT: [[MUL_2:%.*]] = fmul float [[ADD_2]], [[SRC_2]]
114 ; CHECK-NEXT: [[DST_GEP_2:%.*]] = getelementptr inbounds float, ptr [[DST]], i64 2
115 ; CHECK-NEXT: store float [[MUL_2]], ptr [[DST_GEP_2]], align 8
116 ; CHECK-NEXT: [[SRC_GEP_3:%.*]] = getelementptr inbounds float, ptr [[SRC]], i64 3
117 ; CHECK-NEXT: [[SRC_3:%.*]] = load float, ptr [[SRC_GEP_3]], align 8
118 ; CHECK-NEXT: [[ADD_3:%.*]] = fadd float [[SRC_3]], 1.000000e+00
119 ; CHECK-NEXT: [[MUL_3:%.*]] = fmul float [[ADD_3]], [[SRC_3]]
120 ; CHECK-NEXT: [[DST_GEP_3:%.*]] = getelementptr inbounds float, ptr [[DST]], i64 3
121 ; CHECK-NEXT: store float [[MUL_3]], ptr [[DST_GEP_3]], align 8
122 ; CHECK-NEXT: [[SRC_GEP_4:%.*]] = getelementptr inbounds float, ptr [[SRC]], i64 4
123 ; CHECK-NEXT: [[SRC_4:%.*]] = load float, ptr [[SRC_GEP_4]], align 8
124 ; CHECK-NEXT: [[ADD_4:%.*]] = fadd float [[SRC_4]], 1.000000e+00
125 ; CHECK-NEXT: [[MUL_4:%.*]] = fmul float [[ADD_4]], [[SRC_4]]
126 ; CHECK-NEXT: [[DST_GEP_4:%.*]] = getelementptr inbounds float, ptr [[DST]], i64 4
127 ; CHECK-NEXT: store float [[MUL_4]], ptr [[DST_GEP_4]], align 8
128 ; CHECK-NEXT: br i1 [[COND]], label [[LOOP]], label [[EXIT:%.*]]
130 ; CHECK-NEXT: ret void
136 %iv = phi i32 [ 0, %entry ], [ %iv.next, %loop ]
137 %iv.next = add i32 %iv, 1
138 %cond = icmp ult i32 %iv, 2000
140 %src.0 = load float, ptr %src, align 8
141 %add.0 = fadd float %src.0, 1.0
142 %mul.0 = fmul float %add.0, %src.0
143 store float %mul.0, ptr %dst, align 8
145 %src.gep.1 = getelementptr inbounds float, ptr %src, i64 1
146 %src.1 = load float, ptr %src.gep.1, align 8
147 %add.1 = fadd float %src.1, 1.0
148 %mul.1 = fmul float %add.1, %src.1
149 %dst.gep.1 = getelementptr inbounds float, ptr %dst, i64 1
150 store float %mul.1, ptr %dst.gep.1, align 8
151 %src.gep.2 = getelementptr inbounds float, ptr %src, i64 2
152 %src.2 = load float, ptr %src.gep.2, align 8
153 %add.2 = fadd float %src.2, 1.0
154 %mul.2 = fmul float %add.2, %src.2
155 %dst.gep.2 = getelementptr inbounds float, ptr %dst, i64 2
156 store float %mul.2, ptr %dst.gep.2, align 8
157 %src.gep.3 = getelementptr inbounds float, ptr %src, i64 3
158 %src.3 = load float, ptr %src.gep.3, align 8
159 %add.3 = fadd float %src.3, 1.0
160 %mul.3 = fmul float %add.3, %src.3
161 %dst.gep.3 = getelementptr inbounds float, ptr %dst, i64 3
162 store float %mul.3, ptr %dst.gep.3, align 8
163 %src.gep.4 = getelementptr inbounds float, ptr %src, i64 4
164 %src.4 = load float, ptr %src.gep.4, align 8
165 %add.4 = fadd float %src.4, 1.0
166 %mul.4 = fmul float %add.4, %src.4
167 %dst.gep.4 = getelementptr inbounds float, ptr %dst, i64 4
168 store float %mul.4, ptr %dst.gep.4, align 8
169 br i1 %cond, label %loop, label %exit
175 ; Similar to @loop1, but a load is used in a phi in the same basic block.
176 define i32 @value_used_in_phi(ptr %A, ptr %B, i64 %N) {
177 ; CHECK-LABEL: @value_used_in_phi(
179 ; CHECK-NEXT: br label [[LOOP:%.*]]
181 ; CHECK-NEXT: [[IV:%.*]] = phi i64 [ 0, [[ENTRY:%.*]] ], [ [[IV_NEXT:%.*]], [[LOOP]] ]
182 ; CHECK-NEXT: [[P:%.*]] = phi i32 [ 0, [[ENTRY]] ], [ [[A_3:%.*]], [[LOOP]] ]
183 ; CHECK-NEXT: [[B_GEP_0:%.*]] = getelementptr inbounds i32, ptr [[B:%.*]], i64 [[IV]]
184 ; CHECK-NEXT: [[B_0:%.*]] = load i32, ptr [[B_GEP_0]], align 4
185 ; CHECK-NEXT: [[A_GEP_0:%.*]] = getelementptr inbounds i32, ptr [[A:%.*]], i64 [[IV]]
186 ; CHECK-NEXT: [[A_0:%.*]] = load i32, ptr [[A_GEP_0]], align 4
187 ; CHECK-NEXT: [[ADD_0:%.*]] = add i32 [[A_0]], 20
188 ; CHECK-NEXT: [[XOR_0:%.*]] = xor i32 [[ADD_0]], [[B_0]]
189 ; CHECK-NEXT: store i32 [[XOR_0]], ptr [[A_GEP_0]], align 4
190 ; CHECK-NEXT: [[IV_1:%.*]] = or i64 [[IV]], 1
191 ; CHECK-NEXT: [[B_GEP_1:%.*]] = getelementptr inbounds i32, ptr [[B]], i64 [[IV_1]]
192 ; CHECK-NEXT: [[B_1:%.*]] = load i32, ptr [[B_GEP_1]], align 4
193 ; CHECK-NEXT: [[A_GEP_1:%.*]] = getelementptr inbounds i32, ptr [[A]], i64 [[IV_1]]
194 ; CHECK-NEXT: [[A_1:%.*]] = load i32, ptr [[A_GEP_1]], align 4
195 ; CHECK-NEXT: [[ADD_1:%.*]] = add i32 [[A_1]], 20
196 ; CHECK-NEXT: [[XOR_1:%.*]] = xor i32 [[ADD_1]], [[B_1]]
197 ; CHECK-NEXT: store i32 [[XOR_1]], ptr [[A_GEP_1]], align 4
198 ; CHECK-NEXT: [[IV_2:%.*]] = or i64 [[IV]], 2
199 ; CHECK-NEXT: [[B_GEP_2:%.*]] = getelementptr inbounds i32, ptr [[B]], i64 [[IV_2]]
200 ; CHECK-NEXT: [[B_2:%.*]] = load i32, ptr [[B_GEP_2]], align 4
201 ; CHECK-NEXT: [[A_GEP_2:%.*]] = getelementptr inbounds i32, ptr [[A]], i64 [[IV_2]]
202 ; CHECK-NEXT: [[A_2:%.*]] = load i32, ptr [[A_GEP_2]], align 4
203 ; CHECK-NEXT: [[ADD_2:%.*]] = add i32 [[A_2]], 20
204 ; CHECK-NEXT: [[XOR_2:%.*]] = xor i32 [[ADD_2]], [[B_2]]
205 ; CHECK-NEXT: store i32 [[XOR_2]], ptr [[A_GEP_2]], align 4
206 ; CHECK-NEXT: [[IV_3:%.*]] = or i64 [[IV]], 3
207 ; CHECK-NEXT: [[B_GEP_3:%.*]] = getelementptr inbounds i32, ptr [[B]], i64 [[IV_3]]
208 ; CHECK-NEXT: [[B_3:%.*]] = load i32, ptr [[B_GEP_3]], align 4
209 ; CHECK-NEXT: [[A_GEP_3:%.*]] = getelementptr inbounds i32, ptr [[A]], i64 [[IV_3]]
210 ; CHECK-NEXT: [[A_3]] = load i32, ptr [[A_GEP_3]], align 4
211 ; CHECK-NEXT: [[ADD_3:%.*]] = add i32 [[A_3]], 20
212 ; CHECK-NEXT: [[XOR_3:%.*]] = xor i32 [[ADD_3]], [[B_3]]
213 ; CHECK-NEXT: store i32 [[XOR_3]], ptr [[A_GEP_3]], align 4
214 ; CHECK-NEXT: [[IV_NEXT]] = add nuw nsw i64 [[IV]], 16
215 ; CHECK-NEXT: [[COND:%.*]] = icmp ult i64 [[IV_NEXT]], [[N:%.*]]
216 ; CHECK-NEXT: br i1 [[COND]], label [[LOOP]], label [[EXIT:%.*]]
218 ; CHECK-NEXT: ret i32 [[P]]
224 %iv = phi i64 [ 0, %entry ], [ %iv.next, %loop ]
225 %p = phi i32 [ 0, %entry ], [ %A.3, %loop ]
226 %B.gep.0 = getelementptr inbounds i32, ptr %B, i64 %iv
227 %B.0 = load i32, ptr %B.gep.0, align 4
228 %A.gep.0 = getelementptr inbounds i32, ptr %A, i64 %iv
229 %A.0 = load i32, ptr %A.gep.0, align 4
230 %add.0 = add i32 %A.0, 20
231 %xor.0 = xor i32 %add.0, %B.0
232 store i32 %xor.0, ptr %A.gep.0, align 4
233 %iv.1 = or i64 %iv, 1
234 %B.gep.1 = getelementptr inbounds i32, ptr %B, i64 %iv.1
235 %B.1 = load i32, ptr %B.gep.1, align 4
236 %A.gep.1 = getelementptr inbounds i32, ptr %A, i64 %iv.1
237 %A.1 = load i32, ptr %A.gep.1, align 4
238 %add.1 = add i32 %A.1, 20
239 %xor.1 = xor i32 %add.1, %B.1
240 store i32 %xor.1, ptr %A.gep.1, align 4
241 %iv.2 = or i64 %iv, 2
242 %B.gep.2 = getelementptr inbounds i32, ptr %B, i64 %iv.2
243 %B.2 = load i32, ptr %B.gep.2, align 4
244 %A.gep.2 = getelementptr inbounds i32, ptr %A, i64 %iv.2
245 %A.2 = load i32, ptr %A.gep.2, align 4
246 %add.2 = add i32 %A.2, 20
247 %xor.2 = xor i32 %add.2, %B.2
248 store i32 %xor.2, ptr %A.gep.2, align 4
249 %iv.3 = or i64 %iv, 3
250 %B.gep.3 = getelementptr inbounds i32, ptr %B, i64 %iv.3
251 %B.3 = load i32, ptr %B.gep.3, align 4
252 %A.gep.3 = getelementptr inbounds i32, ptr %A, i64 %iv.3
253 %A.3 = load i32, ptr %A.gep.3, align 4
254 %add.3 = add i32 %A.3, 20
255 %xor.3 = xor i32 %add.3, %B.3
256 store i32 %xor.3, ptr %A.gep.3, align 4
257 %iv.next = add nuw nsw i64 %iv, 16
258 %cond = icmp ult i64 %iv.next, %N
259 br i1 %cond, label %loop, label %exit