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Follow up to d0858bffa11, add missing REQUIRES x86
[llvm-project.git] / llvm / test / tools / llvm-mca / ARM / m55-storefwd.s
blob3a744da93cfbf6450206c5f6b7a8b8cc0eaf7e05
1 # NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py
2 # RUN: llvm-mca -mtriple=thumbv8.1-m.main-none-none-eabi -mcpu=cortex-m55 -timeline < %s | FileCheck %s
3
4 # Most MVE operations are either latency=1 or can forward into stores
5 vadd.i8 q0, q2, q1
6 vstrb.8 q0, [r0, #0]
7 vadd.f32 q0, q2, q1
8 vstrb.8 q0, [r0, #0]
9 vmul.i8 q0, q2, q1
10 vstrb.8 q0, [r0, #0]
11 vmlas.u32 q0, q2, r0
12 vstrb.8 q0, [r0, #0]
13 vfma.f16 q0, q2, q1
14 vstrb.8 q0, [r0, #0]
15 vmullb.s16 q0, q2, q1
16 vstrb.8 q0, [r0, #0]
17 vcvtt.f32.f16 q0, q2
18 vstrb.8 q0, [r0, #0]
19 vcvtb.f32.f16 q0, q2
20 vstrb.8 q0, [r0, #0]
21
22 # The ones that cannot are VCVT.f16.f32 t/b and any VMOVN/VQMOVN/VSHRN/VQSHRN/VRSHRN
23 vmovnt.s16 q0, q2
24 vstrb.8 q0, [r0, #0]
25 vmovnb.u32 q0, q2
26 vstrb.8 q0, [r0, #0]
27 vqmovnt.s32 q0, q2
28 vstrb.8 q0, [r0, #0]
29 vqmovnb.u16 q0, q2
30 vstrb.8 q0, [r0, #0]
31 vshrnt.s32 q0, q2, #1
32 vstrb.8 q0, [r0, #0]
33 vshrnb.u16 q0, q2, #1
34 vstrb.8 q0, [r0, #0]
35 vqshrnt.s16 q0, q2, #1
36 vstrb.8 q0, [r0, #0]
37 vqshrnb.u32 q0, q2, #1
38 vstrb.8 q0, [r0, #0]
39 vrshrnt.s16 q0, q2, #1
40 vstrb.8 q0, [r0, #0]
41 vrshrnb.u16 q0, q2, #1
42 vstrb.8 q0, [r0, #0]
43 vcvtt.f16.f32 q0, q2
44 vstrb.8 q0, [r0, #0]
45 vcvtb.f16.f32 q0, q2
46 vstrb.8 q0, [r0, #0]
47
48 # CHECK: Iterations: 100
49 # CHECK-NEXT: Instructions: 4000
50 # CHECK-NEXT: Total Cycles: 6401
51 # CHECK-NEXT: Total uOps: 4000
52
53 # CHECK: Dispatch Width: 2
54 # CHECK-NEXT: uOps Per Cycle: 0.62
55 # CHECK-NEXT: IPC: 0.62
56 # CHECK-NEXT: Block RThroughput: 40.0
57
58 # CHECK: Instruction Info:
59 # CHECK-NEXT: [1]: #uOps
60 # CHECK-NEXT: [2]: Latency
61 # CHECK-NEXT: [3]: RThroughput
62 # CHECK-NEXT: [4]: MayLoad
63 # CHECK-NEXT: [5]: MayStore
64 # CHECK-NEXT: [6]: HasSideEffects (U)
65
66 # CHECK: [1] [2] [3] [4] [5] [6] Instructions:
67 # CHECK-NEXT: 1 1 2.00 vadd.i8 q0, q2, q1
68 # CHECK-NEXT: 1 1 2.00 * vstrb.8 q0, [r0]
69 # CHECK-NEXT: 1 1 2.00 vadd.f32 q0, q2, q1
70 # CHECK-NEXT: 1 1 2.00 * vstrb.8 q0, [r0]
71 # CHECK-NEXT: 1 2 2.00 vmul.i8 q0, q2, q1
72 # CHECK-NEXT: 1 1 2.00 * vstrb.8 q0, [r0]
73 # CHECK-NEXT: 1 2 2.00 vmlas.i32 q0, q2, r0
74 # CHECK-NEXT: 1 1 2.00 * vstrb.8 q0, [r0]
75 # CHECK-NEXT: 1 2 2.00 vfma.f16 q0, q2, q1
76 # CHECK-NEXT: 1 1 2.00 * vstrb.8 q0, [r0]
77 # CHECK-NEXT: 1 2 2.00 vmullb.s16 q0, q2, q1
78 # CHECK-NEXT: 1 1 2.00 * vstrb.8 q0, [r0]
79 # CHECK-NEXT: 1 2 2.00 vcvtt.f32.f16 q0, q2
80 # CHECK-NEXT: 1 1 2.00 * vstrb.8 q0, [r0]
81 # CHECK-NEXT: 1 2 2.00 vcvtb.f32.f16 q0, q2
82 # CHECK-NEXT: 1 1 2.00 * vstrb.8 q0, [r0]
83 # CHECK-NEXT: 1 3 2.00 vmovnt.i16 q0, q2
84 # CHECK-NEXT: 1 1 2.00 * vstrb.8 q0, [r0]
85 # CHECK-NEXT: 1 3 2.00 vmovnb.i32 q0, q2
86 # CHECK-NEXT: 1 1 2.00 * vstrb.8 q0, [r0]
87 # CHECK-NEXT: 1 3 2.00 vqmovnt.s32 q0, q2
88 # CHECK-NEXT: 1 1 2.00 * vstrb.8 q0, [r0]
89 # CHECK-NEXT: 1 3 2.00 vqmovnb.u16 q0, q2
90 # CHECK-NEXT: 1 1 2.00 * vstrb.8 q0, [r0]
91 # CHECK-NEXT: 1 3 2.00 vshrnt.i32 q0, q2, #1
92 # CHECK-NEXT: 1 1 2.00 * vstrb.8 q0, [r0]
93 # CHECK-NEXT: 1 3 2.00 vshrnb.i16 q0, q2, #1
94 # CHECK-NEXT: 1 1 2.00 * vstrb.8 q0, [r0]
95 # CHECK-NEXT: 1 3 2.00 vqshrnt.s16 q0, q2, #1
96 # CHECK-NEXT: 1 1 2.00 * vstrb.8 q0, [r0]
97 # CHECK-NEXT: 1 3 2.00 vqshrnb.u32 q0, q2, #1
98 # CHECK-NEXT: 1 1 2.00 * vstrb.8 q0, [r0]
99 # CHECK-NEXT: 1 3 2.00 vrshrnt.i16 q0, q2, #1
100 # CHECK-NEXT: 1 1 2.00 * vstrb.8 q0, [r0]
101 # CHECK-NEXT: 1 3 2.00 vrshrnb.i16 q0, q2, #1
102 # CHECK-NEXT: 1 1 2.00 * vstrb.8 q0, [r0]
103 # CHECK-NEXT: 1 3 2.00 vcvtt.f16.f32 q0, q2
104 # CHECK-NEXT: 1 1 2.00 * vstrb.8 q0, [r0]
105 # CHECK-NEXT: 1 3 2.00 vcvtb.f16.f32 q0, q2
106 # CHECK-NEXT: 1 1 2.00 * vstrb.8 q0, [r0]
107
108 # CHECK: Resources:
109 # CHECK-NEXT: [0] - M55UnitALU
110 # CHECK-NEXT: [1] - M55UnitLoadStore
111 # CHECK-NEXT: [2] - M55UnitVecALU
112 # CHECK-NEXT: [3] - M55UnitVecFPALU
113 # CHECK-NEXT: [4] - M55UnitVecSys
114
115 # CHECK: Resource pressure per iteration:
116 # CHECK-NEXT: [0] [1] [2] [3] [4]
117 # CHECK-NEXT: - 40.00 22.00 18.00 -
118
119 # CHECK: Resource pressure by instruction:
120 # CHECK-NEXT: [0] [1] [2] [3] [4] Instructions:
121 # CHECK-NEXT: - - 2.00 - - vadd.i8 q0, q2, q1
122 # CHECK-NEXT: - 2.00 - - - vstrb.8 q0, [r0]
123 # CHECK-NEXT: - - - 2.00 - vadd.f32 q0, q2, q1
124 # CHECK-NEXT: - 2.00 - - - vstrb.8 q0, [r0]
125 # CHECK-NEXT: - - - 2.00 - vmul.i8 q0, q2, q1
126 # CHECK-NEXT: - 2.00 - - - vstrb.8 q0, [r0]
127 # CHECK-NEXT: - - - 2.00 - vmlas.i32 q0, q2, r0
128 # CHECK-NEXT: - 2.00 - - - vstrb.8 q0, [r0]
129 # CHECK-NEXT: - - - 2.00 - vfma.f16 q0, q2, q1
130 # CHECK-NEXT: - 2.00 - - - vstrb.8 q0, [r0]
131 # CHECK-NEXT: - - - 2.00 - vmullb.s16 q0, q2, q1
132 # CHECK-NEXT: - 2.00 - - - vstrb.8 q0, [r0]
133 # CHECK-NEXT: - - - 2.00 - vcvtt.f32.f16 q0, q2
134 # CHECK-NEXT: - 2.00 - - - vstrb.8 q0, [r0]
135 # CHECK-NEXT: - - - 2.00 - vcvtb.f32.f16 q0, q2
136 # CHECK-NEXT: - 2.00 - - - vstrb.8 q0, [r0]
137 # CHECK-NEXT: - - 2.00 - - vmovnt.i16 q0, q2
138 # CHECK-NEXT: - 2.00 - - - vstrb.8 q0, [r0]
139 # CHECK-NEXT: - - 2.00 - - vmovnb.i32 q0, q2
140 # CHECK-NEXT: - 2.00 - - - vstrb.8 q0, [r0]
141 # CHECK-NEXT: - - 2.00 - - vqmovnt.s32 q0, q2
142 # CHECK-NEXT: - 2.00 - - - vstrb.8 q0, [r0]
143 # CHECK-NEXT: - - 2.00 - - vqmovnb.u16 q0, q2
144 # CHECK-NEXT: - 2.00 - - - vstrb.8 q0, [r0]
145 # CHECK-NEXT: - - 2.00 - - vshrnt.i32 q0, q2, #1
146 # CHECK-NEXT: - 2.00 - - - vstrb.8 q0, [r0]
147 # CHECK-NEXT: - - 2.00 - - vshrnb.i16 q0, q2, #1
148 # CHECK-NEXT: - 2.00 - - - vstrb.8 q0, [r0]
149 # CHECK-NEXT: - - 2.00 - - vqshrnt.s16 q0, q2, #1
150 # CHECK-NEXT: - 2.00 - - - vstrb.8 q0, [r0]
151 # CHECK-NEXT: - - 2.00 - - vqshrnb.u32 q0, q2, #1
152 # CHECK-NEXT: - 2.00 - - - vstrb.8 q0, [r0]
153 # CHECK-NEXT: - - 2.00 - - vrshrnt.i16 q0, q2, #1
154 # CHECK-NEXT: - 2.00 - - - vstrb.8 q0, [r0]
155 # CHECK-NEXT: - - 2.00 - - vrshrnb.i16 q0, q2, #1
156 # CHECK-NEXT: - 2.00 - - - vstrb.8 q0, [r0]
157 # CHECK-NEXT: - - - 2.00 - vcvtt.f16.f32 q0, q2
158 # CHECK-NEXT: - 2.00 - - - vstrb.8 q0, [r0]
159 # CHECK-NEXT: - - - 2.00 - vcvtb.f16.f32 q0, q2
160 # CHECK-NEXT: - 2.00 - - - vstrb.8 q0, [r0]
161
162 # CHECK: Timeline view:
163 # CHECK-NEXT: 0123456789 0123456789 0123456789 0123456789
164 # CHECK-NEXT: Index 0123456789 0123456789 0123456789 0123456789
165
166 # CHECK: [0,0] DE . . . . . . . . . . . . . . . . vadd.i8 q0, q2, q1
167 # CHECK-NEXT: [0,1] .DE . . . . . . . . . . . . . . . . vstrb.8 q0, [r0]
168 # CHECK-NEXT: [0,2] . DE . . . . . . . . . . . . . . . . vadd.f32 q0, q2, q1
169 # CHECK-NEXT: [0,3] . DE. . . . . . . . . . . . . . . . vstrb.8 q0, [r0]
170 # CHECK-NEXT: [0,4] . DeE . . . . . . . . . . . . . . . vmul.i8 q0, q2, q1
171 # CHECK-NEXT: [0,5] . DE . . . . . . . . . . . . . . . vstrb.8 q0, [r0]
172 # CHECK-NEXT: [0,6] . .DeE . . . . . . . . . . . . . . . vmlas.i32 q0, q2, r0
173 # CHECK-NEXT: [0,7] . . DE . . . . . . . . . . . . . . . vstrb.8 q0, [r0]
174 # CHECK-NEXT: [0,8] . . DeE . . . . . . . . . . . . . . vfma.f16 q0, q2, q1
175 # CHECK-NEXT: [0,9] . . DE . . . . . . . . . . . . . . vstrb.8 q0, [r0]
176 # CHECK-NEXT: [0,10] . . DeE . . . . . . . . . . . . . . vmullb.s16 q0, q2, q1
177 # CHECK-NEXT: [0,11] . . .DE . . . . . . . . . . . . . . vstrb.8 q0, [r0]
178 # CHECK-NEXT: [0,12] . . . DeE. . . . . . . . . . . . . . vcvtt.f32.f16 q0, q2
179 # CHECK-NEXT: [0,13] . . . DE. . . . . . . . . . . . . . vstrb.8 q0, [r0]
180 # CHECK-NEXT: [0,14] . . . DeE . . . . . . . . . . . . . vcvtb.f32.f16 q0, q2
181 # CHECK-NEXT: [0,15] . . . DE . . . . . . . . . . . . . vstrb.8 q0, [r0]
182 # CHECK-NEXT: [0,16] . . . .DeeE. . . . . . . . . . . . . vmovnt.i16 q0, q2
183 # CHECK-NEXT: [0,17] . . . . DE . . . . . . . . . . . . vstrb.8 q0, [r0]
184 # CHECK-NEXT: [0,18] . . . . DeeE . . . . . . . . . . . . vmovnb.i32 q0, q2
185 # CHECK-NEXT: [0,19] . . . . . DE. . . . . . . . . . . . vstrb.8 q0, [r0]
186 # CHECK-NEXT: [0,20] . . . . . DeeE . . . . . . . . . . . vqmovnt.s32 q0, q2
187 # CHECK-NEXT: [0,21] . . . . . . DE . . . . . . . . . . . vstrb.8 q0, [r0]
188 # CHECK-NEXT: [0,22] . . . . . . DeeE . . . . . . . . . . vqmovnb.u16 q0, q2
189 # CHECK-NEXT: [0,23] . . . . . . .DE . . . . . . . . . . vstrb.8 q0, [r0]
190 # CHECK-NEXT: [0,24] . . . . . . . DeeE . . . . . . . . . vshrnt.i32 q0, q2, #1
191 # CHECK-NEXT: [0,25] . . . . . . . DE . . . . . . . . . vstrb.8 q0, [r0]
192 # CHECK-NEXT: [0,26] . . . . . . . .DeeE. . . . . . . . . vshrnb.i16 q0, q2, #1
193 # CHECK-NEXT: [0,27] . . . . . . . . DE . . . . . . . . vstrb.8 q0, [r0]
194 # CHECK-NEXT: [0,28] . . . . . . . . DeeE . . . . . . . . vqshrnt.s16 q0, q2, #1
195 # CHECK-NEXT: [0,29] . . . . . . . . . DE. . . . . . . . vstrb.8 q0, [r0]
196 # CHECK-NEXT: [0,30] . . . . . . . . . DeeE . . . . . . . vqshrnb.u32 q0, q2, #1
197 # CHECK-NEXT: [0,31] . . . . . . . . . . DE . . . . . . . vstrb.8 q0, [r0]
198 # CHECK-NEXT: [0,32] . . . . . . . . . . DeeE . . . . . . vrshrnt.i16 q0, q2, #1
199 # CHECK-NEXT: [0,33] . . . . . . . . . . .DE . . . . . . vstrb.8 q0, [r0]
200 # CHECK-NEXT: [0,34] . . . . . . . . . . . DeeE . . . . . vrshrnb.i16 q0, q2, #1
201 # CHECK-NEXT: [0,35] . . . . . . . . . . . DE . . . . . vstrb.8 q0, [r0]
202 # CHECK-NEXT: [0,36] . . . . . . . . . . . .DeeE. . . . . vcvtt.f16.f32 q0, q2
203 # CHECK-NEXT: [0,37] . . . . . . . . . . . . DE . . . . vstrb.8 q0, [r0]
204 # CHECK-NEXT: [0,38] . . . . . . . . . . . . DeeE . . . . vcvtb.f16.f32 q0, q2
205 # CHECK-NEXT: [0,39] . . . . . . . . . . . . . DE. . . . vstrb.8 q0, [r0]
206 # CHECK-NEXT: [1,0] . . . . . . . . . . . . . DE . . . vadd.i8 q0, q2, q1
207 # CHECK-NEXT: [1,1] . . . . . . . . . . . . . DE . . . vstrb.8 q0, [r0]
208 # CHECK-NEXT: [1,2] . . . . . . . . . . . . . .DE . . . vadd.f32 q0, q2, q1
209 # CHECK-NEXT: [1,3] . . . . . . . . . . . . . . DE . . . vstrb.8 q0, [r0]
210 # CHECK-NEXT: [1,4] . . . . . . . . . . . . . . DeE . . vmul.i8 q0, q2, q1
211 # CHECK-NEXT: [1,5] . . . . . . . . . . . . . . DE . . vstrb.8 q0, [r0]
212 # CHECK-NEXT: [1,6] . . . . . . . . . . . . . . DeE . . vmlas.i32 q0, q2, r0
213 # CHECK-NEXT: [1,7] . . . . . . . . . . . . . . .DE . . vstrb.8 q0, [r0]
214 # CHECK-NEXT: [1,8] . . . . . . . . . . . . . . . DeE. . vfma.f16 q0, q2, q1
215 # CHECK-NEXT: [1,9] . . . . . . . . . . . . . . . DE. . vstrb.8 q0, [r0]
216 # CHECK-NEXT: [1,10] . . . . . . . . . . . . . . . DeE . vmullb.s16 q0, q2, q1
217 # CHECK-NEXT: [1,11] . . . . . . . . . . . . . . . DE . vstrb.8 q0, [r0]
218 # CHECK-NEXT: [1,12] . . . . . . . . . . . . . . . .DeE. vcvtt.f32.f16 q0, q2
219 # CHECK-NEXT: [1,13] . . . . . . . . . . . . . . . . DE. vstrb.8 q0, [r0]
220 # CHECK-NEXT: Truncated display due to cycle limit
221
222 # CHECK: Average Wait times (based on the timeline view):
223 # CHECK-NEXT: [0]: Executions
224 # CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue
225 # CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready
226 # CHECK-NEXT: [3]: Average time elapsed from WB until retire stage
227
228 # CHECK: [0] [1] [2] [3]
229 # CHECK-NEXT: 0. 10 0.0 0.0 0.0 vadd.i8 q0, q2, q1
230 # CHECK-NEXT: 1. 10 0.0 0.0 0.0 vstrb.8 q0, [r0]
231 # CHECK-NEXT: 2. 10 0.0 0.0 0.0 vadd.f32 q0, q2, q1
232 # CHECK-NEXT: 3. 10 0.0 0.0 0.0 vstrb.8 q0, [r0]
233 # CHECK-NEXT: 4. 10 0.0 0.0 0.0 vmul.i8 q0, q2, q1
234 # CHECK-NEXT: 5. 10 0.0 0.0 0.0 vstrb.8 q0, [r0]
235 # CHECK-NEXT: 6. 10 0.0 0.0 0.0 vmlas.i32 q0, q2, r0
236 # CHECK-NEXT: 7. 10 0.0 0.0 0.0 vstrb.8 q0, [r0]
237 # CHECK-NEXT: 8. 10 0.0 0.0 0.0 vfma.f16 q0, q2, q1
238 # CHECK-NEXT: 9. 10 0.0 0.0 0.0 vstrb.8 q0, [r0]
239 # CHECK-NEXT: 10. 10 0.0 0.0 0.0 vmullb.s16 q0, q2, q1
240 # CHECK-NEXT: 11. 10 0.0 0.0 0.0 vstrb.8 q0, [r0]
241 # CHECK-NEXT: 12. 10 0.0 0.0 0.0 vcvtt.f32.f16 q0, q2
242 # CHECK-NEXT: 13. 10 0.0 0.0 0.0 vstrb.8 q0, [r0]
243 # CHECK-NEXT: 14. 10 0.0 0.0 0.0 vcvtb.f32.f16 q0, q2
244 # CHECK-NEXT: 15. 10 0.0 0.0 0.0 vstrb.8 q0, [r0]
245 # CHECK-NEXT: 16. 10 0.0 0.0 0.0 vmovnt.i16 q0, q2
246 # CHECK-NEXT: 17. 10 0.0 0.0 0.0 vstrb.8 q0, [r0]
247 # CHECK-NEXT: 18. 10 0.0 0.0 0.0 vmovnb.i32 q0, q2
248 # CHECK-NEXT: 19. 10 0.0 0.0 0.0 vstrb.8 q0, [r0]
249 # CHECK-NEXT: 20. 10 0.0 0.0 0.0 vqmovnt.s32 q0, q2
250 # CHECK-NEXT: 21. 10 0.0 0.0 0.0 vstrb.8 q0, [r0]
251 # CHECK-NEXT: 22. 10 0.0 0.0 0.0 vqmovnb.u16 q0, q2
252 # CHECK-NEXT: 23. 10 0.0 0.0 0.0 vstrb.8 q0, [r0]
253 # CHECK-NEXT: 24. 10 0.0 0.0 0.0 vshrnt.i32 q0, q2, #1
254 # CHECK-NEXT: 25. 10 0.0 0.0 0.0 vstrb.8 q0, [r0]
255 # CHECK-NEXT: 26. 10 0.0 0.0 0.0 vshrnb.i16 q0, q2, #1
256 # CHECK-NEXT: 27. 10 0.0 0.0 0.0 vstrb.8 q0, [r0]
257 # CHECK-NEXT: 28. 10 0.0 0.0 0.0 vqshrnt.s16 q0, q2, #1
258 # CHECK-NEXT: 29. 10 0.0 0.0 0.0 vstrb.8 q0, [r0]
259 # CHECK-NEXT: 30. 10 0.0 0.0 0.0 vqshrnb.u32 q0, q2, #1
260 # CHECK-NEXT: 31. 10 0.0 0.0 0.0 vstrb.8 q0, [r0]
261 # CHECK-NEXT: 32. 10 0.0 0.0 0.0 vrshrnt.i16 q0, q2, #1
262 # CHECK-NEXT: 33. 10 0.0 0.0 0.0 vstrb.8 q0, [r0]
263 # CHECK-NEXT: 34. 10 0.0 0.0 0.0 vrshrnb.i16 q0, q2, #1
264 # CHECK-NEXT: 35. 10 0.0 0.0 0.0 vstrb.8 q0, [r0]
265 # CHECK-NEXT: 36. 10 0.0 0.0 0.0 vcvtt.f16.f32 q0, q2
266 # CHECK-NEXT: 37. 10 0.0 0.0 0.0 vstrb.8 q0, [r0]
267 # CHECK-NEXT: 38. 10 0.0 0.0 0.0 vcvtb.f16.f32 q0, q2
268 # CHECK-NEXT: 39. 10 0.0 0.0 0.0 vstrb.8 q0, [r0]
269 # CHECK-NEXT: 10 0.0 0.0 0.0 <total>
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