llvm/test/tools/llvm-mca/RISCV/lmul-instrument-in-middle.s

   1 # NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py
   2 # RUN: llvm-mca -mtriple=riscv64 -mcpu=sifive-x280 -timeline -iterations=1 < %s | FileCheck %s
   3
   4 vadd.vv v12, v12, v12
   5 vsetvli zero, a0, e8, mf8, tu, mu
   6 # LLVM-MCA-RISCV-LMUL MF8
   7 vadd.vv v12, v12, v12
   8
   9 # CHECK:      Iterations:        1
  10 # CHECK-NEXT: Instructions:      3
  11 # CHECK-NEXT: Total Cycles:      22
  12 # CHECK-NEXT: Total uOps:        3
  13
  14 # CHECK:      Dispatch Width:    2
  15 # CHECK-NEXT: uOps Per Cycle:    0.14
  16 # CHECK-NEXT: IPC:               0.14
  17 # CHECK-NEXT: Block RThroughput: 19.0
  18
  19 # CHECK:      Instruction Info:
  20 # CHECK-NEXT: [1]: #uOps
  21 # CHECK-NEXT: [2]: Latency
  22 # CHECK-NEXT: [3]: RThroughput
  23 # CHECK-NEXT: [4]: MayLoad
  24 # CHECK-NEXT: [5]: MayStore
  25 # CHECK-NEXT: [6]: HasSideEffects (U)
  26
  27 # CHECK:      [1]    [2]    [3]    [4]    [5]    [6]    Instructions:
  28 # CHECK-NEXT:  1      4     17.00                       vadd.vv v12, v12, v12
  29 # CHECK-NEXT:  1      3     1.00                  U     vsetvli zero, a0, e8, mf8, tu, mu
  30 # CHECK-NEXT:  1      4     2.00                        vadd.vv v12, v12, v12
  31
  32 # CHECK:      Resources:
  33 # CHECK-NEXT: [0]   - SiFive7FDiv
  34 # CHECK-NEXT: [1]   - SiFive7IDiv
  35 # CHECK-NEXT: [2]   - SiFive7PipeA
  36 # CHECK-NEXT: [3]   - SiFive7PipeB
  37 # CHECK-NEXT: [4]   - SiFive7VA
  38 # CHECK-NEXT: [5]   - SiFive7VCQ
  39 # CHECK-NEXT: [6]   - SiFive7VL
  40 # CHECK-NEXT: [7]   - SiFive7VS
  41
  42 # CHECK:      Resource pressure per iteration:
  43 # CHECK-NEXT: [0]    [1]    [2]    [3]    [4]    [5]    [6]    [7]
  44 # CHECK-NEXT:  -      -     1.00    -     19.00  2.00    -      -
  45
  46 # CHECK:      Resource pressure by instruction:
  47 # CHECK-NEXT: [0]    [1]    [2]    [3]    [4]    [5]    [6]    [7]    Instructions:
  48 # CHECK-NEXT:  -      -      -      -     17.00  1.00    -      -     vadd.vv   v12, v12, v12
  49 # CHECK-NEXT:  -      -     1.00    -      -      -      -      -     vsetvli   zero, a0, e8, mf8, tu, mu
  50 # CHECK-NEXT:  -      -      -      -     2.00   1.00    -      -     vadd.vv   v12, v12, v12
  51
  52 # CHECK:      Timeline view:
  53 # CHECK-NEXT:                     0123456789
  54 # CHECK-NEXT: Index     0123456789          01
  55
  56 # CHECK:      [0,0]     DeeeE.    .    .    ..   vadd.vv        v12, v12, v12
  57 # CHECK-NEXT: [0,1]     .DeeE.    .    .    ..   vsetvli        zero, a0, e8, mf8, tu, mu
  58 # CHECK-NEXT: [0,2]     .    .    .    . DeeeE   vadd.vv        v12, v12, v12
  59
  60 # CHECK:      Average Wait times (based on the timeline view):
  61 # CHECK-NEXT: [0]: Executions
  62 # CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue
  63 # CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready
  64 # CHECK-NEXT: [3]: Average time elapsed from WB until retire stage
  65
  66 # CHECK:            [0]    [1]    [2]    [3]
  67 # CHECK-NEXT: 0.     1     0.0    0.0    0.0       vadd.vv      v12, v12, v12
  68 # CHECK-NEXT: 1.     1     0.0    0.0    0.0       vsetvli      zero, a0, e8, mf8, tu, mu
  69 # CHECK-NEXT: 2.     1     0.0    0.0    0.0       vadd.vv      v12, v12, v12
  70 # CHECK-NEXT:        1     0.0    0.0    0.0       <total>