llvm/test/tools/llvm-mca/RISCV/multiple-same-lmul-instruments.s

   1 # NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py
   2 # RUN: llvm-mca -mtriple=riscv64 -mcpu=sifive-x280 -timeline -iterations=1 < %s | FileCheck %s
   3
   4 vsetvli zero, a0, e8, m1, tu, mu
   5 # LLVM-MCA-RISCV-LMUL M1
   6 vadd.vv v12, v12, v12
   7 vsetvli zero, a0, e8, m1, tu, mu
   8 # LLVM-MCA-RISCV-LMUL M1
   9 vadd.vv v12, v12, v12
  10 vsub.vv v12, v12, v12
  11 vsetvli zero, a0, e8, m4, tu, mu
  12 # LLVM-MCA-RISCV-LMUL M4
  13 vadd.vv v12, v12, v12
  14 vsub.vv v12, v12, v12
  15
  16 # CHECK:      Iterations:        1
  17 # CHECK-NEXT: Instructions:      8
  18 # CHECK-NEXT: Total Cycles:      29
  19 # CHECK-NEXT: Total uOps:        8
  20
  21 # CHECK:      Dispatch Width:    2
  22 # CHECK-NEXT: uOps Per Cycle:    0.28
  23 # CHECK-NEXT: IPC:               0.28
  24 # CHECK-NEXT: Block RThroughput: 27.0
  25
  26 # CHECK:      Instruction Info:
  27 # CHECK-NEXT: [1]: #uOps
  28 # CHECK-NEXT: [2]: Latency
  29 # CHECK-NEXT: [3]: RThroughput
  30 # CHECK-NEXT: [4]: MayLoad
  31 # CHECK-NEXT: [5]: MayStore
  32 # CHECK-NEXT: [6]: HasSideEffects (U)
  33
  34 # CHECK:      [1]    [2]    [3]    [4]    [5]    [6]    Instructions:
  35 # CHECK-NEXT:  1      3     1.00                  U     vsetvli zero, a0, e8, m1, tu, mu
  36 # CHECK-NEXT:  1      4     3.00                        vadd.vv v12, v12, v12
  37 # CHECK-NEXT:  1      3     1.00                  U     vsetvli zero, a0, e8, m1, tu, mu
  38 # CHECK-NEXT:  1      4     3.00                        vadd.vv v12, v12, v12
  39 # CHECK-NEXT:  1      4     3.00                        vsub.vv v12, v12, v12
  40 # CHECK-NEXT:  1      3     1.00                  U     vsetvli zero, a0, e8, m4, tu, mu
  41 # CHECK-NEXT:  1      4     9.00                        vadd.vv v12, v12, v12
  42 # CHECK-NEXT:  1      4     9.00                        vsub.vv v12, v12, v12
  43
  44 # CHECK:      Resources:
  45 # CHECK-NEXT: [0]   - SiFive7FDiv
  46 # CHECK-NEXT: [1]   - SiFive7IDiv
  47 # CHECK-NEXT: [2]   - SiFive7PipeA
  48 # CHECK-NEXT: [3]   - SiFive7PipeB
  49 # CHECK-NEXT: [4]   - SiFive7VA
  50 # CHECK-NEXT: [5]   - SiFive7VCQ
  51 # CHECK-NEXT: [6]   - SiFive7VL
  52 # CHECK-NEXT: [7]   - SiFive7VS
  53
  54 # CHECK:      Resource pressure per iteration:
  55 # CHECK-NEXT: [0]    [1]    [2]    [3]    [4]    [5]    [6]    [7]
  56 # CHECK-NEXT:  -      -     3.00    -     27.00  5.00    -      -
  57
  58 # CHECK:      Resource pressure by instruction:
  59 # CHECK-NEXT: [0]    [1]    [2]    [3]    [4]    [5]    [6]    [7]    Instructions:
  60 # CHECK-NEXT:  -      -     1.00    -      -      -      -      -     vsetvli   zero, a0, e8, m1, tu, mu
  61 # CHECK-NEXT:  -      -      -      -     3.00   1.00    -      -     vadd.vv   v12, v12, v12
  62 # CHECK-NEXT:  -      -     1.00    -      -      -      -      -     vsetvli   zero, a0, e8, m1, tu, mu
  63 # CHECK-NEXT:  -      -      -      -     3.00   1.00    -      -     vadd.vv   v12, v12, v12
  64 # CHECK-NEXT:  -      -      -      -     3.00   1.00    -      -     vsub.vv   v12, v12, v12
  65 # CHECK-NEXT:  -      -     1.00    -      -      -      -      -     vsetvli   zero, a0, e8, m4, tu, mu
  66 # CHECK-NEXT:  -      -      -      -     9.00   1.00    -      -     vadd.vv   v12, v12, v12
  67 # CHECK-NEXT:  -      -      -      -     9.00   1.00    -      -     vsub.vv   v12, v12, v12
  68
  69 # CHECK:      Timeline view:
  70 # CHECK-NEXT:                     0123456789
  71 # CHECK-NEXT: Index     0123456789          012345678
  72
  73 # CHECK:      [0,0]     DeeE .    .    .    .    .  .   vsetvli zero, a0, e8, m1, tu, mu
  74 # CHECK-NEXT: [0,1]     .  DeeeE  .    .    .    .  .   vadd.vv v12, v12, v12
  75 # CHECK-NEXT: [0,2]     .   DeeE  .    .    .    .  .   vsetvli zero, a0, e8, m1, tu, mu
  76 # CHECK-NEXT: [0,3]     .    . DeeeE   .    .    .  .   vadd.vv v12, v12, v12
  77 # CHECK-NEXT: [0,4]     .    .    .DeeeE    .    .  .   vsub.vv v12, v12, v12
  78 # CHECK-NEXT: [0,5]     .    .    . DeeE    .    .  .   vsetvli zero, a0, e8, m4, tu, mu
  79 # CHECK-NEXT: [0,6]     .    .    .    DeeeE.    .  .   vadd.vv v12, v12, v12
  80 # CHECK-NEXT: [0,7]     .    .    .    .    .   DeeeE   vsub.vv v12, v12, v12
  81
  82 # CHECK:      Average Wait times (based on the timeline view):
  83 # CHECK-NEXT: [0]: Executions
  84 # CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue
  85 # CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready
  86 # CHECK-NEXT: [3]: Average time elapsed from WB until retire stage
  87
  88 # CHECK:            [0]    [1]    [2]    [3]
  89 # CHECK-NEXT: 0.     1     0.0    0.0    0.0       vsetvli      zero, a0, e8, m1, tu, mu
  90 # CHECK-NEXT: 1.     1     0.0    0.0    0.0       vadd.vv      v12, v12, v12
  91 # CHECK-NEXT: 2.     1     0.0    0.0    0.0       vsetvli      zero, a0, e8, m1, tu, mu
  92 # CHECK-NEXT: 3.     1     0.0    0.0    0.0       vadd.vv      v12, v12, v12
  93 # CHECK-NEXT: 4.     1     0.0    0.0    0.0       vsub.vv      v12, v12, v12
  94 # CHECK-NEXT: 5.     1     0.0    0.0    0.0       vsetvli      zero, a0, e8, m4, tu, mu
  95 # CHECK-NEXT: 6.     1     0.0    0.0    0.0       vadd.vv      v12, v12, v12
  96 # CHECK-NEXT: 7.     1     0.0    0.0    0.0       vsub.vv      v12, v12, v12
  97 # CHECK-NEXT:        1     0.0    0.0    0.0       <total>