llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-ptrmask.mir

   1 # NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
   2 # RUN: llc -mtriple=amdgcn -mcpu=tahiti -run-pass=instruction-select -global-isel-abort=0 -verify-machineinstrs -o - %s  | FileCheck %s
   3
   4 ---
   5 name:  ptrmask_p3_s32_sgpr_sgpr_sgpr
   6 legalized:       true
   7 regBankSelected: true
   8
   9 body: |
  10   bb.0:
  11     liveins: $sgpr0, $sgpr1
  12
  13     ; CHECK-LABEL: name: ptrmask_p3_s32_sgpr_sgpr_sgpr
  14     ; CHECK: liveins: $sgpr0, $sgpr1
  15     ; CHECK-NEXT: {{  $}}
  16     ; CHECK-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
  17     ; CHECK-NEXT: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr1
  18     ; CHECK-NEXT: [[S_AND_B32_:%[0-9]+]]:sreg_32 = S_AND_B32 [[COPY]], [[COPY1]], implicit-def dead $scc
  19     ; CHECK-NEXT: S_ENDPGM 0, implicit [[S_AND_B32_]]
  20     %0:sgpr(p3) = COPY $sgpr0
  21     %1:sgpr(s32) = COPY $sgpr1
  22     %2:sgpr(p3) = G_PTRMASK %0, %1
  23     S_ENDPGM 0, implicit %2
  24
  25 ...
  26
  27 ---
  28 name:  ptrmask_p3_s32_sgpr_sgpr_0xf0f0f0f0
  29 legalized:       true
  30 regBankSelected: true
  31
  32 body: |
  33   bb.0:
  34     liveins: $sgpr0
  35
  36     ; CHECK-LABEL: name: ptrmask_p3_s32_sgpr_sgpr_0xf0f0f0f0
  37     ; CHECK: liveins: $sgpr0
  38     ; CHECK-NEXT: {{  $}}
  39     ; CHECK-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
  40     ; CHECK-NEXT: %const:sreg_32 = S_MOV_B32 -252645136
  41     ; CHECK-NEXT: [[S_AND_B32_:%[0-9]+]]:sreg_32 = S_AND_B32 [[COPY]], %const, implicit-def dead $scc
  42     ; CHECK-NEXT: S_ENDPGM 0, implicit [[S_AND_B32_]]
  43     %0:sgpr(p3) = COPY $sgpr0
  44     %const:sgpr(s32) = G_CONSTANT i32 -252645136
  45     %1:sgpr(p3) = G_PTRMASK %0, %const
  46     S_ENDPGM 0, implicit %1
  47
  48 ...
  49
  50 ---
  51 name:  ptrmask_p3_s32_sgpr_sgpr_0xffffffff
  52 legalized:       true
  53 regBankSelected: true
  54
  55 body: |
  56   bb.0:
  57     liveins: $sgpr0
  58
  59     ; CHECK-LABEL: name: ptrmask_p3_s32_sgpr_sgpr_0xffffffff
  60     ; CHECK: liveins: $sgpr0
  61     ; CHECK-NEXT: {{  $}}
  62     ; CHECK-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
  63     ; CHECK-NEXT: %const:sreg_32 = S_MOV_B32 -1
  64     ; CHECK-NEXT: [[S_AND_B32_:%[0-9]+]]:sreg_32 = S_AND_B32 [[COPY]], %const, implicit-def dead $scc
  65     ; CHECK-NEXT: S_ENDPGM 0, implicit [[S_AND_B32_]]
  66     %0:sgpr(p3) = COPY $sgpr0
  67     %const:sgpr(s32) = G_CONSTANT i32 -1
  68     %1:sgpr(p3) = G_PTRMASK %0, %const
  69     S_ENDPGM 0, implicit %1
  70
  71 ...
  72
  73 ---
  74 name:  ptrmask_p3_s32_sgpr_sgpr_0x00000000
  75 legalized:       true
  76 regBankSelected: true
  77
  78 body: |
  79   bb.0:
  80     liveins: $sgpr0
  81
  82     ; CHECK-LABEL: name: ptrmask_p3_s32_sgpr_sgpr_0x00000000
  83     ; CHECK: liveins: $sgpr0
  84     ; CHECK-NEXT: {{  $}}
  85     ; CHECK-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
  86     ; CHECK-NEXT: %const:sreg_32 = S_MOV_B32 0
  87     ; CHECK-NEXT: [[S_AND_B32_:%[0-9]+]]:sreg_32 = S_AND_B32 [[COPY]], %const, implicit-def dead $scc
  88     ; CHECK-NEXT: S_ENDPGM 0, implicit [[S_AND_B32_]]
  89     %0:sgpr(p3) = COPY $sgpr0
  90     %const:sgpr(s32) = G_CONSTANT i32 0
  91     %1:sgpr(p3) = G_PTRMASK %0, %const
  92     S_ENDPGM 0, implicit %1
  93
  94 ...
  95
  96 ---
  97 name:  ptrmask_p3_s32_sgpr_sgpr_clearhi1
  98 legalized:       true
  99 regBankSelected: true
 100
 101 body: |
 102   bb.0:
 103     liveins: $sgpr0
 104
 105     ; CHECK-LABEL: name: ptrmask_p3_s32_sgpr_sgpr_clearhi1
 106     ; CHECK: liveins: $sgpr0
 107     ; CHECK-NEXT: {{  $}}
 108     ; CHECK-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
 109     ; CHECK-NEXT: %const:sreg_32 = S_MOV_B32 -2147483648
 110     ; CHECK-NEXT: [[S_AND_B32_:%[0-9]+]]:sreg_32 = S_AND_B32 [[COPY]], %const, implicit-def dead $scc
 111     ; CHECK-NEXT: S_ENDPGM 0, implicit [[S_AND_B32_]]
 112     %0:sgpr(p3) = COPY $sgpr0
 113     %const:sgpr(s32) = G_CONSTANT i32  -2147483648
 114     %1:sgpr(p3) = G_PTRMASK %0, %const
 115     S_ENDPGM 0, implicit %1
 116
 117 ...
 118
 119 ---
 120 name:  ptrmask_p3_s32_sgpr_sgpr_clearhi2
 121 legalized:       true
 122 regBankSelected: true
 123
 124 body: |
 125   bb.0:
 126     liveins: $sgpr0
 127
 128     ; CHECK-LABEL: name: ptrmask_p3_s32_sgpr_sgpr_clearhi2
 129     ; CHECK: liveins: $sgpr0
 130     ; CHECK-NEXT: {{  $}}
 131     ; CHECK-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
 132     ; CHECK-NEXT: %const:sreg_32 = S_MOV_B32 -1073741824
 133     ; CHECK-NEXT: [[S_AND_B32_:%[0-9]+]]:sreg_32 = S_AND_B32 [[COPY]], %const, implicit-def dead $scc
 134     ; CHECK-NEXT: S_ENDPGM 0, implicit [[S_AND_B32_]]
 135     %0:sgpr(p3) = COPY $sgpr0
 136     %const:sgpr(s32) = G_CONSTANT i32  -1073741824
 137     %1:sgpr(p3) = G_PTRMASK %0, %const
 138     S_ENDPGM 0, implicit %1
 139
 140 ...
 141
 142 ---
 143 name:  ptrmask_p3_s32_sgpr_sgpr_clearlo1
 144 legalized:       true
 145 regBankSelected: true
 146
 147 body: |
 148   bb.0:
 149     liveins: $sgpr0
 150
 151     ; CHECK-LABEL: name: ptrmask_p3_s32_sgpr_sgpr_clearlo1
 152     ; CHECK: liveins: $sgpr0
 153     ; CHECK-NEXT: {{  $}}
 154     ; CHECK-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
 155     ; CHECK-NEXT: %const:sreg_32 = S_MOV_B32 -2
 156     ; CHECK-NEXT: [[S_AND_B32_:%[0-9]+]]:sreg_32 = S_AND_B32 [[COPY]], %const, implicit-def dead $scc
 157     ; CHECK-NEXT: S_ENDPGM 0, implicit [[S_AND_B32_]]
 158     %0:sgpr(p3) = COPY $sgpr0
 159     %const:sgpr(s32) = G_CONSTANT i32 -2
 160     %1:sgpr(p3) = G_PTRMASK %0, %const
 161     S_ENDPGM 0, implicit %1
 162
 163 ...
 164
 165 ---
 166 name:  ptrmask_p3_s32_sgpr_sgpr_clearlo2
 167 legalized:       true
 168 regBankSelected: true
 169
 170 body: |
 171   bb.0:
 172     liveins: $sgpr0
 173
 174     ; CHECK-LABEL: name: ptrmask_p3_s32_sgpr_sgpr_clearlo2
 175     ; CHECK: liveins: $sgpr0
 176     ; CHECK-NEXT: {{  $}}
 177     ; CHECK-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
 178     ; CHECK-NEXT: %const:sreg_32 = S_MOV_B32 -4
 179     ; CHECK-NEXT: [[S_AND_B32_:%[0-9]+]]:sreg_32 = S_AND_B32 [[COPY]], %const, implicit-def dead $scc
 180     ; CHECK-NEXT: S_ENDPGM 0, implicit [[S_AND_B32_]]
 181     %0:sgpr(p3) = COPY $sgpr0
 182     %const:sgpr(s32) = G_CONSTANT i32 -4
 183     %1:sgpr(p3) = G_PTRMASK %0, %const
 184     S_ENDPGM 0, implicit %1
 185
 186 ...
 187
 188 ---
 189 name:  ptrmask_p3_s32_sgpr_sgpr_clearlo3
 190 legalized:       true
 191 regBankSelected: true
 192
 193 body: |
 194   bb.0:
 195     liveins: $sgpr0
 196
 197     ; CHECK-LABEL: name: ptrmask_p3_s32_sgpr_sgpr_clearlo3
 198     ; CHECK: liveins: $sgpr0
 199     ; CHECK-NEXT: {{  $}}
 200     ; CHECK-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
 201     ; CHECK-NEXT: %const:sreg_32 = S_MOV_B32 -8
 202     ; CHECK-NEXT: [[S_AND_B32_:%[0-9]+]]:sreg_32 = S_AND_B32 [[COPY]], %const, implicit-def dead $scc
 203     ; CHECK-NEXT: S_ENDPGM 0, implicit [[S_AND_B32_]]
 204     %0:sgpr(p3) = COPY $sgpr0
 205     %const:sgpr(s32) = G_CONSTANT i32 -8
 206     %1:sgpr(p3) = G_PTRMASK %0, %const
 207     S_ENDPGM 0, implicit %1
 208
 209 ...
 210
 211 ---
 212 name:  ptrmask_p3_s32_sgpr_sgpr_clearlo4
 213 legalized:       true
 214 regBankSelected: true
 215
 216 body: |
 217   bb.0:
 218     liveins: $sgpr0
 219
 220     ; CHECK-LABEL: name: ptrmask_p3_s32_sgpr_sgpr_clearlo4
 221     ; CHECK: liveins: $sgpr0
 222     ; CHECK-NEXT: {{  $}}
 223     ; CHECK-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
 224     ; CHECK-NEXT: %const:sreg_32 = S_MOV_B32 -16
 225     ; CHECK-NEXT: [[S_AND_B32_:%[0-9]+]]:sreg_32 = S_AND_B32 [[COPY]], %const, implicit-def dead $scc
 226     ; CHECK-NEXT: S_ENDPGM 0, implicit [[S_AND_B32_]]
 227     %0:sgpr(p3) = COPY $sgpr0
 228     %const:sgpr(s32) = G_CONSTANT i32 -16
 229     %1:sgpr(p3) = G_PTRMASK %0, %const
 230     S_ENDPGM 0, implicit %1
 231
 232 ...
 233
 234 ---
 235 name:  ptrmask_p3_s32_sgpr_sgpr_clearlo29
 236 legalized:       true
 237 regBankSelected: true
 238
 239 body: |
 240   bb.0:
 241     liveins: $sgpr0
 242
 243     ; CHECK-LABEL: name: ptrmask_p3_s32_sgpr_sgpr_clearlo29
 244     ; CHECK: liveins: $sgpr0
 245     ; CHECK-NEXT: {{  $}}
 246     ; CHECK-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
 247     ; CHECK-NEXT: %const:sreg_32 = S_MOV_B32 -536870912
 248     ; CHECK-NEXT: [[S_AND_B32_:%[0-9]+]]:sreg_32 = S_AND_B32 [[COPY]], %const, implicit-def dead $scc
 249     ; CHECK-NEXT: S_ENDPGM 0, implicit [[S_AND_B32_]]
 250     %0:sgpr(p3) = COPY $sgpr0
 251     %const:sgpr(s32) = G_CONSTANT i32 -536870912
 252     %1:sgpr(p3) = G_PTRMASK %0, %const
 253     S_ENDPGM 0, implicit %1
 254
 255 ...
 256
 257 ---
 258 name:  ptrmask_p0_s64_sgpr_sgpr_sgpr
 259 legalized:       true
 260 regBankSelected: true
 261
 262 body: |
 263   bb.0:
 264     liveins: $sgpr0_sgpr1, $sgpr2_sgpr3
 265
 266     ; CHECK-LABEL: name: ptrmask_p0_s64_sgpr_sgpr_sgpr
 267     ; CHECK: liveins: $sgpr0_sgpr1, $sgpr2_sgpr3
 268     ; CHECK-NEXT: {{  $}}
 269     ; CHECK-NEXT: [[COPY:%[0-9]+]]:sreg_64 = COPY $sgpr0_sgpr1
 270     ; CHECK-NEXT: [[COPY1:%[0-9]+]]:sreg_64 = COPY $sgpr2_sgpr3
 271     ; CHECK-NEXT: [[S_AND_B64_:%[0-9]+]]:sreg_64 = S_AND_B64 [[COPY]], [[COPY1]], implicit-def dead $scc
 272     ; CHECK-NEXT: S_ENDPGM 0, implicit [[S_AND_B64_]]
 273     %0:sgpr(p0) = COPY $sgpr0_sgpr1
 274     %1:sgpr(s64) = COPY $sgpr2_sgpr3
 275     %2:sgpr(p0) = G_PTRMASK %0, %1
 276     S_ENDPGM 0, implicit %2
 277
 278 ...
 279
 280 ---
 281 name:  ptrmask_p0_s64_sgpr_sgpr_sgpr_0xffffffffffffffff
 282 legalized:       true
 283 regBankSelected: true
 284
 285 body: |
 286   bb.0:
 287     liveins: $sgpr0_sgpr1
 288
 289     ; CHECK-LABEL: name: ptrmask_p0_s64_sgpr_sgpr_sgpr_0xffffffffffffffff
 290     ; CHECK: liveins: $sgpr0_sgpr1
 291     ; CHECK-NEXT: {{  $}}
 292     ; CHECK-NEXT: [[COPY:%[0-9]+]]:sreg_64 = COPY $sgpr0_sgpr1
 293     ; CHECK-NEXT: [[COPY1:%[0-9]+]]:sreg_32 = COPY [[COPY]].sub0
 294     ; CHECK-NEXT: [[COPY2:%[0-9]+]]:sreg_32 = COPY [[COPY]].sub1
 295     ; CHECK-NEXT: [[REG_SEQUENCE:%[0-9]+]]:sreg_64 = REG_SEQUENCE [[COPY1]], %subreg.sub0, [[COPY2]], %subreg.sub1
 296     ; CHECK-NEXT: S_ENDPGM 0, implicit [[REG_SEQUENCE]]
 297     %0:sgpr(p0) = COPY $sgpr0_sgpr1
 298     %1:sgpr(s64) = G_CONSTANT i64 -1
 299     %2:sgpr(p0) = G_PTRMASK %0, %1
 300     S_ENDPGM 0, implicit %2
 301
 302 ...
 303
 304 ---
 305 name:  ptrmask_p0_s64_sgpr_sgpr_sgpr_0x0000000000000000
 306 legalized:       true
 307 regBankSelected: true
 308
 309 body: |
 310   bb.0:
 311     liveins: $sgpr0_sgpr1
 312
 313     ; CHECK-LABEL: name: ptrmask_p0_s64_sgpr_sgpr_sgpr_0x0000000000000000
 314     ; CHECK: liveins: $sgpr0_sgpr1
 315     ; CHECK-NEXT: {{  $}}
 316     ; CHECK-NEXT: [[COPY:%[0-9]+]]:sreg_64 = COPY $sgpr0_sgpr1
 317     ; CHECK-NEXT: [[S_MOV_B64_:%[0-9]+]]:sreg_64 = S_MOV_B64 0
 318     ; CHECK-NEXT: [[S_AND_B64_:%[0-9]+]]:sreg_64 = S_AND_B64 [[COPY]], [[S_MOV_B64_]], implicit-def dead $scc
 319     ; CHECK-NEXT: S_ENDPGM 0, implicit [[S_AND_B64_]]
 320     %0:sgpr(p0) = COPY $sgpr0_sgpr1
 321     %1:sgpr(s64) = G_CONSTANT i64 0
 322     %2:sgpr(p0) = G_PTRMASK %0, %1
 323     S_ENDPGM 0, implicit %2
 324
 325 ...
 326
 327 ---
 328 name:  ptrmask_p0_s64_sgpr_sgpr_sgpr_0xf0f0f0f0f0f0f0f0
 329 legalized:       true
 330 regBankSelected: true
 331
 332 body: |
 333   bb.0:
 334     liveins: $sgpr0_sgpr1
 335
 336     ; CHECK-LABEL: name: ptrmask_p0_s64_sgpr_sgpr_sgpr_0xf0f0f0f0f0f0f0f0
 337     ; CHECK: liveins: $sgpr0_sgpr1
 338     ; CHECK-NEXT: {{  $}}
 339     ; CHECK-NEXT: [[COPY:%[0-9]+]]:sreg_64 = COPY $sgpr0_sgpr1
 340     ; CHECK-NEXT: [[S_MOV_B:%[0-9]+]]:sreg_64 = S_MOV_B64_IMM_PSEUDO -1085102592571150096
 341     ; CHECK-NEXT: [[S_AND_B64_:%[0-9]+]]:sreg_64 = S_AND_B64 [[COPY]], [[S_MOV_B]], implicit-def dead $scc
 342     ; CHECK-NEXT: S_ENDPGM 0, implicit [[S_AND_B64_]]
 343     %0:sgpr(p0) = COPY $sgpr0_sgpr1
 344     %1:sgpr(s64) = G_CONSTANT i64 -1085102592571150096
 345     %2:sgpr(p0) = G_PTRMASK %0, %1
 346     S_ENDPGM 0, implicit %2
 347
 348 ...
 349
 350 ---
 351 name:  ptrmask_p0_s64_sgpr_sgpr_clearhi1
 352 legalized:       true
 353 regBankSelected: true
 354
 355 body: |
 356   bb.0:
 357     liveins: $sgpr0_sgpr1
 358
 359     ; CHECK-LABEL: name: ptrmask_p0_s64_sgpr_sgpr_clearhi1
 360     ; CHECK: liveins: $sgpr0_sgpr1
 361     ; CHECK-NEXT: {{  $}}
 362     ; CHECK-NEXT: [[COPY:%[0-9]+]]:sreg_64 = COPY $sgpr0_sgpr1
 363     ; CHECK-NEXT: %const:sreg_64 = S_MOV_B64_IMM_PSEUDO -9223372036854775808
 364     ; CHECK-NEXT: [[S_AND_B64_:%[0-9]+]]:sreg_64 = S_AND_B64 [[COPY]], %const, implicit-def dead $scc
 365     ; CHECK-NEXT: S_ENDPGM 0, implicit [[S_AND_B64_]]
 366     %0:sgpr(p0) = COPY $sgpr0_sgpr1
 367     %const:sgpr(s64) = G_CONSTANT i64 -9223372036854775808
 368     %1:sgpr(p0) = G_PTRMASK %0, %const
 369     S_ENDPGM 0, implicit %1
 370
 371 ...
 372
 373 ---
 374 name:  ptrmask_p0_s64_sgpr_sgpr_clearhi32
 375 legalized:       true
 376 regBankSelected: true
 377
 378 body: |
 379   bb.0:
 380     liveins: $sgpr0_sgpr1
 381
 382     ; CHECK-LABEL: name: ptrmask_p0_s64_sgpr_sgpr_clearhi32
 383     ; CHECK: liveins: $sgpr0_sgpr1
 384     ; CHECK-NEXT: {{  $}}
 385     ; CHECK-NEXT: [[COPY:%[0-9]+]]:sreg_64 = COPY $sgpr0_sgpr1
 386     ; CHECK-NEXT: %const:sreg_64 = S_MOV_B64_IMM_PSEUDO -4294967296
 387     ; CHECK-NEXT: [[COPY1:%[0-9]+]]:sreg_32 = COPY [[COPY]].sub0
 388     ; CHECK-NEXT: [[COPY2:%[0-9]+]]:sreg_32 = COPY [[COPY]].sub1
 389     ; CHECK-NEXT: [[COPY3:%[0-9]+]]:sreg_32 = COPY %const.sub0
 390     ; CHECK-NEXT: [[S_AND_B32_:%[0-9]+]]:sreg_32 = S_AND_B32 [[COPY1]], [[COPY3]], implicit-def $scc
 391     ; CHECK-NEXT: [[REG_SEQUENCE:%[0-9]+]]:sreg_64 = REG_SEQUENCE [[S_AND_B32_]], %subreg.sub0, [[COPY2]], %subreg.sub1
 392     ; CHECK-NEXT: S_ENDPGM 0, implicit [[REG_SEQUENCE]]
 393     %0:sgpr(p0) = COPY $sgpr0_sgpr1
 394     %const:sgpr(s64) = G_CONSTANT i64 -4294967296
 395     %1:sgpr(p0) = G_PTRMASK %0, %const
 396     S_ENDPGM 0, implicit %1
 397
 398 ...
 399
 400 ---
 401 name:  ptrmask_p0_s64_sgpr_sgpr_clear_32
 402 legalized:       true
 403 regBankSelected: true
 404
 405 body: |
 406   bb.0:
 407     liveins: $sgpr0_sgpr1
 408
 409     ; CHECK-LABEL: name: ptrmask_p0_s64_sgpr_sgpr_clear_32
 410     ; CHECK: liveins: $sgpr0_sgpr1
 411     ; CHECK-NEXT: {{  $}}
 412     ; CHECK-NEXT: [[COPY:%[0-9]+]]:sreg_64 = COPY $sgpr0_sgpr1
 413     ; CHECK-NEXT: %const:sreg_64 = S_MOV_B64_IMM_PSEUDO 4294967296
 414     ; CHECK-NEXT: [[S_AND_B64_:%[0-9]+]]:sreg_64 = S_AND_B64 [[COPY]], %const, implicit-def dead $scc
 415     ; CHECK-NEXT: S_ENDPGM 0, implicit [[S_AND_B64_]]
 416     %0:sgpr(p0) = COPY $sgpr0_sgpr1
 417     %const:sgpr(s64) = G_CONSTANT i64 4294967296
 418     %1:sgpr(p0) = G_PTRMASK %0, %const
 419     S_ENDPGM 0, implicit %1
 420
 421 ...
 422
 423 ---
 424 name:  ptrmask_p0_s64_sgpr_sgpr_clearlo1
 425 legalized:       true
 426 regBankSelected: true
 427
 428 body: |
 429   bb.0:
 430     liveins: $sgpr0_sgpr1
 431
 432     ; CHECK-LABEL: name: ptrmask_p0_s64_sgpr_sgpr_clearlo1
 433     ; CHECK: liveins: $sgpr0_sgpr1
 434     ; CHECK-NEXT: {{  $}}
 435     ; CHECK-NEXT: [[COPY:%[0-9]+]]:sreg_64 = COPY $sgpr0_sgpr1
 436     ; CHECK-NEXT: %const:sreg_64 = S_MOV_B64 -2
 437     ; CHECK-NEXT: [[COPY1:%[0-9]+]]:sreg_32 = COPY [[COPY]].sub0
 438     ; CHECK-NEXT: [[COPY2:%[0-9]+]]:sreg_32 = COPY [[COPY]].sub1
 439     ; CHECK-NEXT: [[COPY3:%[0-9]+]]:sreg_32 = COPY %const.sub0
 440     ; CHECK-NEXT: [[S_AND_B32_:%[0-9]+]]:sreg_32 = S_AND_B32 [[COPY1]], [[COPY3]], implicit-def $scc
 441     ; CHECK-NEXT: [[REG_SEQUENCE:%[0-9]+]]:sreg_64 = REG_SEQUENCE [[S_AND_B32_]], %subreg.sub0, [[COPY2]], %subreg.sub1
 442     ; CHECK-NEXT: S_ENDPGM 0, implicit [[REG_SEQUENCE]]
 443     %0:sgpr(p0) = COPY $sgpr0_sgpr1
 444     %const:sgpr(s64) = G_CONSTANT i64 -2
 445     %1:sgpr(p0) = G_PTRMASK %0, %const
 446     S_ENDPGM 0, implicit %1
 447
 448 ...
 449
 450 ---
 451 name:  ptrmask_p0_s64_sgpr_sgpr_clearlo2
 452 legalized:       true
 453 regBankSelected: true
 454
 455 body: |
 456   bb.0:
 457     liveins: $sgpr0_sgpr1
 458
 459     ; CHECK-LABEL: name: ptrmask_p0_s64_sgpr_sgpr_clearlo2
 460     ; CHECK: liveins: $sgpr0_sgpr1
 461     ; CHECK-NEXT: {{  $}}
 462     ; CHECK-NEXT: [[COPY:%[0-9]+]]:sreg_64 = COPY $sgpr0_sgpr1
 463     ; CHECK-NEXT: %const:sreg_64 = S_MOV_B64 -4
 464     ; CHECK-NEXT: [[COPY1:%[0-9]+]]:sreg_32 = COPY [[COPY]].sub0
 465     ; CHECK-NEXT: [[COPY2:%[0-9]+]]:sreg_32 = COPY [[COPY]].sub1
 466     ; CHECK-NEXT: [[COPY3:%[0-9]+]]:sreg_32 = COPY %const.sub0
 467     ; CHECK-NEXT: [[S_AND_B32_:%[0-9]+]]:sreg_32 = S_AND_B32 [[COPY1]], [[COPY3]], implicit-def $scc
 468     ; CHECK-NEXT: [[REG_SEQUENCE:%[0-9]+]]:sreg_64 = REG_SEQUENCE [[S_AND_B32_]], %subreg.sub0, [[COPY2]], %subreg.sub1
 469     ; CHECK-NEXT: S_ENDPGM 0, implicit [[REG_SEQUENCE]]
 470     %0:sgpr(p0) = COPY $sgpr0_sgpr1
 471     %const:sgpr(s64) = G_CONSTANT i64 -4
 472     %1:sgpr(p0) = G_PTRMASK %0, %const
 473     S_ENDPGM 0, implicit %1
 474
 475 ...
 476
 477 ---
 478 name:  ptrmask_p0_s64_sgpr_sgpr_clearlo3
 479 legalized:       true
 480 regBankSelected: true
 481
 482 body: |
 483   bb.0:
 484     liveins: $sgpr0_sgpr1
 485
 486     ; CHECK-LABEL: name: ptrmask_p0_s64_sgpr_sgpr_clearlo3
 487     ; CHECK: liveins: $sgpr0_sgpr1
 488     ; CHECK-NEXT: {{  $}}
 489     ; CHECK-NEXT: [[COPY:%[0-9]+]]:sreg_64 = COPY $sgpr0_sgpr1
 490     ; CHECK-NEXT: %const:sreg_64 = S_MOV_B64 -8
 491     ; CHECK-NEXT: [[COPY1:%[0-9]+]]:sreg_32 = COPY [[COPY]].sub0
 492     ; CHECK-NEXT: [[COPY2:%[0-9]+]]:sreg_32 = COPY [[COPY]].sub1
 493     ; CHECK-NEXT: [[COPY3:%[0-9]+]]:sreg_32 = COPY %const.sub0
 494     ; CHECK-NEXT: [[S_AND_B32_:%[0-9]+]]:sreg_32 = S_AND_B32 [[COPY1]], [[COPY3]], implicit-def $scc
 495     ; CHECK-NEXT: [[REG_SEQUENCE:%[0-9]+]]:sreg_64 = REG_SEQUENCE [[S_AND_B32_]], %subreg.sub0, [[COPY2]], %subreg.sub1
 496     ; CHECK-NEXT: S_ENDPGM 0, implicit [[REG_SEQUENCE]]
 497     %0:sgpr(p0) = COPY $sgpr0_sgpr1
 498     %const:sgpr(s64) = G_CONSTANT i64 -8
 499     %1:sgpr(p0) = G_PTRMASK %0, %const
 500     S_ENDPGM 0, implicit %1
 501
 502 ...
 503
 504 ---
 505 name:  ptrmask_p0_s64_sgpr_sgpr_clearlo4
 506 legalized:       true
 507 regBankSelected: true
 508
 509 body: |
 510   bb.0:
 511     liveins: $sgpr0_sgpr1
 512
 513     ; CHECK-LABEL: name: ptrmask_p0_s64_sgpr_sgpr_clearlo4
 514     ; CHECK: liveins: $sgpr0_sgpr1
 515     ; CHECK-NEXT: {{  $}}
 516     ; CHECK-NEXT: [[COPY:%[0-9]+]]:sreg_64 = COPY $sgpr0_sgpr1
 517     ; CHECK-NEXT: %const:sreg_64 = S_MOV_B64 -16
 518     ; CHECK-NEXT: [[COPY1:%[0-9]+]]:sreg_32 = COPY [[COPY]].sub0
 519     ; CHECK-NEXT: [[COPY2:%[0-9]+]]:sreg_32 = COPY [[COPY]].sub1
 520     ; CHECK-NEXT: [[COPY3:%[0-9]+]]:sreg_32 = COPY %const.sub0
 521     ; CHECK-NEXT: [[S_AND_B32_:%[0-9]+]]:sreg_32 = S_AND_B32 [[COPY1]], [[COPY3]], implicit-def $scc
 522     ; CHECK-NEXT: [[REG_SEQUENCE:%[0-9]+]]:sreg_64 = REG_SEQUENCE [[S_AND_B32_]], %subreg.sub0, [[COPY2]], %subreg.sub1
 523     ; CHECK-NEXT: S_ENDPGM 0, implicit [[REG_SEQUENCE]]
 524     %0:sgpr(p0) = COPY $sgpr0_sgpr1
 525     %const:sgpr(s64) = G_CONSTANT i64 -16
 526     %1:sgpr(p0) = G_PTRMASK %0, %const
 527     S_ENDPGM 0, implicit %1
 528
 529 ...
 530
 531 ---
 532 name:  ptrmask_p0_s64_sgpr_sgpr_clearlo29
 533 legalized:       true
 534 regBankSelected: true
 535
 536 body: |
 537   bb.0:
 538     liveins: $sgpr0_sgpr1
 539
 540     ; CHECK-LABEL: name: ptrmask_p0_s64_sgpr_sgpr_clearlo29
 541     ; CHECK: liveins: $sgpr0_sgpr1
 542     ; CHECK-NEXT: {{  $}}
 543     ; CHECK-NEXT: [[COPY:%[0-9]+]]:sreg_64 = COPY $sgpr0_sgpr1
 544     ; CHECK-NEXT: %const:sreg_64 = S_MOV_B64_IMM_PSEUDO -536870912
 545     ; CHECK-NEXT: [[COPY1:%[0-9]+]]:sreg_32 = COPY [[COPY]].sub0
 546     ; CHECK-NEXT: [[COPY2:%[0-9]+]]:sreg_32 = COPY [[COPY]].sub1
 547     ; CHECK-NEXT: [[COPY3:%[0-9]+]]:sreg_32 = COPY %const.sub0
 548     ; CHECK-NEXT: [[S_AND_B32_:%[0-9]+]]:sreg_32 = S_AND_B32 [[COPY1]], [[COPY3]], implicit-def $scc
 549     ; CHECK-NEXT: [[REG_SEQUENCE:%[0-9]+]]:sreg_64 = REG_SEQUENCE [[S_AND_B32_]], %subreg.sub0, [[COPY2]], %subreg.sub1
 550     ; CHECK-NEXT: S_ENDPGM 0, implicit [[REG_SEQUENCE]]
 551     %0:sgpr(p0) = COPY $sgpr0_sgpr1
 552     %const:sgpr(s64) = G_CONSTANT i64 -536870912
 553     %1:sgpr(p0) = G_PTRMASK %0, %const
 554     S_ENDPGM 0, implicit %1
 555
 556 ...
 557
 558 ---
 559 name:  ptrmask_p3_vgpr_vgpr_0xf0f0f0f0
 560 legalized:       true
 561 regBankSelected: true
 562
 563 body: |
 564   bb.0:
 565     liveins: $vgpr0
 566
 567     ; CHECK-LABEL: name: ptrmask_p3_vgpr_vgpr_0xf0f0f0f0
 568     ; CHECK: liveins: $vgpr0
 569     ; CHECK-NEXT: {{  $}}
 570     ; CHECK-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
 571     ; CHECK-NEXT: %const:vgpr_32 = V_MOV_B32_e32 -252645136, implicit $exec
 572     ; CHECK-NEXT: [[V_AND_B32_e64_:%[0-9]+]]:vgpr_32 = V_AND_B32_e64 [[COPY]], %const, implicit $exec
 573     ; CHECK-NEXT: S_ENDPGM 0, implicit [[V_AND_B32_e64_]]
 574     %0:vgpr(p3) = COPY $vgpr0
 575     %const:vgpr(s32) = G_CONSTANT i32 -252645136
 576     %1:vgpr(p3) = G_PTRMASK %0, %const
 577     S_ENDPGM 0, implicit %1
 578
 579 ...
 580
 581 ---
 582 name:  ptrmask_p3_vgpr_vgpr_clearlo1
 583 legalized:       true
 584 regBankSelected: true
 585
 586 body: |
 587   bb.0:
 588     liveins: $vgpr0
 589
 590     ; CHECK-LABEL: name: ptrmask_p3_vgpr_vgpr_clearlo1
 591     ; CHECK: liveins: $vgpr0
 592     ; CHECK-NEXT: {{  $}}
 593     ; CHECK-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
 594     ; CHECK-NEXT: %const:vgpr_32 = V_MOV_B32_e32 -2, implicit $exec
 595     ; CHECK-NEXT: [[V_AND_B32_e64_:%[0-9]+]]:vgpr_32 = V_AND_B32_e64 [[COPY]], %const, implicit $exec
 596     ; CHECK-NEXT: S_ENDPGM 0, implicit [[V_AND_B32_e64_]]
 597     %0:vgpr(p3) = COPY $vgpr0
 598     %const:vgpr(s32) = G_CONSTANT i32 -2
 599     %1:vgpr(p3) = G_PTRMASK %0, %const
 600     S_ENDPGM 0, implicit %1
 601
 602 ...
 603
 604 ---
 605 name:  ptrmask_p3_vgpr_vgpr_clearlo2
 606 legalized:       true
 607 regBankSelected: true
 608
 609 body: |
 610   bb.0:
 611     liveins: $vgpr0
 612
 613     ; CHECK-LABEL: name: ptrmask_p3_vgpr_vgpr_clearlo2
 614     ; CHECK: liveins: $vgpr0
 615     ; CHECK-NEXT: {{  $}}
 616     ; CHECK-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
 617     ; CHECK-NEXT: %const:vgpr_32 = V_MOV_B32_e32 -4, implicit $exec
 618     ; CHECK-NEXT: [[V_AND_B32_e64_:%[0-9]+]]:vgpr_32 = V_AND_B32_e64 [[COPY]], %const, implicit $exec
 619     ; CHECK-NEXT: S_ENDPGM 0, implicit [[V_AND_B32_e64_]]
 620     %0:vgpr(p3) = COPY $vgpr0
 621     %const:vgpr(s32) = G_CONSTANT i32 -4
 622     %1:vgpr(p3) = G_PTRMASK %0, %const
 623     S_ENDPGM 0, implicit %1
 624
 625 ...
 626
 627 ---
 628 name:  ptrmask_p3_vgpr_vgpr_clearlo3
 629 legalized:       true
 630 regBankSelected: true
 631
 632 body: |
 633   bb.0:
 634     liveins: $vgpr0
 635
 636     ; CHECK-LABEL: name: ptrmask_p3_vgpr_vgpr_clearlo3
 637     ; CHECK: liveins: $vgpr0
 638     ; CHECK-NEXT: {{  $}}
 639     ; CHECK-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
 640     ; CHECK-NEXT: %const:vgpr_32 = V_MOV_B32_e32 -8, implicit $exec
 641     ; CHECK-NEXT: [[V_AND_B32_e64_:%[0-9]+]]:vgpr_32 = V_AND_B32_e64 [[COPY]], %const, implicit $exec
 642     ; CHECK-NEXT: S_ENDPGM 0, implicit [[V_AND_B32_e64_]]
 643     %0:vgpr(p3) = COPY $vgpr0
 644     %const:vgpr(s32) = G_CONSTANT i32 -8
 645     %1:vgpr(p3) = G_PTRMASK %0, %const
 646     S_ENDPGM 0, implicit %1
 647
 648 ...
 649
 650 ---
 651 name:  ptrmask_p3_vgpr_vgpr_clearlo4
 652 legalized:       true
 653 regBankSelected: true
 654
 655 body: |
 656   bb.0:
 657     liveins: $vgpr0
 658
 659     ; CHECK-LABEL: name: ptrmask_p3_vgpr_vgpr_clearlo4
 660     ; CHECK: liveins: $vgpr0
 661     ; CHECK-NEXT: {{  $}}
 662     ; CHECK-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
 663     ; CHECK-NEXT: %const:vgpr_32 = V_MOV_B32_e32 -16, implicit $exec
 664     ; CHECK-NEXT: [[V_AND_B32_e64_:%[0-9]+]]:vgpr_32 = V_AND_B32_e64 [[COPY]], %const, implicit $exec
 665     ; CHECK-NEXT: S_ENDPGM 0, implicit [[V_AND_B32_e64_]]
 666     %0:vgpr(p3) = COPY $vgpr0
 667     %const:vgpr(s32) = G_CONSTANT i32 -16
 668     %1:vgpr(p3) = G_PTRMASK %0, %const
 669     S_ENDPGM 0, implicit %1
 670
 671 ...
 672
 673 ---
 674 name:  ptrmask_p3_vgpr_vgpr_clearlo29
 675 legalized:       true
 676 regBankSelected: true
 677
 678 body: |
 679   bb.0:
 680     liveins: $vgpr0
 681
 682     ; CHECK-LABEL: name: ptrmask_p3_vgpr_vgpr_clearlo29
 683     ; CHECK: liveins: $vgpr0
 684     ; CHECK-NEXT: {{  $}}
 685     ; CHECK-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
 686     ; CHECK-NEXT: %const:vgpr_32 = V_MOV_B32_e32 -536870912, implicit $exec
 687     ; CHECK-NEXT: [[V_AND_B32_e64_:%[0-9]+]]:vgpr_32 = V_AND_B32_e64 [[COPY]], %const, implicit $exec
 688     ; CHECK-NEXT: S_ENDPGM 0, implicit [[V_AND_B32_e64_]]
 689     %0:vgpr(p3) = COPY $vgpr0
 690     %const:vgpr(s32) = G_CONSTANT i32 -536870912
 691     %1:vgpr(p3) = G_PTRMASK %0, %const
 692     S_ENDPGM 0, implicit %1
 693
 694 ...
 695
 696 ---
 697 name:  ptrmask_p0_s64_vgpr_vgpr_vgpr
 698 legalized:       true
 699 regBankSelected: true
 700
 701 body: |
 702   bb.0:
 703     liveins: $vgpr0_vgpr1, $vgpr2_vgpr3
 704
 705     ; CHECK-LABEL: name: ptrmask_p0_s64_vgpr_vgpr_vgpr
 706     ; CHECK: liveins: $vgpr0_vgpr1, $vgpr2_vgpr3
 707     ; CHECK-NEXT: {{  $}}
 708     ; CHECK-NEXT: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
 709     ; CHECK-NEXT: [[COPY1:%[0-9]+]]:vreg_64 = COPY $vgpr2_vgpr3
 710     ; CHECK-NEXT: [[COPY2:%[0-9]+]]:vgpr_32 = COPY [[COPY]].sub0
 711     ; CHECK-NEXT: [[COPY3:%[0-9]+]]:vgpr_32 = COPY [[COPY]].sub1
 712     ; CHECK-NEXT: [[COPY4:%[0-9]+]]:vgpr_32 = COPY [[COPY1]].sub0
 713     ; CHECK-NEXT: [[V_AND_B32_e64_:%[0-9]+]]:vgpr_32 = V_AND_B32_e64 [[COPY2]], [[COPY4]], implicit $exec
 714     ; CHECK-NEXT: [[COPY5:%[0-9]+]]:vgpr_32 = COPY [[COPY1]].sub1
 715     ; CHECK-NEXT: [[V_AND_B32_e64_1:%[0-9]+]]:vgpr_32 = V_AND_B32_e64 [[COPY3]], [[COPY5]], implicit $exec
 716     ; CHECK-NEXT: [[REG_SEQUENCE:%[0-9]+]]:vreg_64 = REG_SEQUENCE [[V_AND_B32_e64_]], %subreg.sub0, [[V_AND_B32_e64_1]], %subreg.sub1
 717     ; CHECK-NEXT: S_ENDPGM 0, implicit [[REG_SEQUENCE]]
 718     %0:vgpr(p0) = COPY $vgpr0_vgpr1
 719     %1:vgpr(s64) = COPY $vgpr2_vgpr3
 720     %2:vgpr(p0) = G_PTRMASK %0, %1
 721     S_ENDPGM 0, implicit %2
 722
 723 ...
 724
 725 ---
 726 name:  ptrmask_p0_s64_vgpr_vgpr_vgpr_0xf0f0f0f0f0f0f0f0
 727 legalized:       true
 728 regBankSelected: true
 729
 730 body: |
 731   bb.0:
 732     liveins: $vgpr0_vgpr1
 733
 734     ; CHECK-LABEL: name: ptrmask_p0_s64_vgpr_vgpr_vgpr_0xf0f0f0f0f0f0f0f0
 735     ; CHECK: liveins: $vgpr0_vgpr1
 736     ; CHECK-NEXT: {{  $}}
 737     ; CHECK-NEXT: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
 738     ; CHECK-NEXT: [[V_MOV_B:%[0-9]+]]:vreg_64 = V_MOV_B64_PSEUDO -1085102592571150096, implicit $exec
 739     ; CHECK-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY [[COPY]].sub0
 740     ; CHECK-NEXT: [[COPY2:%[0-9]+]]:vgpr_32 = COPY [[COPY]].sub1
 741     ; CHECK-NEXT: [[COPY3:%[0-9]+]]:vgpr_32 = COPY [[V_MOV_B]].sub0
 742     ; CHECK-NEXT: [[V_AND_B32_e64_:%[0-9]+]]:vgpr_32 = V_AND_B32_e64 [[COPY1]], [[COPY3]], implicit $exec
 743     ; CHECK-NEXT: [[COPY4:%[0-9]+]]:vgpr_32 = COPY [[V_MOV_B]].sub1
 744     ; CHECK-NEXT: [[V_AND_B32_e64_1:%[0-9]+]]:vgpr_32 = V_AND_B32_e64 [[COPY2]], [[COPY4]], implicit $exec
 745     ; CHECK-NEXT: [[REG_SEQUENCE:%[0-9]+]]:vreg_64 = REG_SEQUENCE [[V_AND_B32_e64_]], %subreg.sub0, [[V_AND_B32_e64_1]], %subreg.sub1
 746     ; CHECK-NEXT: S_ENDPGM 0, implicit [[REG_SEQUENCE]]
 747     %0:vgpr(p0) = COPY $vgpr0_vgpr1
 748     %1:vgpr(s64) = G_CONSTANT i64 -1085102592571150096
 749     %2:vgpr(p0) = G_PTRMASK %0, %1
 750     S_ENDPGM 0, implicit %2
 751
 752 ...
 753
 754 ---
 755 name:  ptrmask_p0_s64_vgpr_vgpr_clearlo1
 756 legalized:       true
 757 regBankSelected: true
 758
 759 body: |
 760   bb.0:
 761     liveins: $vgpr0_vgpr1
 762
 763     ; CHECK-LABEL: name: ptrmask_p0_s64_vgpr_vgpr_clearlo1
 764     ; CHECK: liveins: $vgpr0_vgpr1
 765     ; CHECK-NEXT: {{  $}}
 766     ; CHECK-NEXT: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
 767     ; CHECK-NEXT: %const:vreg_64 = V_MOV_B64_PSEUDO -2, implicit $exec
 768     ; CHECK-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY [[COPY]].sub0
 769     ; CHECK-NEXT: [[COPY2:%[0-9]+]]:vgpr_32 = COPY [[COPY]].sub1
 770     ; CHECK-NEXT: [[COPY3:%[0-9]+]]:vgpr_32 = COPY %const.sub0
 771     ; CHECK-NEXT: [[V_AND_B32_e64_:%[0-9]+]]:vgpr_32 = V_AND_B32_e64 [[COPY1]], [[COPY3]], implicit $exec
 772     ; CHECK-NEXT: [[REG_SEQUENCE:%[0-9]+]]:vreg_64 = REG_SEQUENCE [[V_AND_B32_e64_]], %subreg.sub0, [[COPY2]], %subreg.sub1
 773     ; CHECK-NEXT: S_ENDPGM 0, implicit [[REG_SEQUENCE]]
 774     %0:vgpr(p0) = COPY $vgpr0_vgpr1
 775     %const:vgpr(s64) = G_CONSTANT i64 -2
 776     %1:vgpr(p0) = G_PTRMASK %0, %const
 777     S_ENDPGM 0, implicit %1
 778
 779 ...
 780
 781 ---
 782 name:  ptrmask_p0_s64_vgpr_vgpr_clearlo2
 783 legalized:       true
 784 regBankSelected: true
 785
 786 body: |
 787   bb.0:
 788     liveins: $vgpr0_vgpr1
 789
 790     ; CHECK-LABEL: name: ptrmask_p0_s64_vgpr_vgpr_clearlo2
 791     ; CHECK: liveins: $vgpr0_vgpr1
 792     ; CHECK-NEXT: {{  $}}
 793     ; CHECK-NEXT: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
 794     ; CHECK-NEXT: %const:vreg_64 = V_MOV_B64_PSEUDO -4, implicit $exec
 795     ; CHECK-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY [[COPY]].sub0
 796     ; CHECK-NEXT: [[COPY2:%[0-9]+]]:vgpr_32 = COPY [[COPY]].sub1
 797     ; CHECK-NEXT: [[COPY3:%[0-9]+]]:vgpr_32 = COPY %const.sub0
 798     ; CHECK-NEXT: [[V_AND_B32_e64_:%[0-9]+]]:vgpr_32 = V_AND_B32_e64 [[COPY1]], [[COPY3]], implicit $exec
 799     ; CHECK-NEXT: [[REG_SEQUENCE:%[0-9]+]]:vreg_64 = REG_SEQUENCE [[V_AND_B32_e64_]], %subreg.sub0, [[COPY2]], %subreg.sub1
 800     ; CHECK-NEXT: S_ENDPGM 0, implicit [[REG_SEQUENCE]]
 801     %0:vgpr(p0) = COPY $vgpr0_vgpr1
 802     %const:vgpr(s64) = G_CONSTANT i64 -4
 803     %1:vgpr(p0) = G_PTRMASK %0, %const
 804     S_ENDPGM 0, implicit %1
 805
 806 ...
 807
 808 ---
 809 name:  ptrmask_p0_s64_vgpr_vgpr_clearlo3
 810 legalized:       true
 811 regBankSelected: true
 812
 813 body: |
 814   bb.0:
 815     liveins: $vgpr0_vgpr1
 816
 817     ; CHECK-LABEL: name: ptrmask_p0_s64_vgpr_vgpr_clearlo3
 818     ; CHECK: liveins: $vgpr0_vgpr1
 819     ; CHECK-NEXT: {{  $}}
 820     ; CHECK-NEXT: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
 821     ; CHECK-NEXT: %const:vreg_64 = V_MOV_B64_PSEUDO -4, implicit $exec
 822     ; CHECK-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY [[COPY]].sub0
 823     ; CHECK-NEXT: [[COPY2:%[0-9]+]]:vgpr_32 = COPY [[COPY]].sub1
 824     ; CHECK-NEXT: [[COPY3:%[0-9]+]]:vgpr_32 = COPY %const.sub0
 825     ; CHECK-NEXT: [[V_AND_B32_e64_:%[0-9]+]]:vgpr_32 = V_AND_B32_e64 [[COPY1]], [[COPY3]], implicit $exec
 826     ; CHECK-NEXT: [[REG_SEQUENCE:%[0-9]+]]:vreg_64 = REG_SEQUENCE [[V_AND_B32_e64_]], %subreg.sub0, [[COPY2]], %subreg.sub1
 827     ; CHECK-NEXT: S_ENDPGM 0, implicit [[REG_SEQUENCE]]
 828     %0:vgpr(p0) = COPY $vgpr0_vgpr1
 829     %const:vgpr(s64) = G_CONSTANT i64 -4
 830     %1:vgpr(p0) = G_PTRMASK %0, %const
 831     S_ENDPGM 0, implicit %1
 832
 833 ...
 834
 835 ---
 836 name:  ptrmask_p0_s64_vgpr_vgpr_clearlo4
 837 legalized:       true
 838 regBankSelected: true
 839
 840 body: |
 841   bb.0:
 842     liveins: $vgpr0_vgpr1
 843
 844     ; CHECK-LABEL: name: ptrmask_p0_s64_vgpr_vgpr_clearlo4
 845     ; CHECK: liveins: $vgpr0_vgpr1
 846     ; CHECK-NEXT: {{  $}}
 847     ; CHECK-NEXT: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
 848     ; CHECK-NEXT: %const:vreg_64 = V_MOV_B64_PSEUDO -16, implicit $exec
 849     ; CHECK-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY [[COPY]].sub0
 850     ; CHECK-NEXT: [[COPY2:%[0-9]+]]:vgpr_32 = COPY [[COPY]].sub1
 851     ; CHECK-NEXT: [[COPY3:%[0-9]+]]:vgpr_32 = COPY %const.sub0
 852     ; CHECK-NEXT: [[V_AND_B32_e64_:%[0-9]+]]:vgpr_32 = V_AND_B32_e64 [[COPY1]], [[COPY3]], implicit $exec
 853     ; CHECK-NEXT: [[REG_SEQUENCE:%[0-9]+]]:vreg_64 = REG_SEQUENCE [[V_AND_B32_e64_]], %subreg.sub0, [[COPY2]], %subreg.sub1
 854     ; CHECK-NEXT: S_ENDPGM 0, implicit [[REG_SEQUENCE]]
 855     %0:vgpr(p0) = COPY $vgpr0_vgpr1
 856     %const:vgpr(s64) = G_CONSTANT i64 -16
 857     %1:vgpr(p0) = G_PTRMASK %0, %const
 858     S_ENDPGM 0, implicit %1
 859
 860 ...
 861
 862 ---
 863 name:  ptrmask_p0_s64_vgpr_vgpr_clearlo29
 864 legalized:       true
 865 regBankSelected: true
 866
 867 body: |
 868   bb.0:
 869     liveins: $vgpr0_vgpr1
 870
 871     ; CHECK-LABEL: name: ptrmask_p0_s64_vgpr_vgpr_clearlo29
 872     ; CHECK: liveins: $vgpr0_vgpr1
 873     ; CHECK-NEXT: {{  $}}
 874     ; CHECK-NEXT: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
 875     ; CHECK-NEXT: %const:vreg_64 = V_MOV_B64_PSEUDO -536870912, implicit $exec
 876     ; CHECK-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY [[COPY]].sub0
 877     ; CHECK-NEXT: [[COPY2:%[0-9]+]]:vgpr_32 = COPY [[COPY]].sub1
 878     ; CHECK-NEXT: [[COPY3:%[0-9]+]]:vgpr_32 = COPY %const.sub0
 879     ; CHECK-NEXT: [[V_AND_B32_e64_:%[0-9]+]]:vgpr_32 = V_AND_B32_e64 [[COPY1]], [[COPY3]], implicit $exec
 880     ; CHECK-NEXT: [[REG_SEQUENCE:%[0-9]+]]:vreg_64 = REG_SEQUENCE [[V_AND_B32_e64_]], %subreg.sub0, [[COPY2]], %subreg.sub1
 881     ; CHECK-NEXT: S_ENDPGM 0, implicit [[REG_SEQUENCE]]
 882     %0:vgpr(p0) = COPY $vgpr0_vgpr1
 883     %const:vgpr(s64) = G_CONSTANT i64 -536870912
 884     %1:vgpr(p0) = G_PTRMASK %0, %const
 885     S_ENDPGM 0, implicit %1
 886
 887 ...
 888
 889 ---
 890 name:  ptrmask_p3_vgpr_sgpr_clearlo2
 891 legalized:       true
 892 regBankSelected: true
 893
 894 body: |
 895   bb.0:
 896     liveins: $sgpr0
 897
 898     ; CHECK-LABEL: name: ptrmask_p3_vgpr_sgpr_clearlo2
 899     ; CHECK: liveins: $sgpr0
 900     ; CHECK-NEXT: {{  $}}
 901     ; CHECK-NEXT: [[COPY:%[0-9]+]]:sgpr(p3) = COPY $sgpr0
 902     ; CHECK-NEXT: %const:sgpr(s32) = G_CONSTANT i32 -4
 903     ; CHECK-NEXT: [[PTRMASK:%[0-9]+]]:vgpr(p3) = G_PTRMASK [[COPY]], %const(s32)
 904     ; CHECK-NEXT: S_ENDPGM 0, implicit [[PTRMASK]](p3)
 905     %0:sgpr(p3) = COPY $sgpr0
 906     %const:sgpr(s32) = G_CONSTANT i32 -4
 907     %1:vgpr(p3) = G_PTRMASK %0, %const
 908     S_ENDPGM 0, implicit %1
 909
 910 ...
 911
 912 ---
 913 name:  ptrmask_p0_s64_vgpr_sgpr_clearlo2
 914 legalized:       true
 915 regBankSelected: true
 916
 917 body: |
 918   bb.0:
 919     liveins: $sgpr0_sgpr1
 920
 921     ; CHECK-LABEL: name: ptrmask_p0_s64_vgpr_sgpr_clearlo2
 922     ; CHECK: liveins: $sgpr0_sgpr1
 923     ; CHECK-NEXT: {{  $}}
 924     ; CHECK-NEXT: [[COPY:%[0-9]+]]:sgpr(p0) = COPY $sgpr0_sgpr1
 925     ; CHECK-NEXT: %const:sgpr(s32) = G_CONSTANT i32 -4
 926     ; CHECK-NEXT: [[PTRMASK:%[0-9]+]]:vgpr(p0) = G_PTRMASK [[COPY]], %const(s32)
 927     ; CHECK-NEXT: S_ENDPGM 0, implicit [[PTRMASK]](p0)
 928     %0:sgpr(p0) = COPY $sgpr0_sgpr1
 929     %const:sgpr(s32) = G_CONSTANT i32 -4
 930     %1:vgpr(p0) = G_PTRMASK %0, %const
 931     S_ENDPGM 0, implicit %1
 932
 933 ...