[MachineScheduler] Fix physreg dependencies of ExitSU (#123541)
[llvm-project.git] / llvm / test / CodeGen / AMDGPU / GlobalISel / inst-select-sext.mir
blob1de18cf17eb99a87837064bd60654944245ffabf
1 # NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
2 # RUN: llc -mtriple=amdgcn -run-pass=instruction-select -verify-machineinstrs -global-isel %s -o - | FileCheck %s -check-prefixes=GCN
4 ---
6 name: sext_sgpr_s1_to_sgpr_s16
7 legalized:       true
8 regBankSelected: true
9 body: |
10   bb.0:
11     liveins: $sgpr0
13     ; GCN-LABEL: name: sext_sgpr_s1_to_sgpr_s16
14     ; GCN: liveins: $sgpr0
15     ; GCN-NEXT: {{  $}}
16     ; GCN-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
17     ; GCN-NEXT: [[S_BFE_I32_:%[0-9]+]]:sreg_32 = S_BFE_I32 [[COPY]], 65536, implicit-def $scc
18     ; GCN-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 65535
19     ; GCN-NEXT: [[S_AND_B32_:%[0-9]+]]:sreg_32 = S_AND_B32 [[S_MOV_B32_]], [[S_BFE_I32_]], implicit-def dead $scc
20     ; GCN-NEXT: $sgpr0 = COPY [[S_AND_B32_]]
21     %0:sgpr(s32) = COPY $sgpr0
22     %1:sgpr(s1) = G_TRUNC %0
23     %2:sgpr(s16) = G_SEXT %1
24     %3:sgpr(s32) = G_ZEXT %2
25     $sgpr0 = COPY %3
26 ...
28 ---
30 name: sext_sgpr_s1_to_sgpr_s32
31 legalized:       true
32 regBankSelected: true
33 body: |
34   bb.0:
35     liveins: $sgpr0
37     ; GCN-LABEL: name: sext_sgpr_s1_to_sgpr_s32
38     ; GCN: liveins: $sgpr0
39     ; GCN-NEXT: {{  $}}
40     ; GCN-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
41     ; GCN-NEXT: [[S_BFE_I32_:%[0-9]+]]:sreg_32 = S_BFE_I32 [[COPY]], 65536, implicit-def $scc
42     ; GCN-NEXT: $sgpr0 = COPY [[S_BFE_I32_]]
43     %0:sgpr(s32) = COPY $sgpr0
44     %1:sgpr(s1) = G_TRUNC %0
45     %2:sgpr(s32) = G_SEXT %1
46     $sgpr0 = COPY %2
47 ...
49 ---
51 name: sext_sgpr_s1_to_sgpr_s64
52 legalized:       true
53 regBankSelected: true
54 body: |
55   bb.0:
56     liveins: $sgpr0
58     ; GCN-LABEL: name: sext_sgpr_s1_to_sgpr_s64
59     ; GCN: liveins: $sgpr0
60     ; GCN-NEXT: {{  $}}
61     ; GCN-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
62     ; GCN-NEXT: [[DEF:%[0-9]+]]:sreg_32 = IMPLICIT_DEF
63     ; GCN-NEXT: [[REG_SEQUENCE:%[0-9]+]]:sreg_64 = REG_SEQUENCE [[COPY]], %subreg.sub0, [[DEF]], %subreg.sub1
64     ; GCN-NEXT: [[S_BFE_I64_:%[0-9]+]]:sreg_64 = S_BFE_I64 [[REG_SEQUENCE]], 65536, implicit-def $scc
65     ; GCN-NEXT: $sgpr0_sgpr1 = COPY [[S_BFE_I64_]]
66     %0:sgpr(s32) = COPY $sgpr0
67     %1:sgpr(s1) = G_TRUNC %0
68     %2:sgpr(s64) = G_SEXT %1
69     $sgpr0_sgpr1 = COPY %2
70 ...
72 ---
74 name: sext_sgpr_s16_to_sgpr_s32
75 legalized:       true
76 regBankSelected: true
77 body: |
78   bb.0:
79     liveins: $sgpr0
81     ; GCN-LABEL: name: sext_sgpr_s16_to_sgpr_s32
82     ; GCN: liveins: $sgpr0
83     ; GCN-NEXT: {{  $}}
84     ; GCN-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
85     ; GCN-NEXT: [[S_SEXT_I32_I16_:%[0-9]+]]:sreg_32 = S_SEXT_I32_I16 [[COPY]]
86     ; GCN-NEXT: $sgpr0 = COPY [[S_SEXT_I32_I16_]]
87     %0:sgpr(s32) = COPY $sgpr0
88     %1:sgpr(s16) = G_TRUNC %0
89     %2:sgpr(s32) = G_SEXT %1
90     $sgpr0 = COPY %2
92 ...
94 ---
96 name: sext_sgpr_s16_to_sgpr_s64
97 legalized:       true
98 regBankSelected: true
99 body: |
100   bb.0:
101     liveins: $sgpr0
103     ; GCN-LABEL: name: sext_sgpr_s16_to_sgpr_s64
104     ; GCN: liveins: $sgpr0
105     ; GCN-NEXT: {{  $}}
106     ; GCN-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
107     ; GCN-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 31
108     ; GCN-NEXT: [[S_SEXT_I32_I16_:%[0-9]+]]:sreg_32 = S_SEXT_I32_I16 [[COPY]]
109     ; GCN-NEXT: [[S_ASHR_I32_:%[0-9]+]]:sreg_32 = S_ASHR_I32 [[S_SEXT_I32_I16_]], [[S_MOV_B32_]], implicit-def dead $scc
110     ; GCN-NEXT: [[COPY1:%[0-9]+]]:sgpr_32 = COPY [[S_ASHR_I32_]]
111     ; GCN-NEXT: [[S_SEXT_I32_I16_1:%[0-9]+]]:sreg_32_xexec_hi_and_sreg_32_xm0 = S_SEXT_I32_I16 [[COPY]]
112     ; GCN-NEXT: [[REG_SEQUENCE:%[0-9]+]]:sreg_64 = REG_SEQUENCE [[S_SEXT_I32_I16_1]], %subreg.sub0, [[COPY1]], %subreg.sub1
113     ; GCN-NEXT: $sgpr0_sgpr1 = COPY [[REG_SEQUENCE]]
114     %0:sgpr(s32) = COPY $sgpr0
115     %1:sgpr(s16) = G_TRUNC %0
116     %2:sgpr(s64) = G_SEXT %1
117     $sgpr0_sgpr1 = COPY %2
123 name: sext_sgpr_s32_to_sgpr_s64
124 legalized:       true
125 regBankSelected: true
126 body: |
127   bb.0:
128     liveins: $sgpr0
130     ; GCN-LABEL: name: sext_sgpr_s32_to_sgpr_s64
131     ; GCN: liveins: $sgpr0
132     ; GCN-NEXT: {{  $}}
133     ; GCN-NEXT: [[COPY:%[0-9]+]]:sreg_32_xexec_hi_and_sreg_32_xm0 = COPY $sgpr0
134     ; GCN-NEXT: [[S_ASHR_I32_:%[0-9]+]]:sreg_32 = S_ASHR_I32 [[COPY]], 31, implicit-def dead $scc
135     ; GCN-NEXT: [[COPY1:%[0-9]+]]:sreg_32_xm0 = COPY [[S_ASHR_I32_]]
136     ; GCN-NEXT: [[REG_SEQUENCE:%[0-9]+]]:sreg_64 = REG_SEQUENCE [[COPY]], %subreg.sub0, [[COPY1]], %subreg.sub1
137     ; GCN-NEXT: $sgpr0_sgpr1 = COPY [[REG_SEQUENCE]]
138     %0:sgpr(s32) = COPY $sgpr0
139     %1:sgpr(s64) = G_SEXT %0
140     $sgpr0_sgpr1 = COPY %1
144 # ---
146 # name: sext_vcc_s1_to_vgpr_s32
147 # legalized:       true
148 # regBankSelected: true
149 # body: |
150 #   bb.0:
151 #     liveins: $vgpr0
153 #     %0:vgpr(s32) = COPY $vgpr0
154 #     %1:vcc(s1) = G_ICMP intpred(eq), %0, %0
155 #     %2:vgpr(s32) = G_SEXT %1
156 #     $vgpr0 = COPY %2
157 # ...
161 name: sext_vgpr_s1_to_vgpr_s16
162 legalized:       true
163 regBankSelected: true
164 body: |
165   bb.0:
166     liveins: $vgpr0
168     ; GCN-LABEL: name: sext_vgpr_s1_to_vgpr_s16
169     ; GCN: liveins: $vgpr0
170     ; GCN-NEXT: {{  $}}
171     ; GCN-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
172     ; GCN-NEXT: [[V_BFE_I32_e64_:%[0-9]+]]:vgpr_32 = V_BFE_I32_e64 [[COPY]], 0, 1, implicit $exec
173     ; GCN-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 65535
174     ; GCN-NEXT: [[V_AND_B32_e64_:%[0-9]+]]:vgpr_32 = V_AND_B32_e64 [[S_MOV_B32_]], [[V_BFE_I32_e64_]], implicit $exec
175     ; GCN-NEXT: $vgpr0 = COPY [[V_AND_B32_e64_]]
176     %0:vgpr(s32) = COPY $vgpr0
177     %1:vgpr(s1) = G_TRUNC %0
178     %2:vgpr(s16) = G_SEXT %1
179     %3:vgpr(s32) = G_ZEXT %2
180     $vgpr0 = COPY %3
185 name: sext_vgpr_s1_to_vgpr_s32
186 legalized:       true
187 regBankSelected: true
188 body: |
189   bb.0:
190     liveins: $vgpr0
192     ; GCN-LABEL: name: sext_vgpr_s1_to_vgpr_s32
193     ; GCN: liveins: $vgpr0
194     ; GCN-NEXT: {{  $}}
195     ; GCN-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
196     ; GCN-NEXT: [[V_BFE_I32_e64_:%[0-9]+]]:vgpr_32 = V_BFE_I32_e64 [[COPY]], 0, 1, implicit $exec
197     ; GCN-NEXT: $vgpr0 = COPY [[V_BFE_I32_e64_]]
198     %0:vgpr(s32) = COPY $vgpr0
199     %1:vgpr(s1) = G_TRUNC %0
200     %2:vgpr(s32) = G_SEXT %1
201     $vgpr0 = COPY %2
206 name: sext_vgpr_s16_to_vgpr_s32
207 legalized:       true
208 regBankSelected: true
209 body: |
210   bb.0:
211     liveins: $vgpr0
213     ; GCN-LABEL: name: sext_vgpr_s16_to_vgpr_s32
214     ; GCN: liveins: $vgpr0
215     ; GCN-NEXT: {{  $}}
216     ; GCN-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
217     ; GCN-NEXT: [[V_BFE_I32_e64_:%[0-9]+]]:vgpr_32 = V_BFE_I32_e64 [[COPY]], 0, 16, implicit $exec
218     ; GCN-NEXT: $vgpr0 = COPY [[V_BFE_I32_e64_]]
219     %0:vgpr(s32) = COPY $vgpr0
220     %1:vgpr(s16) = G_TRUNC %0
221     %2:vgpr(s32) = G_SEXT %1
222     $vgpr0 = COPY %2
228 name: sext_sgpr_reg_class_s1_to_sgpr_s32
229 legalized:       true
230 regBankSelected: true
231 body: |
232   bb.0:
233     liveins: $sgpr0
235     ; GCN-LABEL: name: sext_sgpr_reg_class_s1_to_sgpr_s32
236     ; GCN: liveins: $sgpr0
237     ; GCN-NEXT: {{  $}}
238     ; GCN-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
239     ; GCN-NEXT: [[S_BFE_I32_:%[0-9]+]]:sreg_32 = S_BFE_I32 [[COPY]], 65536, implicit-def $scc
240     ; GCN-NEXT: $sgpr0 = COPY [[S_BFE_I32_]]
241     %0:sgpr(s32) = COPY $sgpr0
242     %1:sreg_32(s1) = G_TRUNC %0
243     %2:sgpr(s32) = G_SEXT %1
244     $sgpr0 = COPY %2