[MachineScheduler] Fix physreg dependencies of ExitSU (#123541)
[llvm-project.git] / llvm / test / CodeGen / AMDGPU / GlobalISel / regbankselect-amdgcn.s.getpc.mir
blob9650da855ba5a22d68a38cbe6fa00c17867530a2
1 # NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
2 # RUN: llc -mtriple=amdgcn -mcpu=fiji -run-pass=regbankselect -regbankselect-fast -verify-machineinstrs -o -  %s | FileCheck %s
3 # RUN: llc -mtriple=amdgcn -mcpu=fiji -run-pass=regbankselect -regbankselect-greedy -verify-machineinstrs -o -  %s | FileCheck %s
5 ---
6 name: getpc
7 legalized: true
9 body: |
10   bb.0:
11     ; CHECK-LABEL: name: getpc
12     ; CHECK: [[INT:%[0-9]+]]:sgpr(s64) = G_INTRINSIC intrinsic(@llvm.amdgcn.s.getpc)
13     %0:_(s64) = G_INTRINSIC intrinsic(@llvm.amdgcn.s.getpc)
14 ...