| blob | 52a23690dcf532116f71451cf76af4917f8c8338 |
1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2 ; RUN: llc -global-isel=0 -mtriple=amdgcn -mcpu=gfx900 -verify-machineinstrs < %s | FileCheck %s -check-prefixes=GFX9,GFX9-SDAG
3 ; RUN: llc -global-isel=1 -mtriple=amdgcn -mcpu=gfx900 -verify-machineinstrs < %s | FileCheck %s -check-prefixes=GFX9,GFX9-GISEL
4 ; RUN: llc -global-isel=0 -mtriple=amdgcn -mcpu=gfx1010 -verify-machineinstrs < %s | FileCheck %s -check-prefixes=GFX10,GFX10-SDAG
5 ; RUN: llc -global-isel=1 -mtriple=amdgcn -mcpu=gfx1010 -verify-machineinstrs < %s | FileCheck %s -check-prefixes=GFX10,GFX10-GISEL
6 ; RUN: llc -global-isel=0 -mtriple=amdgcn -mcpu=gfx1100 -verify-machineinstrs < %s | FileCheck %s -check-prefixes=GFX11,GFX11-SDAG
7 ; RUN: llc -global-isel=1 -mtriple=amdgcn -mcpu=gfx1100 -verify-machineinstrs < %s | FileCheck %s -check-prefixes=GFX11,GFX11-GISEL
8 ; RUN: llc -global-isel=0 -mtriple=amdgcn -mcpu=gfx1200 -verify-machineinstrs < %s | FileCheck %s -check-prefixes=GFX12,GFX12-SDAG
9 ; RUN: llc -global-isel=1 -mtriple=amdgcn -mcpu=gfx1200 -verify-machineinstrs < %s | FileCheck %s -check-prefixes=GFX12,GFX12-GISEL
11 declare half @llvm.fma.f16(half, half, half)
12 declare half @llvm.maxnum.f16(half, half)
14 define half @test_fma(half %x, half %y, half %z) {
15 ; GFX9-LABEL: test_fma:
16 ; GFX9: ; %bb.0:
17 ; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
18 ; GFX9-NEXT: v_fma_f16 v0, v0, v1, v2
19 ; GFX9-NEXT: s_setpc_b64 s[30:31]
20 ;
21 ; GFX10-LABEL: test_fma:
22 ; GFX10: ; %bb.0:
23 ; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
24 ; GFX10-NEXT: v_fma_f16 v0, v0, v1, v2
25 ; GFX10-NEXT: s_setpc_b64 s[30:31]
26 ;
27 ; GFX11-LABEL: test_fma:
28 ; GFX11: ; %bb.0:
29 ; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
30 ; GFX11-NEXT: v_fma_f16 v0, v0, v1, v2
31 ; GFX11-NEXT: s_setpc_b64 s[30:31]
32 ;
33 ; GFX12-LABEL: test_fma:
34 ; GFX12: ; %bb.0:
35 ; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
36 ; GFX12-NEXT: s_wait_expcnt 0x0
37 ; GFX12-NEXT: s_wait_samplecnt 0x0
38 ; GFX12-NEXT: s_wait_bvhcnt 0x0
39 ; GFX12-NEXT: s_wait_kmcnt 0x0
40 ; GFX12-NEXT: v_fma_f16 v0, v0, v1, v2
41 ; GFX12-NEXT: s_setpc_b64 s[30:31]
42 %r = call half @llvm.fma.f16(half %x, half %y, half %z)
43 ret half %r
44 }
46 ; GFX10+ has v_fmac_f16.
47 define half @test_fmac(half %x, half %y, half %z) {
48 ; GFX9-LABEL: test_fmac:
49 ; GFX9: ; %bb.0:
50 ; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
51 ; GFX9-NEXT: v_fma_f16 v0, v1, v2, v0
52 ; GFX9-NEXT: s_setpc_b64 s[30:31]
53 ;
54 ; GFX10-LABEL: test_fmac:
55 ; GFX10: ; %bb.0:
56 ; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
57 ; GFX10-NEXT: v_fmac_f16_e32 v0, v1, v2
58 ; GFX10-NEXT: s_setpc_b64 s[30:31]
59 ;
60 ; GFX11-LABEL: test_fmac:
61 ; GFX11: ; %bb.0:
62 ; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
63 ; GFX11-NEXT: v_fmac_f16_e32 v0, v1, v2
64 ; GFX11-NEXT: s_setpc_b64 s[30:31]
65 ;
66 ; GFX12-LABEL: test_fmac:
67 ; GFX12: ; %bb.0:
68 ; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
69 ; GFX12-NEXT: s_wait_expcnt 0x0
70 ; GFX12-NEXT: s_wait_samplecnt 0x0
71 ; GFX12-NEXT: s_wait_bvhcnt 0x0
72 ; GFX12-NEXT: s_wait_kmcnt 0x0
73 ; GFX12-NEXT: v_fmac_f16_e32 v0, v1, v2
74 ; GFX12-NEXT: s_setpc_b64 s[30:31]
75 %r = call half @llvm.fma.f16(half %y, half %z, half %x)
76 ret half %r
77 }
79 ; GFX10+ has v_fmaak_f16.
80 define half @test_fmaak(half %x, half %y, half %z) {
81 ; GFX9-SDAG-LABEL: test_fmaak:
82 ; GFX9-SDAG: ; %bb.0:
83 ; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
84 ; GFX9-SDAG-NEXT: s_movk_i32 s4, 0x4200
85 ; GFX9-SDAG-NEXT: v_fma_f16 v0, v0, v1, s4
86 ; GFX9-SDAG-NEXT: s_setpc_b64 s[30:31]
87 ;
88 ; GFX9-GISEL-LABEL: test_fmaak:
89 ; GFX9-GISEL: ; %bb.0:
90 ; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
91 ; GFX9-GISEL-NEXT: v_mov_b32_e32 v2, 0x4200
92 ; GFX9-GISEL-NEXT: v_fma_f16 v0, v0, v1, v2
93 ; GFX9-GISEL-NEXT: s_setpc_b64 s[30:31]
94 ;
95 ; GFX10-LABEL: test_fmaak:
96 ; GFX10: ; %bb.0:
97 ; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
98 ; GFX10-NEXT: v_fmaak_f16 v0, v0, v1, 0x4200
99 ; GFX10-NEXT: s_setpc_b64 s[30:31]
100 ;
101 ; GFX11-LABEL: test_fmaak:
102 ; GFX11: ; %bb.0:
103 ; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
104 ; GFX11-NEXT: v_fmaak_f16 v0, v0, v1, 0x4200
105 ; GFX11-NEXT: s_setpc_b64 s[30:31]
106 ;
107 ; GFX12-LABEL: test_fmaak:
108 ; GFX12: ; %bb.0:
109 ; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
110 ; GFX12-NEXT: s_wait_expcnt 0x0
111 ; GFX12-NEXT: s_wait_samplecnt 0x0
112 ; GFX12-NEXT: s_wait_bvhcnt 0x0
113 ; GFX12-NEXT: s_wait_kmcnt 0x0
114 ; GFX12-NEXT: v_fmaak_f16 v0, v0, v1, 0x4200
115 ; GFX12-NEXT: s_setpc_b64 s[30:31]
116 %r = call half @llvm.fma.f16(half %x, half %y, half 0xH4200)
117 ret half %r
118 }
120 ; GFX10+ has v_fmamk_f16.
121 define half @test_fmamk(half %x, half %y, half %z) {
122 ; GFX9-SDAG-LABEL: test_fmamk:
123 ; GFX9-SDAG: ; %bb.0:
124 ; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
125 ; GFX9-SDAG-NEXT: s_movk_i32 s4, 0x4200
126 ; GFX9-SDAG-NEXT: v_fma_f16 v0, v0, s4, v2
127 ; GFX9-SDAG-NEXT: s_setpc_b64 s[30:31]
128 ;
129 ; GFX9-GISEL-LABEL: test_fmamk:
130 ; GFX9-GISEL: ; %bb.0:
131 ; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
132 ; GFX9-GISEL-NEXT: v_mov_b32_e32 v1, 0x4200
133 ; GFX9-GISEL-NEXT: v_fma_f16 v0, v0, v1, v2
134 ; GFX9-GISEL-NEXT: s_setpc_b64 s[30:31]
135 ;
136 ; GFX10-LABEL: test_fmamk:
137 ; GFX10: ; %bb.0:
138 ; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
139 ; GFX10-NEXT: v_fmamk_f16 v0, v0, 0x4200, v2
140 ; GFX10-NEXT: s_setpc_b64 s[30:31]
141 ;
142 ; GFX11-LABEL: test_fmamk:
143 ; GFX11: ; %bb.0:
144 ; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
145 ; GFX11-NEXT: v_fmamk_f16 v0, v0, 0x4200, v2
146 ; GFX11-NEXT: s_setpc_b64 s[30:31]
147 ;
148 ; GFX12-LABEL: test_fmamk:
149 ; GFX12: ; %bb.0:
150 ; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
151 ; GFX12-NEXT: s_wait_expcnt 0x0
152 ; GFX12-NEXT: s_wait_samplecnt 0x0
153 ; GFX12-NEXT: s_wait_bvhcnt 0x0
154 ; GFX12-NEXT: s_wait_kmcnt 0x0
155 ; GFX12-NEXT: v_fmamk_f16 v0, v0, 0x4200, v2
156 ; GFX12-NEXT: s_setpc_b64 s[30:31]
157 %r = call half @llvm.fma.f16(half %x, half 0xH4200, half %z)
158 ret half %r
159 }
161 ; Regression test for a crash caused by D139469.
162 define i32 @test_D139469_f16(half %arg) {
163 ; GFX9-SDAG-LABEL: test_D139469_f16:
164 ; GFX9-SDAG: ; %bb.0: ; %bb
165 ; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
166 ; GFX9-SDAG-NEXT: s_movk_i32 s4, 0x291e
167 ; GFX9-SDAG-NEXT: v_mov_b32_e32 v2, 0x211e
168 ; GFX9-SDAG-NEXT: v_mul_f16_e32 v1, 0x291e, v0
169 ; GFX9-SDAG-NEXT: v_fma_f16 v0, v0, s4, v2
170 ; GFX9-SDAG-NEXT: v_min_f16_e32 v0, v1, v0
171 ; GFX9-SDAG-NEXT: v_cmp_gt_f16_e32 vcc, 0, v0
172 ; GFX9-SDAG-NEXT: v_cndmask_b32_e64 v0, 0, 1, vcc
173 ; GFX9-SDAG-NEXT: s_setpc_b64 s[30:31]
174 ;
175 ; GFX9-GISEL-LABEL: test_D139469_f16:
176 ; GFX9-GISEL: ; %bb.0: ; %bb
177 ; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
178 ; GFX9-GISEL-NEXT: v_mul_f16_e32 v2, 0x291e, v0
179 ; GFX9-GISEL-NEXT: v_mov_b32_e32 v1, 0x291e
180 ; GFX9-GISEL-NEXT: v_cmp_gt_f16_e32 vcc, 0, v2
181 ; GFX9-GISEL-NEXT: v_mov_b32_e32 v2, 0x211e
182 ; GFX9-GISEL-NEXT: v_fma_f16 v0, v0, v1, v2
183 ; GFX9-GISEL-NEXT: v_cmp_gt_f16_e64 s[4:5], 0, v0
184 ; GFX9-GISEL-NEXT: s_or_b64 s[4:5], vcc, s[4:5]
185 ; GFX9-GISEL-NEXT: v_cndmask_b32_e64 v0, 0, 1, s[4:5]
186 ; GFX9-GISEL-NEXT: s_setpc_b64 s[30:31]
187 ;
188 ; GFX10-SDAG-LABEL: test_D139469_f16:
189 ; GFX10-SDAG: ; %bb.0: ; %bb
190 ; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
191 ; GFX10-SDAG-NEXT: s_movk_i32 s4, 0x291e
192 ; GFX10-SDAG-NEXT: v_mul_f16_e32 v1, 0x291e, v0
193 ; GFX10-SDAG-NEXT: v_fmaak_f16 v0, s4, v0, 0x211e
194 ; GFX10-SDAG-NEXT: v_min_f16_e32 v0, v1, v0
195 ; GFX10-SDAG-NEXT: v_cmp_gt_f16_e32 vcc_lo, 0, v0
196 ; GFX10-SDAG-NEXT: v_cndmask_b32_e64 v0, 0, 1, vcc_lo
197 ; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]
198 ;
199 ; GFX10-GISEL-LABEL: test_D139469_f16:
200 ; GFX10-GISEL: ; %bb.0: ; %bb
201 ; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
202 ; GFX10-GISEL-NEXT: v_mov_b32_e32 v1, 0x211e
203 ; GFX10-GISEL-NEXT: v_mul_f16_e32 v2, 0x291e, v0
204 ; GFX10-GISEL-NEXT: v_fmac_f16_e32 v1, 0x291e, v0
205 ; GFX10-GISEL-NEXT: v_cmp_gt_f16_e32 vcc_lo, 0, v2
206 ; GFX10-GISEL-NEXT: v_cmp_gt_f16_e64 s4, 0, v1
207 ; GFX10-GISEL-NEXT: s_or_b32 s4, vcc_lo, s4
208 ; GFX10-GISEL-NEXT: v_cndmask_b32_e64 v0, 0, 1, s4
209 ; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]
210 ;
211 ; GFX11-SDAG-LABEL: test_D139469_f16:
212 ; GFX11-SDAG: ; %bb.0: ; %bb
213 ; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
214 ; GFX11-SDAG-NEXT: v_mov_b32_e32 v1, 0x211e
215 ; GFX11-SDAG-NEXT: v_mul_f16_e32 v2, 0x291e, v0
216 ; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
217 ; GFX11-SDAG-NEXT: v_fmac_f16_e32 v1, 0x291e, v0
218 ; GFX11-SDAG-NEXT: v_min_f16_e32 v0, v2, v1
219 ; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
220 ; GFX11-SDAG-NEXT: v_cmp_gt_f16_e32 vcc_lo, 0, v0
221 ; GFX11-SDAG-NEXT: v_cndmask_b32_e64 v0, 0, 1, vcc_lo
222 ; GFX11-SDAG-NEXT: s_setpc_b64 s[30:31]
223 ;
224 ; GFX11-GISEL-LABEL: test_D139469_f16:
225 ; GFX11-GISEL: ; %bb.0: ; %bb
226 ; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
227 ; GFX11-GISEL-NEXT: v_mov_b32_e32 v1, 0x211e
228 ; GFX11-GISEL-NEXT: v_mul_f16_e32 v2, 0x291e, v0
229 ; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
230 ; GFX11-GISEL-NEXT: v_fmac_f16_e32 v1, 0x291e, v0
231 ; GFX11-GISEL-NEXT: v_cmp_gt_f16_e32 vcc_lo, 0, v2
232 ; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
233 ; GFX11-GISEL-NEXT: v_cmp_gt_f16_e64 s0, 0, v1
234 ; GFX11-GISEL-NEXT: s_or_b32 s0, vcc_lo, s0
235 ; GFX11-GISEL-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
236 ; GFX11-GISEL-NEXT: v_cndmask_b32_e64 v0, 0, 1, s0
237 ; GFX11-GISEL-NEXT: s_setpc_b64 s[30:31]
238 ;
239 ; GFX12-SDAG-LABEL: test_D139469_f16:
240 ; GFX12-SDAG: ; %bb.0: ; %bb
241 ; GFX12-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
242 ; GFX12-SDAG-NEXT: s_wait_expcnt 0x0
243 ; GFX12-SDAG-NEXT: s_wait_samplecnt 0x0
244 ; GFX12-SDAG-NEXT: s_wait_bvhcnt 0x0
245 ; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
246 ; GFX12-SDAG-NEXT: v_mov_b32_e32 v1, 0x211e
247 ; GFX12-SDAG-NEXT: v_mul_f16_e32 v2, 0x291e, v0
248 ; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
249 ; GFX12-SDAG-NEXT: v_fmac_f16_e32 v1, 0x291e, v0
250 ; GFX12-SDAG-NEXT: v_min_num_f16_e32 v0, v2, v1
251 ; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
252 ; GFX12-SDAG-NEXT: v_cmp_gt_f16_e32 vcc_lo, 0, v0
253 ; GFX12-SDAG-NEXT: s_wait_alu 0xfffd
254 ; GFX12-SDAG-NEXT: v_cndmask_b32_e64 v0, 0, 1, vcc_lo
255 ; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
256 ;
257 ; GFX12-GISEL-LABEL: test_D139469_f16:
258 ; GFX12-GISEL: ; %bb.0: ; %bb
259 ; GFX12-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
260 ; GFX12-GISEL-NEXT: s_wait_expcnt 0x0
261 ; GFX12-GISEL-NEXT: s_wait_samplecnt 0x0
262 ; GFX12-GISEL-NEXT: s_wait_bvhcnt 0x0
263 ; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
264 ; GFX12-GISEL-NEXT: v_mov_b32_e32 v1, 0x211e
265 ; GFX12-GISEL-NEXT: v_mul_f16_e32 v2, 0x291e, v0
266 ; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
267 ; GFX12-GISEL-NEXT: v_fmac_f16_e32 v1, 0x291e, v0
268 ; GFX12-GISEL-NEXT: v_cmp_gt_f16_e32 vcc_lo, 0, v2
269 ; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
270 ; GFX12-GISEL-NEXT: v_cmp_gt_f16_e64 s0, 0, v1
271 ; GFX12-GISEL-NEXT: s_or_b32 s0, vcc_lo, s0
272 ; GFX12-GISEL-NEXT: s_wait_alu 0xfffe
273 ; GFX12-GISEL-NEXT: v_cndmask_b32_e64 v0, 0, 1, s0
274 ; GFX12-GISEL-NEXT: s_setpc_b64 s[30:31]
275 bb:
276 %i = fmul contract half %arg, 0xH291E
277 %i1 = fcmp olt half %i, 0xH0000
278 %i2 = fadd contract half %i, 0xH211E
279 %i3 = fcmp olt half %i2, 0xH0000
280 %i4 = or i1 %i1, %i3
281 %i5 = zext i1 %i4 to i32
282 ret i32 %i5
283 }
285 define <2 x i32> @test_D139469_v2f16(<2 x half> %arg) {
286 ; GFX9-SDAG-LABEL: test_D139469_v2f16:
287 ; GFX9-SDAG: ; %bb.0: ; %bb
288 ; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
289 ; GFX9-SDAG-NEXT: s_movk_i32 s4, 0x291e
290 ; GFX9-SDAG-NEXT: v_mov_b32_e32 v2, 0x211e
291 ; GFX9-SDAG-NEXT: v_pk_mul_f16 v1, v0, s4 op_sel_hi:[1,0]
292 ; GFX9-SDAG-NEXT: v_pk_fma_f16 v0, v0, s4, v2 op_sel_hi:[1,0,0]
293 ; GFX9-SDAG-NEXT: v_pk_min_f16 v1, v1, v0
294 ; GFX9-SDAG-NEXT: v_mov_b32_e32 v2, 0
295 ; GFX9-SDAG-NEXT: v_cmp_gt_f16_e32 vcc, 0, v1
296 ; GFX9-SDAG-NEXT: v_cmp_lt_f16_sdwa s[4:5], v1, v2 src0_sel:WORD_1 src1_sel:DWORD
297 ; GFX9-SDAG-NEXT: v_cndmask_b32_e64 v0, 0, 1, vcc
298 ; GFX9-SDAG-NEXT: v_cndmask_b32_e64 v1, 0, 1, s[4:5]
299 ; GFX9-SDAG-NEXT: s_setpc_b64 s[30:31]
300 ;
301 ; GFX9-GISEL-LABEL: test_D139469_v2f16:
302 ; GFX9-GISEL: ; %bb.0: ; %bb
303 ; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
304 ; GFX9-GISEL-NEXT: v_mov_b32_e32 v1, 0x291e291e
305 ; GFX9-GISEL-NEXT: v_pk_mul_f16 v2, v0, v1
306 ; GFX9-GISEL-NEXT: v_mov_b32_e32 v3, 0
307 ; GFX9-GISEL-NEXT: v_cmp_gt_f16_e32 vcc, 0, v2
308 ; GFX9-GISEL-NEXT: v_cmp_lt_f16_sdwa s[6:7], v2, v3 src0_sel:WORD_1 src1_sel:DWORD
309 ; GFX9-GISEL-NEXT: v_mov_b32_e32 v2, 0x211e211e
310 ; GFX9-GISEL-NEXT: v_pk_fma_f16 v0, v0, v1, v2
311 ; GFX9-GISEL-NEXT: v_cmp_gt_f16_e64 s[4:5], 0, v0
312 ; GFX9-GISEL-NEXT: v_cmp_lt_f16_sdwa s[8:9], v0, v3 src0_sel:WORD_1 src1_sel:DWORD
313 ; GFX9-GISEL-NEXT: s_or_b64 s[4:5], vcc, s[4:5]
314 ; GFX9-GISEL-NEXT: v_cndmask_b32_e64 v0, 0, 1, s[4:5]
315 ; GFX9-GISEL-NEXT: s_or_b64 s[4:5], s[6:7], s[8:9]
316 ; GFX9-GISEL-NEXT: v_cndmask_b32_e64 v1, 0, 1, s[4:5]
317 ; GFX9-GISEL-NEXT: s_setpc_b64 s[30:31]
318 ;
319 ; GFX10-SDAG-LABEL: test_D139469_v2f16:
320 ; GFX10-SDAG: ; %bb.0: ; %bb
321 ; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
322 ; GFX10-SDAG-NEXT: s_movk_i32 s4, 0x211e
323 ; GFX10-SDAG-NEXT: v_pk_mul_f16 v1, 0x291e, v0 op_sel_hi:[0,1]
324 ; GFX10-SDAG-NEXT: v_pk_fma_f16 v0, 0x291e, v0, s4 op_sel_hi:[0,1,0]
325 ; GFX10-SDAG-NEXT: v_mov_b32_e32 v2, 0
326 ; GFX10-SDAG-NEXT: v_pk_min_f16 v1, v1, v0
327 ; GFX10-SDAG-NEXT: v_cmp_gt_f16_e32 vcc_lo, 0, v1
328 ; GFX10-SDAG-NEXT: v_cmp_lt_f16_sdwa s4, v1, v2 src0_sel:WORD_1 src1_sel:DWORD
329 ; GFX10-SDAG-NEXT: v_cndmask_b32_e64 v0, 0, 1, vcc_lo
330 ; GFX10-SDAG-NEXT: v_cndmask_b32_e64 v1, 0, 1, s4
331 ; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]
332 ;
333 ; GFX10-GISEL-LABEL: test_D139469_v2f16:
334 ; GFX10-GISEL: ; %bb.0: ; %bb
335 ; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
336 ; GFX10-GISEL-NEXT: v_mov_b32_e32 v1, 0x211e211e
337 ; GFX10-GISEL-NEXT: v_pk_mul_f16 v2, 0x291e291e, v0
338 ; GFX10-GISEL-NEXT: v_pk_fma_f16 v0, 0x291e291e, v0, v1
339 ; GFX10-GISEL-NEXT: v_mov_b32_e32 v1, 0
340 ; GFX10-GISEL-NEXT: v_cmp_gt_f16_e32 vcc_lo, 0, v2
341 ; GFX10-GISEL-NEXT: v_cmp_gt_f16_e64 s4, 0, v0
342 ; GFX10-GISEL-NEXT: v_cmp_lt_f16_sdwa s5, v2, v1 src0_sel:WORD_1 src1_sel:DWORD
343 ; GFX10-GISEL-NEXT: v_cmp_lt_f16_sdwa s6, v0, v1 src0_sel:WORD_1 src1_sel:DWORD
344 ; GFX10-GISEL-NEXT: s_or_b32 s4, vcc_lo, s4
345 ; GFX10-GISEL-NEXT: v_cndmask_b32_e64 v0, 0, 1, s4
346 ; GFX10-GISEL-NEXT: s_or_b32 s4, s5, s6
347 ; GFX10-GISEL-NEXT: v_cndmask_b32_e64 v1, 0, 1, s4
348 ; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]
349 ;
350 ; GFX11-SDAG-LABEL: test_D139469_v2f16:
351 ; GFX11-SDAG: ; %bb.0: ; %bb
352 ; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
353 ; GFX11-SDAG-NEXT: s_movk_i32 s0, 0x211e
354 ; GFX11-SDAG-NEXT: v_pk_mul_f16 v1, 0x291e, v0 op_sel_hi:[0,1]
355 ; GFX11-SDAG-NEXT: v_pk_fma_f16 v0, 0x291e, v0, s0 op_sel_hi:[0,1,0]
356 ; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
357 ; GFX11-SDAG-NEXT: v_pk_min_f16 v0, v1, v0
358 ; GFX11-SDAG-NEXT: v_lshrrev_b32_e32 v1, 16, v0
359 ; GFX11-SDAG-NEXT: v_cmp_gt_f16_e32 vcc_lo, 0, v0
360 ; GFX11-SDAG-NEXT: v_cndmask_b32_e64 v0, 0, 1, vcc_lo
361 ; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_3)
362 ; GFX11-SDAG-NEXT: v_cmp_gt_f16_e32 vcc_lo, 0, v1
363 ; GFX11-SDAG-NEXT: v_cndmask_b32_e64 v1, 0, 1, vcc_lo
364 ; GFX11-SDAG-NEXT: s_setpc_b64 s[30:31]
365 ;
366 ; GFX11-GISEL-LABEL: test_D139469_v2f16:
367 ; GFX11-GISEL: ; %bb.0: ; %bb
368 ; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
369 ; GFX11-GISEL-NEXT: v_mov_b32_e32 v1, 0x211e211e
370 ; GFX11-GISEL-NEXT: v_pk_mul_f16 v2, 0x291e291e, v0
371 ; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
372 ; GFX11-GISEL-NEXT: v_pk_fma_f16 v0, 0x291e291e, v0, v1
373 ; GFX11-GISEL-NEXT: v_lshrrev_b32_e32 v1, 16, v2
374 ; GFX11-GISEL-NEXT: v_cmp_gt_f16_e32 vcc_lo, 0, v2
375 ; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
376 ; GFX11-GISEL-NEXT: v_lshrrev_b32_e32 v3, 16, v0
377 ; GFX11-GISEL-NEXT: v_cmp_gt_f16_e64 s0, 0, v0
378 ; GFX11-GISEL-NEXT: v_cmp_gt_f16_e64 s1, 0, v1
379 ; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
380 ; GFX11-GISEL-NEXT: v_cmp_gt_f16_e64 s2, 0, v3
381 ; GFX11-GISEL-NEXT: s_or_b32 s0, vcc_lo, s0
382 ; GFX11-GISEL-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_2)
383 ; GFX11-GISEL-NEXT: v_cndmask_b32_e64 v0, 0, 1, s0
384 ; GFX11-GISEL-NEXT: s_or_b32 s0, s1, s2
385 ; GFX11-GISEL-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
386 ; GFX11-GISEL-NEXT: v_cndmask_b32_e64 v1, 0, 1, s0
387 ; GFX11-GISEL-NEXT: s_setpc_b64 s[30:31]
388 ;
389 ; GFX12-SDAG-LABEL: test_D139469_v2f16:
390 ; GFX12-SDAG: ; %bb.0: ; %bb
391 ; GFX12-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
392 ; GFX12-SDAG-NEXT: s_wait_expcnt 0x0
393 ; GFX12-SDAG-NEXT: s_wait_samplecnt 0x0
394 ; GFX12-SDAG-NEXT: s_wait_bvhcnt 0x0
395 ; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
396 ; GFX12-SDAG-NEXT: s_movk_i32 s0, 0x211e
397 ; GFX12-SDAG-NEXT: v_pk_mul_f16 v1, 0x291e, v0 op_sel_hi:[0,1]
398 ; GFX12-SDAG-NEXT: s_wait_alu 0xfffe
399 ; GFX12-SDAG-NEXT: v_pk_fma_f16 v0, 0x291e, v0, s0 op_sel_hi:[0,1,0]
400 ; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
401 ; GFX12-SDAG-NEXT: v_pk_min_num_f16 v0, v1, v0
402 ; GFX12-SDAG-NEXT: v_lshrrev_b32_e32 v1, 16, v0
403 ; GFX12-SDAG-NEXT: v_cmp_gt_f16_e32 vcc_lo, 0, v0
404 ; GFX12-SDAG-NEXT: s_wait_alu 0xfffd
405 ; GFX12-SDAG-NEXT: v_cndmask_b32_e64 v0, 0, 1, vcc_lo
406 ; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_3)
407 ; GFX12-SDAG-NEXT: v_cmp_gt_f16_e32 vcc_lo, 0, v1
408 ; GFX12-SDAG-NEXT: s_wait_alu 0xfffd
409 ; GFX12-SDAG-NEXT: v_cndmask_b32_e64 v1, 0, 1, vcc_lo
410 ; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
411 ;
412 ; GFX12-GISEL-LABEL: test_D139469_v2f16:
413 ; GFX12-GISEL: ; %bb.0: ; %bb
414 ; GFX12-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
415 ; GFX12-GISEL-NEXT: s_wait_expcnt 0x0
416 ; GFX12-GISEL-NEXT: s_wait_samplecnt 0x0
417 ; GFX12-GISEL-NEXT: s_wait_bvhcnt 0x0
418 ; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
419 ; GFX12-GISEL-NEXT: v_mov_b32_e32 v1, 0x211e211e
420 ; GFX12-GISEL-NEXT: v_pk_mul_f16 v2, 0x291e291e, v0
421 ; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
422 ; GFX12-GISEL-NEXT: v_pk_fma_f16 v0, 0x291e291e, v0, v1
423 ; GFX12-GISEL-NEXT: v_lshrrev_b32_e32 v1, 16, v2
424 ; GFX12-GISEL-NEXT: v_cmp_gt_f16_e32 vcc_lo, 0, v2
425 ; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
426 ; GFX12-GISEL-NEXT: v_lshrrev_b32_e32 v3, 16, v0
427 ; GFX12-GISEL-NEXT: v_cmp_gt_f16_e64 s0, 0, v0
428 ; GFX12-GISEL-NEXT: v_cmp_gt_f16_e64 s1, 0, v1
429 ; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
430 ; GFX12-GISEL-NEXT: v_cmp_gt_f16_e64 s2, 0, v3
431 ; GFX12-GISEL-NEXT: s_or_b32 s0, vcc_lo, s0
432 ; GFX12-GISEL-NEXT: s_wait_alu 0xfffe
433 ; GFX12-GISEL-NEXT: v_cndmask_b32_e64 v0, 0, 1, s0
434 ; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_2)
435 ; GFX12-GISEL-NEXT: s_or_b32 s0, s1, s2
436 ; GFX12-GISEL-NEXT: s_wait_alu 0xfffe
437 ; GFX12-GISEL-NEXT: v_cndmask_b32_e64 v1, 0, 1, s0
438 ; GFX12-GISEL-NEXT: s_setpc_b64 s[30:31]
439 bb:
440 %i = fmul contract <2 x half> %arg, <half 0xH291E, half 0xH291E>
441 %i1 = fcmp olt <2 x half> %i, <half 0xH0000, half 0xH0000>
442 %i2 = fadd contract <2 x half> %i, <half 0xH211E, half 0xH211E>
443 %i3 = fcmp olt <2 x half> %i2, <half 0xH0000, half 0xH0000>
444 %i4 = or <2 x i1> %i1, %i3
445 %i5 = zext <2 x i1> %i4 to <2 x i32>
446 ret <2 x i32> %i5
447 }