| blob | be66d6516f43800d8b82b1bf6e86e9ce8f0ced9b |
1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2 ; RUN: llc < %s -mtriple=amdgcn -mcpu=tonga -verify-machineinstrs | FileCheck -check-prefixes=TONGA %s
3 ; RUN: llc < %s -mtriple=amdgcn -mcpu=gfx810 -verify-machineinstrs | FileCheck -check-prefixes=GFX81 %s
4 ; RUN: llc < %s -mtriple=amdgcn -mcpu=gfx900 -verify-machineinstrs | FileCheck -check-prefixes=GFX9 %s
5 ; RUN: llc < %s -mtriple=amdgcn -mcpu=gfx1010 -verify-machineinstrs | FileCheck -check-prefixes=GFX10PLUS,GFX10 %s
6 ; RUN: llc < %s -mtriple=amdgcn -mcpu=gfx1100 -amdgpu-enable-delay-alu=0 -verify-machineinstrs | FileCheck -check-prefixes=GFX10PLUS,GFX11 %s
7 ; RUN: llc < %s -mtriple=amdgcn -mcpu=gfx1200 -amdgpu-enable-delay-alu=0 -verify-machineinstrs | FileCheck -check-prefixes=GFX12 %s
9 define amdgpu_ps half @image_sample_2d_f16(<8 x i32> inreg %rsrc, <4 x i32> inreg %samp, float %s, float %t) {
10 ; TONGA-LABEL: image_sample_2d_f16:
11 ; TONGA: ; %bb.0: ; %main_body
12 ; TONGA-NEXT: s_mov_b64 s[12:13], exec
13 ; TONGA-NEXT: s_wqm_b64 exec, exec
14 ; TONGA-NEXT: s_and_b64 exec, exec, s[12:13]
15 ; TONGA-NEXT: image_sample v0, v[0:1], s[0:7], s[8:11] dmask:0x1 d16
16 ; TONGA-NEXT: s_waitcnt vmcnt(0)
17 ; TONGA-NEXT: ; return to shader part epilog
18 ;
19 ; GFX81-LABEL: image_sample_2d_f16:
20 ; GFX81: ; %bb.0: ; %main_body
21 ; GFX81-NEXT: s_mov_b64 s[12:13], exec
22 ; GFX81-NEXT: s_wqm_b64 exec, exec
23 ; GFX81-NEXT: s_and_b64 exec, exec, s[12:13]
24 ; GFX81-NEXT: image_sample v0, v[0:1], s[0:7], s[8:11] dmask:0x1 d16
25 ; GFX81-NEXT: s_waitcnt vmcnt(0)
26 ; GFX81-NEXT: ; return to shader part epilog
27 ;
28 ; GFX9-LABEL: image_sample_2d_f16:
29 ; GFX9: ; %bb.0: ; %main_body
30 ; GFX9-NEXT: s_mov_b64 s[12:13], exec
31 ; GFX9-NEXT: s_wqm_b64 exec, exec
32 ; GFX9-NEXT: s_and_b64 exec, exec, s[12:13]
33 ; GFX9-NEXT: image_sample v0, v[0:1], s[0:7], s[8:11] dmask:0x1 d16
34 ; GFX9-NEXT: s_waitcnt vmcnt(0)
35 ; GFX9-NEXT: ; return to shader part epilog
36 ;
37 ; GFX10PLUS-LABEL: image_sample_2d_f16:
38 ; GFX10PLUS: ; %bb.0: ; %main_body
39 ; GFX10PLUS-NEXT: s_mov_b32 s12, exec_lo
40 ; GFX10PLUS-NEXT: s_wqm_b32 exec_lo, exec_lo
41 ; GFX10PLUS-NEXT: s_and_b32 exec_lo, exec_lo, s12
42 ; GFX10PLUS-NEXT: image_sample v0, v[0:1], s[0:7], s[8:11] dmask:0x1 dim:SQ_RSRC_IMG_2D d16
43 ; GFX10PLUS-NEXT: s_waitcnt vmcnt(0)
44 ; GFX10PLUS-NEXT: ; return to shader part epilog
45 ;
46 ; GFX12-LABEL: image_sample_2d_f16:
47 ; GFX12: ; %bb.0: ; %main_body
48 ; GFX12-NEXT: s_mov_b32 s12, exec_lo
49 ; GFX12-NEXT: s_wqm_b32 exec_lo, exec_lo
50 ; GFX12-NEXT: s_and_b32 exec_lo, exec_lo, s12
51 ; GFX12-NEXT: image_sample v0, [v0, v1], s[0:7], s[8:11] dmask:0x1 dim:SQ_RSRC_IMG_2D d16
52 ; GFX12-NEXT: s_wait_samplecnt 0x0
53 ; GFX12-NEXT: ; return to shader part epilog
54 main_body:
55 %tex = call half @llvm.amdgcn.image.sample.2d.f16.f32(i32 1, float %s, float %t, <8 x i32> %rsrc, <4 x i32> %samp, i1 false, i32 0, i32 0)
56 ret half %tex
57 }
59 define amdgpu_ps half @image_sample_2d_f16_tfe(<8 x i32> inreg %rsrc, <4 x i32> inreg %samp, float %s, float %t, ptr addrspace(1) inreg %out) {
60 ; TONGA-LABEL: image_sample_2d_f16_tfe:
61 ; TONGA: ; %bb.0: ; %main_body
62 ; TONGA-NEXT: s_mov_b64 s[14:15], exec
63 ; TONGA-NEXT: s_wqm_b64 exec, exec
64 ; TONGA-NEXT: v_mov_b32_e32 v2, 0
65 ; TONGA-NEXT: v_mov_b32_e32 v3, v2
66 ; TONGA-NEXT: s_and_b64 exec, exec, s[14:15]
67 ; TONGA-NEXT: image_sample v[2:3], v[0:1], s[0:7], s[8:11] dmask:0x1 tfe d16
68 ; TONGA-NEXT: v_mov_b32_e32 v0, s12
69 ; TONGA-NEXT: v_mov_b32_e32 v1, s13
70 ; TONGA-NEXT: s_waitcnt vmcnt(0)
71 ; TONGA-NEXT: flat_store_dword v[0:1], v3
72 ; TONGA-NEXT: v_mov_b32_e32 v0, v2
73 ; TONGA-NEXT: s_waitcnt vmcnt(0)
74 ; TONGA-NEXT: ; return to shader part epilog
75 ;
76 ; GFX81-LABEL: image_sample_2d_f16_tfe:
77 ; GFX81: ; %bb.0: ; %main_body
78 ; GFX81-NEXT: s_mov_b64 s[14:15], exec
79 ; GFX81-NEXT: s_wqm_b64 exec, exec
80 ; GFX81-NEXT: v_mov_b32_e32 v2, 0
81 ; GFX81-NEXT: v_mov_b32_e32 v3, v2
82 ; GFX81-NEXT: s_and_b64 exec, exec, s[14:15]
83 ; GFX81-NEXT: image_sample v[2:3], v[0:1], s[0:7], s[8:11] dmask:0x1 tfe d16
84 ; GFX81-NEXT: v_mov_b32_e32 v0, s12
85 ; GFX81-NEXT: v_mov_b32_e32 v1, s13
86 ; GFX81-NEXT: s_waitcnt vmcnt(0)
87 ; GFX81-NEXT: flat_store_dword v[0:1], v3
88 ; GFX81-NEXT: v_mov_b32_e32 v0, v2
89 ; GFX81-NEXT: s_waitcnt vmcnt(0)
90 ; GFX81-NEXT: ; return to shader part epilog
91 ;
92 ; GFX9-LABEL: image_sample_2d_f16_tfe:
93 ; GFX9: ; %bb.0: ; %main_body
94 ; GFX9-NEXT: s_mov_b64 s[14:15], exec
95 ; GFX9-NEXT: s_wqm_b64 exec, exec
96 ; GFX9-NEXT: v_mov_b32_e32 v4, 0
97 ; GFX9-NEXT: v_mov_b32_e32 v5, v4
98 ; GFX9-NEXT: v_mov_b32_e32 v2, v4
99 ; GFX9-NEXT: v_mov_b32_e32 v3, v5
100 ; GFX9-NEXT: s_and_b64 exec, exec, s[14:15]
101 ; GFX9-NEXT: image_sample v[2:3], v[0:1], s[0:7], s[8:11] dmask:0x1 tfe d16
102 ; GFX9-NEXT: s_waitcnt vmcnt(0)
103 ; GFX9-NEXT: v_mov_b32_e32 v0, v2
104 ; GFX9-NEXT: global_store_dword v4, v3, s[12:13]
105 ; GFX9-NEXT: s_waitcnt vmcnt(0)
106 ; GFX9-NEXT: ; return to shader part epilog
107 ;
108 ; GFX10-LABEL: image_sample_2d_f16_tfe:
109 ; GFX10: ; %bb.0: ; %main_body
110 ; GFX10-NEXT: s_mov_b32 s14, exec_lo
111 ; GFX10-NEXT: s_wqm_b32 exec_lo, exec_lo
112 ; GFX10-NEXT: v_mov_b32_e32 v4, 0
113 ; GFX10-NEXT: v_mov_b32_e32 v3, v1
114 ; GFX10-NEXT: v_mov_b32_e32 v2, v0
115 ; GFX10-NEXT: v_mov_b32_e32 v5, v4
116 ; GFX10-NEXT: v_mov_b32_e32 v0, v4
117 ; GFX10-NEXT: v_mov_b32_e32 v1, v5
118 ; GFX10-NEXT: s_and_b32 exec_lo, exec_lo, s14
119 ; GFX10-NEXT: image_sample v[0:1], v[2:3], s[0:7], s[8:11] dmask:0x1 dim:SQ_RSRC_IMG_2D tfe d16
120 ; GFX10-NEXT: s_waitcnt vmcnt(0)
121 ; GFX10-NEXT: global_store_dword v4, v1, s[12:13]
122 ; GFX10-NEXT: ; return to shader part epilog
123 ;
124 ; GFX11-LABEL: image_sample_2d_f16_tfe:
125 ; GFX11: ; %bb.0: ; %main_body
126 ; GFX11-NEXT: s_mov_b32 s14, exec_lo
127 ; GFX11-NEXT: s_wqm_b32 exec_lo, exec_lo
128 ; GFX11-NEXT: v_dual_mov_b32 v4, 0 :: v_dual_mov_b32 v3, v1
129 ; GFX11-NEXT: v_mov_b32_e32 v2, v0
130 ; GFX11-NEXT: v_mov_b32_e32 v5, v4
131 ; GFX11-NEXT: v_dual_mov_b32 v0, v4 :: v_dual_mov_b32 v1, v5
132 ; GFX11-NEXT: s_and_b32 exec_lo, exec_lo, s14
133 ; GFX11-NEXT: image_sample v[0:1], v[2:3], s[0:7], s[8:11] dmask:0x1 dim:SQ_RSRC_IMG_2D tfe d16
134 ; GFX11-NEXT: s_waitcnt vmcnt(0)
135 ; GFX11-NEXT: global_store_b32 v4, v1, s[12:13]
136 ; GFX11-NEXT: ; return to shader part epilog
137 ;
138 ; GFX12-LABEL: image_sample_2d_f16_tfe:
139 ; GFX12: ; %bb.0: ; %main_body
140 ; GFX12-NEXT: s_mov_b32 s14, exec_lo
141 ; GFX12-NEXT: s_wqm_b32 exec_lo, exec_lo
142 ; GFX12-NEXT: v_mov_b32_e32 v4, 0
143 ; GFX12-NEXT: v_dual_mov_b32 v2, v1 :: v_dual_mov_b32 v3, v0
144 ; GFX12-NEXT: v_mov_b32_e32 v5, v4
145 ; GFX12-NEXT: v_dual_mov_b32 v0, v4 :: v_dual_mov_b32 v1, v5
146 ; GFX12-NEXT: s_and_b32 exec_lo, exec_lo, s14
147 ; GFX12-NEXT: image_sample v[0:1], [v3, v2], s[0:7], s[8:11] dmask:0x1 dim:SQ_RSRC_IMG_2D tfe d16
148 ; GFX12-NEXT: s_wait_samplecnt 0x0
149 ; GFX12-NEXT: global_store_b32 v4, v1, s[12:13]
150 ; GFX12-NEXT: ; return to shader part epilog
151 main_body:
152 %tex = call {half,i32} @llvm.amdgcn.image.sample.2d.f16i32.f32(i32 1, float %s, float %t, <8 x i32> %rsrc, <4 x i32> %samp, i1 false, i32 1, i32 0)
153 %tex.vec = extractvalue {half, i32} %tex, 0
154 %tex.err = extractvalue {half, i32} %tex, 1
155 store i32 %tex.err, ptr addrspace(1) %out, align 4
156 ret half %tex.vec
157 }
159 define amdgpu_ps float @image_sample_c_d_1d_v2f16(<8 x i32> inreg %rsrc, <4 x i32> inreg %samp, float %zcompare, float %dsdh, float %dsdv, float %s) {
160 ; TONGA-LABEL: image_sample_c_d_1d_v2f16:
161 ; TONGA: ; %bb.0: ; %main_body
162 ; TONGA-NEXT: image_sample_c_d v[0:1], v[0:3], s[0:7], s[8:11] dmask:0x3 d16
163 ; TONGA-NEXT: s_waitcnt vmcnt(0)
164 ; TONGA-NEXT: v_lshlrev_b32_e32 v1, 16, v1
165 ; TONGA-NEXT: v_or_b32_sdwa v0, v0, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
166 ; TONGA-NEXT: ; return to shader part epilog
167 ;
168 ; GFX81-LABEL: image_sample_c_d_1d_v2f16:
169 ; GFX81: ; %bb.0: ; %main_body
170 ; GFX81-NEXT: image_sample_c_d v0, v[0:3], s[0:7], s[8:11] dmask:0x3 d16
171 ; GFX81-NEXT: s_waitcnt vmcnt(0)
172 ; GFX81-NEXT: ; return to shader part epilog
173 ;
174 ; GFX9-LABEL: image_sample_c_d_1d_v2f16:
175 ; GFX9: ; %bb.0: ; %main_body
176 ; GFX9-NEXT: image_sample_c_d v0, v[0:3], s[0:7], s[8:11] dmask:0x3 d16
177 ; GFX9-NEXT: s_waitcnt vmcnt(0)
178 ; GFX9-NEXT: ; return to shader part epilog
179 ;
180 ; GFX10PLUS-LABEL: image_sample_c_d_1d_v2f16:
181 ; GFX10PLUS: ; %bb.0: ; %main_body
182 ; GFX10PLUS-NEXT: image_sample_c_d v0, v[0:3], s[0:7], s[8:11] dmask:0x3 dim:SQ_RSRC_IMG_1D d16
183 ; GFX10PLUS-NEXT: s_waitcnt vmcnt(0)
184 ; GFX10PLUS-NEXT: ; return to shader part epilog
185 ;
186 ; GFX12-LABEL: image_sample_c_d_1d_v2f16:
187 ; GFX12: ; %bb.0: ; %main_body
188 ; GFX12-NEXT: image_sample_c_d v0, [v0, v1, v2, v3], s[0:7], s[8:11] dmask:0x3 dim:SQ_RSRC_IMG_1D d16
189 ; GFX12-NEXT: s_wait_samplecnt 0x0
190 ; GFX12-NEXT: ; return to shader part epilog
191 main_body:
192 %tex = call <2 x half> @llvm.amdgcn.image.sample.c.d.1d.v2f16.f32.f32(i32 3, float %zcompare, float %dsdh, float %dsdv, float %s, <8 x i32> %rsrc, <4 x i32> %samp, i1 false, i32 0, i32 0)
193 %r = bitcast <2 x half> %tex to float
194 ret float %r
195 }
197 define amdgpu_ps <2 x float> @image_sample_c_d_1d_v2f16_tfe(<8 x i32> inreg %rsrc, <4 x i32> inreg %samp, float %zcompare, float %dsdh, float %dsdv, float %s) {
198 ; TONGA-LABEL: image_sample_c_d_1d_v2f16_tfe:
199 ; TONGA: ; %bb.0: ; %main_body
200 ; TONGA-NEXT: v_mov_b32_e32 v4, 0
201 ; TONGA-NEXT: v_mov_b32_e32 v5, v4
202 ; TONGA-NEXT: v_mov_b32_e32 v6, v4
203 ; TONGA-NEXT: image_sample_c_d v[4:6], v[0:3], s[0:7], s[8:11] dmask:0x3 tfe d16
204 ; TONGA-NEXT: s_waitcnt vmcnt(0)
205 ; TONGA-NEXT: v_lshlrev_b32_e32 v0, 16, v5
206 ; TONGA-NEXT: v_or_b32_sdwa v0, v4, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
207 ; TONGA-NEXT: v_mov_b32_e32 v1, v6
208 ; TONGA-NEXT: ; return to shader part epilog
209 ;
210 ; GFX81-LABEL: image_sample_c_d_1d_v2f16_tfe:
211 ; GFX81: ; %bb.0: ; %main_body
212 ; GFX81-NEXT: v_mov_b32_e32 v4, 0
213 ; GFX81-NEXT: v_mov_b32_e32 v5, v4
214 ; GFX81-NEXT: image_sample_c_d v[4:5], v[0:3], s[0:7], s[8:11] dmask:0x3 tfe d16
215 ; GFX81-NEXT: s_waitcnt vmcnt(0)
216 ; GFX81-NEXT: v_mov_b32_e32 v0, v4
217 ; GFX81-NEXT: v_mov_b32_e32 v1, v5
218 ; GFX81-NEXT: ; return to shader part epilog
219 ;
220 ; GFX9-LABEL: image_sample_c_d_1d_v2f16_tfe:
221 ; GFX9: ; %bb.0: ; %main_body
222 ; GFX9-NEXT: v_mov_b32_e32 v4, 0
223 ; GFX9-NEXT: v_mov_b32_e32 v5, v4
224 ; GFX9-NEXT: image_sample_c_d v[4:5], v[0:3], s[0:7], s[8:11] dmask:0x3 tfe d16
225 ; GFX9-NEXT: s_waitcnt vmcnt(0)
226 ; GFX9-NEXT: v_mov_b32_e32 v0, v4
227 ; GFX9-NEXT: v_mov_b32_e32 v1, v5
228 ; GFX9-NEXT: ; return to shader part epilog
229 ;
230 ; GFX10-LABEL: image_sample_c_d_1d_v2f16_tfe:
231 ; GFX10: ; %bb.0: ; %main_body
232 ; GFX10-NEXT: v_mov_b32_e32 v5, v0
233 ; GFX10-NEXT: v_mov_b32_e32 v0, 0
234 ; GFX10-NEXT: v_mov_b32_e32 v4, v1
235 ; GFX10-NEXT: v_mov_b32_e32 v1, v0
236 ; GFX10-NEXT: image_sample_c_d v[0:1], [v5, v4, v2, v3], s[0:7], s[8:11] dmask:0x3 dim:SQ_RSRC_IMG_1D tfe d16
237 ; GFX10-NEXT: s_waitcnt vmcnt(0)
238 ; GFX10-NEXT: ; return to shader part epilog
239 ;
240 ; GFX11-LABEL: image_sample_c_d_1d_v2f16_tfe:
241 ; GFX11: ; %bb.0: ; %main_body
242 ; GFX11-NEXT: v_dual_mov_b32 v4, v1 :: v_dual_mov_b32 v5, v0
243 ; GFX11-NEXT: v_mov_b32_e32 v0, 0
244 ; GFX11-NEXT: v_mov_b32_e32 v1, v0
245 ; GFX11-NEXT: image_sample_c_d v[0:1], [v5, v4, v2, v3], s[0:7], s[8:11] dmask:0x3 dim:SQ_RSRC_IMG_1D tfe d16
246 ; GFX11-NEXT: s_waitcnt vmcnt(0)
247 ; GFX11-NEXT: ; return to shader part epilog
248 ;
249 ; GFX12-LABEL: image_sample_c_d_1d_v2f16_tfe:
250 ; GFX12: ; %bb.0: ; %main_body
251 ; GFX12-NEXT: v_dual_mov_b32 v4, v1 :: v_dual_mov_b32 v5, v0
252 ; GFX12-NEXT: v_mov_b32_e32 v0, 0
253 ; GFX12-NEXT: v_mov_b32_e32 v1, v0
254 ; GFX12-NEXT: image_sample_c_d v[0:1], [v5, v4, v2, v3], s[0:7], s[8:11] dmask:0x3 dim:SQ_RSRC_IMG_1D tfe d16
255 ; GFX12-NEXT: s_wait_samplecnt 0x0
256 ; GFX12-NEXT: ; return to shader part epilog
257 main_body:
258 %tex = call {<2 x half>,i32} @llvm.amdgcn.image.sample.c.d.1d.v2f16i32.f32.f32(i32 3, float %zcompare, float %dsdh, float %dsdv, float %s, <8 x i32> %rsrc, <4 x i32> %samp, i1 false, i32 1, i32 0)
259 %tex.vec = extractvalue {<2 x half>, i32} %tex, 0
260 %tex.err = extractvalue {<2 x half>, i32} %tex, 1
261 %tex.vecf = bitcast <2 x half> %tex.vec to float
262 %r.0 = insertelement <2 x float> undef, float %tex.vecf, i32 0
263 %tex.errf = bitcast i32 %tex.err to float
264 %r = insertelement <2 x float> %r.0, float %tex.errf, i32 1
265 ret <2 x float> %r
266 }
268 define amdgpu_ps <2 x float> @image_sample_b_2d_v3f16(<8 x i32> inreg %rsrc, <4 x i32> inreg %samp, float %bias, float %s, float %t) {
269 ; TONGA-LABEL: image_sample_b_2d_v3f16:
270 ; TONGA: ; %bb.0: ; %main_body
271 ; TONGA-NEXT: s_mov_b64 s[12:13], exec
272 ; TONGA-NEXT: s_wqm_b64 exec, exec
273 ; TONGA-NEXT: s_and_b64 exec, exec, s[12:13]
274 ; TONGA-NEXT: image_sample_b v[0:2], v[0:2], s[0:7], s[8:11] dmask:0x7 d16
275 ; TONGA-NEXT: s_mov_b32 s0, 0x1000504
276 ; TONGA-NEXT: s_waitcnt vmcnt(0)
277 ; TONGA-NEXT: v_perm_b32 v0, v0, v1, s0
278 ; TONGA-NEXT: v_mov_b32_e32 v1, v2
279 ; TONGA-NEXT: ; return to shader part epilog
280 ;
281 ; GFX81-LABEL: image_sample_b_2d_v3f16:
282 ; GFX81: ; %bb.0: ; %main_body
283 ; GFX81-NEXT: s_mov_b64 s[12:13], exec
284 ; GFX81-NEXT: s_wqm_b64 exec, exec
285 ; GFX81-NEXT: s_and_b64 exec, exec, s[12:13]
286 ; GFX81-NEXT: image_sample_b v[0:1], v[0:2], s[0:7], s[8:11] dmask:0x7 d16
287 ; GFX81-NEXT: s_waitcnt vmcnt(0)
288 ; GFX81-NEXT: ; return to shader part epilog
289 ;
290 ; GFX9-LABEL: image_sample_b_2d_v3f16:
291 ; GFX9: ; %bb.0: ; %main_body
292 ; GFX9-NEXT: s_mov_b64 s[12:13], exec
293 ; GFX9-NEXT: s_wqm_b64 exec, exec
294 ; GFX9-NEXT: s_and_b64 exec, exec, s[12:13]
295 ; GFX9-NEXT: image_sample_b v[0:1], v[0:2], s[0:7], s[8:11] dmask:0x7 d16
296 ; GFX9-NEXT: s_waitcnt vmcnt(0)
297 ; GFX9-NEXT: ; return to shader part epilog
298 ;
299 ; GFX10PLUS-LABEL: image_sample_b_2d_v3f16:
300 ; GFX10PLUS: ; %bb.0: ; %main_body
301 ; GFX10PLUS-NEXT: s_mov_b32 s12, exec_lo
302 ; GFX10PLUS-NEXT: s_wqm_b32 exec_lo, exec_lo
303 ; GFX10PLUS-NEXT: s_and_b32 exec_lo, exec_lo, s12
304 ; GFX10PLUS-NEXT: image_sample_b v[0:1], v[0:2], s[0:7], s[8:11] dmask:0x7 dim:SQ_RSRC_IMG_2D d16
305 ; GFX10PLUS-NEXT: s_waitcnt vmcnt(0)
306 ; GFX10PLUS-NEXT: ; return to shader part epilog
307 ;
308 ; GFX12-LABEL: image_sample_b_2d_v3f16:
309 ; GFX12: ; %bb.0: ; %main_body
310 ; GFX12-NEXT: s_mov_b32 s12, exec_lo
311 ; GFX12-NEXT: s_wqm_b32 exec_lo, exec_lo
312 ; GFX12-NEXT: s_and_b32 exec_lo, exec_lo, s12
313 ; GFX12-NEXT: image_sample_b v[0:1], [v0, v1, v2], s[0:7], s[8:11] dmask:0x7 dim:SQ_RSRC_IMG_2D d16
314 ; GFX12-NEXT: s_wait_samplecnt 0x0
315 ; GFX12-NEXT: ; return to shader part epilog
316 main_body:
317 %tex = call <3 x half> @llvm.amdgcn.image.sample.b.2d.v3f16.f32.f32(i32 7, float %bias, float %s, float %t, <8 x i32> %rsrc, <4 x i32> %samp, i1 false, i32 0, i32 0)
318 %tex_wide = shufflevector <3 x half> %tex, <3 x half> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
319 %r = bitcast <4 x half> %tex_wide to <2 x float>
320 ret <2 x float> %r
321 }
323 define amdgpu_ps <4 x float> @image_sample_b_2d_v3f16_tfe(<8 x i32> inreg %rsrc, <4 x i32> inreg %samp, float %bias, float %s, float %t) {
324 ; TONGA-LABEL: image_sample_b_2d_v3f16_tfe:
325 ; TONGA: ; %bb.0: ; %main_body
326 ; TONGA-NEXT: s_mov_b64 s[12:13], exec
327 ; TONGA-NEXT: s_wqm_b64 exec, exec
328 ; TONGA-NEXT: v_mov_b32_e32 v3, 0
329 ; TONGA-NEXT: v_mov_b32_e32 v4, v3
330 ; TONGA-NEXT: v_mov_b32_e32 v5, v3
331 ; TONGA-NEXT: v_mov_b32_e32 v6, v3
332 ; TONGA-NEXT: s_and_b64 exec, exec, s[12:13]
333 ; TONGA-NEXT: image_sample_b v[3:6], v[0:2], s[0:7], s[8:11] dmask:0x7 tfe d16
334 ; TONGA-NEXT: s_mov_b32 s0, 0x1000504
335 ; TONGA-NEXT: s_waitcnt vmcnt(0)
336 ; TONGA-NEXT: v_perm_b32 v0, v3, v4, s0
337 ; TONGA-NEXT: v_mov_b32_e32 v1, v5
338 ; TONGA-NEXT: v_mov_b32_e32 v2, v6
339 ; TONGA-NEXT: ; return to shader part epilog
340 ;
341 ; GFX81-LABEL: image_sample_b_2d_v3f16_tfe:
342 ; GFX81: ; %bb.0: ; %main_body
343 ; GFX81-NEXT: s_mov_b64 s[12:13], exec
344 ; GFX81-NEXT: s_wqm_b64 exec, exec
345 ; GFX81-NEXT: v_mov_b32_e32 v3, 0
346 ; GFX81-NEXT: v_mov_b32_e32 v4, v3
347 ; GFX81-NEXT: v_mov_b32_e32 v5, v3
348 ; GFX81-NEXT: s_and_b64 exec, exec, s[12:13]
349 ; GFX81-NEXT: image_sample_b v[3:5], v[0:2], s[0:7], s[8:11] dmask:0x7 tfe d16
350 ; GFX81-NEXT: s_waitcnt vmcnt(0)
351 ; GFX81-NEXT: v_mov_b32_e32 v0, v3
352 ; GFX81-NEXT: v_mov_b32_e32 v1, v4
353 ; GFX81-NEXT: v_mov_b32_e32 v2, v5
354 ; GFX81-NEXT: ; return to shader part epilog
355 ;
356 ; GFX9-LABEL: image_sample_b_2d_v3f16_tfe:
357 ; GFX9: ; %bb.0: ; %main_body
358 ; GFX9-NEXT: s_mov_b64 s[12:13], exec
359 ; GFX9-NEXT: s_wqm_b64 exec, exec
360 ; GFX9-NEXT: v_mov_b32_e32 v3, 0
361 ; GFX9-NEXT: v_mov_b32_e32 v4, v3
362 ; GFX9-NEXT: v_mov_b32_e32 v5, v3
363 ; GFX9-NEXT: s_and_b64 exec, exec, s[12:13]
364 ; GFX9-NEXT: image_sample_b v[3:5], v[0:2], s[0:7], s[8:11] dmask:0x7 tfe d16
365 ; GFX9-NEXT: s_waitcnt vmcnt(0)
366 ; GFX9-NEXT: v_mov_b32_e32 v0, v3
367 ; GFX9-NEXT: v_mov_b32_e32 v1, v4
368 ; GFX9-NEXT: v_mov_b32_e32 v2, v5
369 ; GFX9-NEXT: ; return to shader part epilog
370 ;
371 ; GFX10-LABEL: image_sample_b_2d_v3f16_tfe:
372 ; GFX10: ; %bb.0: ; %main_body
373 ; GFX10-NEXT: s_mov_b32 s12, exec_lo
374 ; GFX10-NEXT: s_wqm_b32 exec_lo, exec_lo
375 ; GFX10-NEXT: v_mov_b32_e32 v3, v0
376 ; GFX10-NEXT: v_mov_b32_e32 v0, 0
377 ; GFX10-NEXT: v_mov_b32_e32 v5, v2
378 ; GFX10-NEXT: v_mov_b32_e32 v4, v1
379 ; GFX10-NEXT: v_mov_b32_e32 v1, v0
380 ; GFX10-NEXT: v_mov_b32_e32 v2, v0
381 ; GFX10-NEXT: s_and_b32 exec_lo, exec_lo, s12
382 ; GFX10-NEXT: image_sample_b v[0:2], v[3:5], s[0:7], s[8:11] dmask:0x7 dim:SQ_RSRC_IMG_2D tfe d16
383 ; GFX10-NEXT: s_waitcnt vmcnt(0)
384 ; GFX10-NEXT: ; return to shader part epilog
385 ;
386 ; GFX11-LABEL: image_sample_b_2d_v3f16_tfe:
387 ; GFX11: ; %bb.0: ; %main_body
388 ; GFX11-NEXT: s_mov_b32 s12, exec_lo
389 ; GFX11-NEXT: s_wqm_b32 exec_lo, exec_lo
390 ; GFX11-NEXT: v_dual_mov_b32 v3, v0 :: v_dual_mov_b32 v0, 0
391 ; GFX11-NEXT: v_dual_mov_b32 v5, v2 :: v_dual_mov_b32 v4, v1
392 ; GFX11-NEXT: v_mov_b32_e32 v1, v0
393 ; GFX11-NEXT: v_mov_b32_e32 v2, v0
394 ; GFX11-NEXT: s_and_b32 exec_lo, exec_lo, s12
395 ; GFX11-NEXT: image_sample_b v[0:2], v[3:5], s[0:7], s[8:11] dmask:0x7 dim:SQ_RSRC_IMG_2D tfe d16
396 ; GFX11-NEXT: s_waitcnt vmcnt(0)
397 ; GFX11-NEXT: ; return to shader part epilog
398 ;
399 ; GFX12-LABEL: image_sample_b_2d_v3f16_tfe:
400 ; GFX12: ; %bb.0: ; %main_body
401 ; GFX12-NEXT: s_mov_b32 s12, exec_lo
402 ; GFX12-NEXT: s_wqm_b32 exec_lo, exec_lo
403 ; GFX12-NEXT: v_dual_mov_b32 v5, v0 :: v_dual_mov_b32 v0, 0
404 ; GFX12-NEXT: v_dual_mov_b32 v3, v2 :: v_dual_mov_b32 v4, v1
405 ; GFX12-NEXT: v_dual_mov_b32 v1, v0 :: v_dual_mov_b32 v2, v0
406 ; GFX12-NEXT: s_and_b32 exec_lo, exec_lo, s12
407 ; GFX12-NEXT: image_sample_b v[0:2], [v5, v4, v3], s[0:7], s[8:11] dmask:0x7 dim:SQ_RSRC_IMG_2D tfe d16
408 ; GFX12-NEXT: s_wait_samplecnt 0x0
409 ; GFX12-NEXT: ; return to shader part epilog
410 main_body:
411 %tex = call {<3 x half>,i32} @llvm.amdgcn.image.sample.b.2d.v3f16i32.f32.f32(i32 7, float %bias, float %s, float %t, <8 x i32> %rsrc, <4 x i32> %samp, i1 false, i32 1, i32 0)
412 %tex.vec = extractvalue {<3 x half>, i32} %tex, 0
413 %tex.vec_wide = shufflevector <3 x half> %tex.vec, <3 x half> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
414 %tex.err = extractvalue {<3 x half>, i32} %tex, 1
415 %tex.vecf = bitcast <4 x half> %tex.vec_wide to <2 x float>
416 %tex.vecf.0 = extractelement <2 x float> %tex.vecf, i32 0
417 %tex.vecf.1 = extractelement <2 x float> %tex.vecf, i32 1
418 %r.0 = insertelement <4 x float> undef, float %tex.vecf.0, i32 0
419 %r.1 = insertelement <4 x float> %r.0, float %tex.vecf.1, i32 1
420 %tex.errf = bitcast i32 %tex.err to float
421 %r = insertelement <4 x float> %r.1, float %tex.errf, i32 2
422 ret <4 x float> %r
423 }
425 define amdgpu_ps <2 x float> @image_sample_b_2d_v4f16(<8 x i32> inreg %rsrc, <4 x i32> inreg %samp, float %bias, float %s, float %t) {
426 ; TONGA-LABEL: image_sample_b_2d_v4f16:
427 ; TONGA: ; %bb.0: ; %main_body
428 ; TONGA-NEXT: s_mov_b64 s[12:13], exec
429 ; TONGA-NEXT: s_wqm_b64 exec, exec
430 ; TONGA-NEXT: s_and_b64 exec, exec, s[12:13]
431 ; TONGA-NEXT: image_sample_b v[0:3], v[0:2], s[0:7], s[8:11] dmask:0xf d16
432 ; TONGA-NEXT: s_mov_b32 s0, 0x1000504
433 ; TONGA-NEXT: s_waitcnt vmcnt(0)
434 ; TONGA-NEXT: v_perm_b32 v0, v0, v1, s0
435 ; TONGA-NEXT: v_perm_b32 v1, v2, v3, s0
436 ; TONGA-NEXT: ; return to shader part epilog
437 ;
438 ; GFX81-LABEL: image_sample_b_2d_v4f16:
439 ; GFX81: ; %bb.0: ; %main_body
440 ; GFX81-NEXT: s_mov_b64 s[12:13], exec
441 ; GFX81-NEXT: s_wqm_b64 exec, exec
442 ; GFX81-NEXT: s_and_b64 exec, exec, s[12:13]
443 ; GFX81-NEXT: image_sample_b v[0:1], v[0:2], s[0:7], s[8:11] dmask:0xf d16
444 ; GFX81-NEXT: s_waitcnt vmcnt(0)
445 ; GFX81-NEXT: ; return to shader part epilog
446 ;
447 ; GFX9-LABEL: image_sample_b_2d_v4f16:
448 ; GFX9: ; %bb.0: ; %main_body
449 ; GFX9-NEXT: s_mov_b64 s[12:13], exec
450 ; GFX9-NEXT: s_wqm_b64 exec, exec
451 ; GFX9-NEXT: s_and_b64 exec, exec, s[12:13]
452 ; GFX9-NEXT: image_sample_b v[0:1], v[0:2], s[0:7], s[8:11] dmask:0xf d16
453 ; GFX9-NEXT: s_waitcnt vmcnt(0)
454 ; GFX9-NEXT: ; return to shader part epilog
455 ;
456 ; GFX10PLUS-LABEL: image_sample_b_2d_v4f16:
457 ; GFX10PLUS: ; %bb.0: ; %main_body
458 ; GFX10PLUS-NEXT: s_mov_b32 s12, exec_lo
459 ; GFX10PLUS-NEXT: s_wqm_b32 exec_lo, exec_lo
460 ; GFX10PLUS-NEXT: s_and_b32 exec_lo, exec_lo, s12
461 ; GFX10PLUS-NEXT: image_sample_b v[0:1], v[0:2], s[0:7], s[8:11] dmask:0xf dim:SQ_RSRC_IMG_2D d16
462 ; GFX10PLUS-NEXT: s_waitcnt vmcnt(0)
463 ; GFX10PLUS-NEXT: ; return to shader part epilog
464 ;
465 ; GFX12-LABEL: image_sample_b_2d_v4f16:
466 ; GFX12: ; %bb.0: ; %main_body
467 ; GFX12-NEXT: s_mov_b32 s12, exec_lo
468 ; GFX12-NEXT: s_wqm_b32 exec_lo, exec_lo
469 ; GFX12-NEXT: s_and_b32 exec_lo, exec_lo, s12
470 ; GFX12-NEXT: image_sample_b v[0:1], [v0, v1, v2], s[0:7], s[8:11] dmask:0xf dim:SQ_RSRC_IMG_2D d16
471 ; GFX12-NEXT: s_wait_samplecnt 0x0
472 ; GFX12-NEXT: ; return to shader part epilog
473 main_body:
474 %tex = call <4 x half> @llvm.amdgcn.image.sample.b.2d.v4f16.f32.f32(i32 15, float %bias, float %s, float %t, <8 x i32> %rsrc, <4 x i32> %samp, i1 false, i32 0, i32 0)
475 %r = bitcast <4 x half> %tex to <2 x float>
476 ret <2 x float> %r
477 }
479 define amdgpu_ps <4 x float> @image_sample_b_2d_v4f16_tfe(<8 x i32> inreg %rsrc, <4 x i32> inreg %samp, float %bias, float %s, float %t) {
480 ; TONGA-LABEL: image_sample_b_2d_v4f16_tfe:
481 ; TONGA: ; %bb.0: ; %main_body
482 ; TONGA-NEXT: s_mov_b64 s[12:13], exec
483 ; TONGA-NEXT: s_wqm_b64 exec, exec
484 ; TONGA-NEXT: v_mov_b32_e32 v3, 0
485 ; TONGA-NEXT: v_mov_b32_e32 v4, v3
486 ; TONGA-NEXT: v_mov_b32_e32 v5, v3
487 ; TONGA-NEXT: v_mov_b32_e32 v6, v3
488 ; TONGA-NEXT: v_mov_b32_e32 v7, v3
489 ; TONGA-NEXT: s_and_b64 exec, exec, s[12:13]
490 ; TONGA-NEXT: image_sample_b v[3:7], v[0:2], s[0:7], s[8:11] dmask:0xf tfe d16
491 ; TONGA-NEXT: s_mov_b32 s0, 0x1000504
492 ; TONGA-NEXT: s_waitcnt vmcnt(0)
493 ; TONGA-NEXT: v_perm_b32 v0, v3, v4, s0
494 ; TONGA-NEXT: v_perm_b32 v1, v5, v6, s0
495 ; TONGA-NEXT: v_mov_b32_e32 v2, v7
496 ; TONGA-NEXT: ; return to shader part epilog
497 ;
498 ; GFX81-LABEL: image_sample_b_2d_v4f16_tfe:
499 ; GFX81: ; %bb.0: ; %main_body
500 ; GFX81-NEXT: s_mov_b64 s[12:13], exec
501 ; GFX81-NEXT: s_wqm_b64 exec, exec
502 ; GFX81-NEXT: v_mov_b32_e32 v3, 0
503 ; GFX81-NEXT: v_mov_b32_e32 v4, v3
504 ; GFX81-NEXT: v_mov_b32_e32 v5, v3
505 ; GFX81-NEXT: s_and_b64 exec, exec, s[12:13]
506 ; GFX81-NEXT: image_sample_b v[3:5], v[0:2], s[0:7], s[8:11] dmask:0xf tfe d16
507 ; GFX81-NEXT: s_waitcnt vmcnt(0)
508 ; GFX81-NEXT: v_mov_b32_e32 v0, v3
509 ; GFX81-NEXT: v_mov_b32_e32 v1, v4
510 ; GFX81-NEXT: v_mov_b32_e32 v2, v5
511 ; GFX81-NEXT: ; return to shader part epilog
512 ;
513 ; GFX9-LABEL: image_sample_b_2d_v4f16_tfe:
514 ; GFX9: ; %bb.0: ; %main_body
515 ; GFX9-NEXT: s_mov_b64 s[12:13], exec
516 ; GFX9-NEXT: s_wqm_b64 exec, exec
517 ; GFX9-NEXT: v_mov_b32_e32 v3, 0
518 ; GFX9-NEXT: v_mov_b32_e32 v4, v3
519 ; GFX9-NEXT: v_mov_b32_e32 v5, v3
520 ; GFX9-NEXT: s_and_b64 exec, exec, s[12:13]
521 ; GFX9-NEXT: image_sample_b v[3:5], v[0:2], s[0:7], s[8:11] dmask:0xf tfe d16
522 ; GFX9-NEXT: s_waitcnt vmcnt(0)
523 ; GFX9-NEXT: v_mov_b32_e32 v0, v3
524 ; GFX9-NEXT: v_mov_b32_e32 v1, v4
525 ; GFX9-NEXT: v_mov_b32_e32 v2, v5
526 ; GFX9-NEXT: ; return to shader part epilog
527 ;
528 ; GFX10-LABEL: image_sample_b_2d_v4f16_tfe:
529 ; GFX10: ; %bb.0: ; %main_body
530 ; GFX10-NEXT: s_mov_b32 s12, exec_lo
531 ; GFX10-NEXT: s_wqm_b32 exec_lo, exec_lo
532 ; GFX10-NEXT: v_mov_b32_e32 v3, v0
533 ; GFX10-NEXT: v_mov_b32_e32 v0, 0
534 ; GFX10-NEXT: v_mov_b32_e32 v5, v2
535 ; GFX10-NEXT: v_mov_b32_e32 v4, v1
536 ; GFX10-NEXT: v_mov_b32_e32 v1, v0
537 ; GFX10-NEXT: v_mov_b32_e32 v2, v0
538 ; GFX10-NEXT: s_and_b32 exec_lo, exec_lo, s12
539 ; GFX10-NEXT: image_sample_b v[0:2], v[3:5], s[0:7], s[8:11] dmask:0xf dim:SQ_RSRC_IMG_2D tfe d16
540 ; GFX10-NEXT: s_waitcnt vmcnt(0)
541 ; GFX10-NEXT: ; return to shader part epilog
542 ;
543 ; GFX11-LABEL: image_sample_b_2d_v4f16_tfe:
544 ; GFX11: ; %bb.0: ; %main_body
545 ; GFX11-NEXT: s_mov_b32 s12, exec_lo
546 ; GFX11-NEXT: s_wqm_b32 exec_lo, exec_lo
547 ; GFX11-NEXT: v_dual_mov_b32 v3, v0 :: v_dual_mov_b32 v0, 0
548 ; GFX11-NEXT: v_dual_mov_b32 v5, v2 :: v_dual_mov_b32 v4, v1
549 ; GFX11-NEXT: v_mov_b32_e32 v1, v0
550 ; GFX11-NEXT: v_mov_b32_e32 v2, v0
551 ; GFX11-NEXT: s_and_b32 exec_lo, exec_lo, s12
552 ; GFX11-NEXT: image_sample_b v[0:2], v[3:5], s[0:7], s[8:11] dmask:0xf dim:SQ_RSRC_IMG_2D tfe d16
553 ; GFX11-NEXT: s_waitcnt vmcnt(0)
554 ; GFX11-NEXT: ; return to shader part epilog
555 ;
556 ; GFX12-LABEL: image_sample_b_2d_v4f16_tfe:
557 ; GFX12: ; %bb.0: ; %main_body
558 ; GFX12-NEXT: s_mov_b32 s12, exec_lo
559 ; GFX12-NEXT: s_wqm_b32 exec_lo, exec_lo
560 ; GFX12-NEXT: v_dual_mov_b32 v5, v0 :: v_dual_mov_b32 v0, 0
561 ; GFX12-NEXT: v_dual_mov_b32 v3, v2 :: v_dual_mov_b32 v4, v1
562 ; GFX12-NEXT: v_dual_mov_b32 v1, v0 :: v_dual_mov_b32 v2, v0
563 ; GFX12-NEXT: s_and_b32 exec_lo, exec_lo, s12
564 ; GFX12-NEXT: image_sample_b v[0:2], [v5, v4, v3], s[0:7], s[8:11] dmask:0xf dim:SQ_RSRC_IMG_2D tfe d16
565 ; GFX12-NEXT: s_wait_samplecnt 0x0
566 ; GFX12-NEXT: ; return to shader part epilog
567 main_body:
568 %tex = call {<4 x half>,i32} @llvm.amdgcn.image.sample.b.2d.v4f16i32.f32.f32(i32 15, float %bias, float %s, float %t, <8 x i32> %rsrc, <4 x i32> %samp, i1 false, i32 1, i32 0)
569 %tex.vec = extractvalue {<4 x half>, i32} %tex, 0
570 %tex.err = extractvalue {<4 x half>, i32} %tex, 1
571 %tex.vecf = bitcast <4 x half> %tex.vec to <2 x float>
572 %tex.vecf.0 = extractelement <2 x float> %tex.vecf, i32 0
573 %tex.vecf.1 = extractelement <2 x float> %tex.vecf, i32 1
574 %r.0 = insertelement <4 x float> undef, float %tex.vecf.0, i32 0
575 %r.1 = insertelement <4 x float> %r.0, float %tex.vecf.1, i32 1
576 %tex.errf = bitcast i32 %tex.err to float
577 %r = insertelement <4 x float> %r.1, float %tex.errf, i32 2
578 ret <4 x float> %r
579 }
581 declare half @llvm.amdgcn.image.sample.2d.f16.f32(i32, float, float, <8 x i32>, <4 x i32>, i1, i32, i32) #1
582 declare {half,i32} @llvm.amdgcn.image.sample.2d.f16i32.f32(i32, float, float, <8 x i32>, <4 x i32>, i1, i32, i32) #1
583 declare <3 x half> @llvm.amdgcn.image.sample.2d.v3f16.f32(i32, float, float, <8 x i32>, <4 x i32>, i1, i32, i32) #1
584 declare <4 x half> @llvm.amdgcn.image.sample.2d.v4f16.f32(i32, float, float, <8 x i32>, <4 x i32>, i1, i32, i32) #1
585 declare {<2 x half>,i32} @llvm.amdgcn.image.sample.2d.v2f16i32.f32(i32, float, float, <8 x i32>, <4 x i32>, i1, i32, i32) #1
586 declare <2 x half> @llvm.amdgcn.image.sample.c.d.1d.v2f16.f32.f32(i32, float, float, float, float, <8 x i32>, <4 x i32>, i1, i32, i32) #1
587 declare {<2 x half>,i32} @llvm.amdgcn.image.sample.c.d.1d.v2f16i32.f32.f32(i32, float, float, float, float, <8 x i32>, <4 x i32>, i1, i32, i32) #1
588 declare <3 x half> @llvm.amdgcn.image.sample.b.2d.v3f16.f32.f32(i32, float, float, float, <8 x i32>, <4 x i32>, i1, i32, i32) #1
589 declare {<3 x half>,i32} @llvm.amdgcn.image.sample.b.2d.v3f16i32.f32.f32(i32, float, float, float, <8 x i32>, <4 x i32>, i1, i32, i32) #1
590 declare <4 x half> @llvm.amdgcn.image.sample.b.2d.v4f16.f32.f32(i32, float, float, float, <8 x i32>, <4 x i32>, i1, i32, i32) #1
591 declare {<4 x half>,i32} @llvm.amdgcn.image.sample.b.2d.v4f16i32.f32.f32(i32, float, float, float, <8 x i32>, <4 x i32>, i1, i32, i32) #1
593 attributes #0 = { nounwind }
594 attributes #1 = { nounwind readonly }
595 attributes #2 = { nounwind readnone }