1 ; RUN: llc -mtriple=amdgcn -mcpu=fiji -verify-machineinstrs < %s | FileCheck -check-prefixes=GCN,W64 %s
2 ; RUN: llc -mtriple=amdgcn -mcpu=gfx1010 -mattr=+wavefrontsize32 -verify-machineinstrs < %s | FileCheck -check-prefixes=GCN,W32 %s
3 ; RUN: llc -mtriple=amdgcn -mcpu=gfx1010 -mattr=+wavefrontsize64 -verify-machineinstrs < %s | FileCheck -check-prefixes=GCN,W64 %s
4 ; RUN: llc -mtriple=amdgcn -mcpu=gfx1100 -mattr=+wavefrontsize32 -verify-machineinstrs -amdgpu-enable-vopd=0 < %s | FileCheck -check-prefixes=GCN,W32 %s
5 ; RUN: llc -mtriple=amdgcn -mcpu=gfx1100 -mattr=+wavefrontsize64 -verify-machineinstrs < %s | FileCheck -check-prefixes=GCN,W64 %s
7 ; GCN-LABEL: {{^}}fold_wavefrontsize:
9 ; W32: v_mov_b32_e32 [[V:v[0-9]+]], 32
10 ; W64: v_mov_b32_e32 [[V:v[0-9]+]], 64
11 ; GCN: store_{{dword|b32}} v{{.+}}, [[V]]
14 define amdgpu_kernel void @fold_wavefrontsize(ptr addrspace(1) nocapture %arg) {
17 %tmp = tail call i32 @llvm.amdgcn.wavefrontsize() #0
18 store i32 %tmp, ptr addrspace(1) %arg, align 4
22 ; GCN-LABEL: {{^}}fold_and_optimize_wavefrontsize:
24 ; W32: v_mov_b32_e32 [[V:v[0-9]+]], 1{{$}}
25 ; W64: v_mov_b32_e32 [[V:v[0-9]+]], 2{{$}}
27 ; GCN: store_{{dword|b32}} v{{.+}}, [[V]]
30 define amdgpu_kernel void @fold_and_optimize_wavefrontsize(ptr addrspace(1) nocapture %arg) {
32 %tmp = tail call i32 @llvm.amdgcn.wavefrontsize() #0
33 %tmp1 = icmp ugt i32 %tmp, 32
34 %tmp2 = select i1 %tmp1, i32 2, i32 1
35 store i32 %tmp2, ptr addrspace(1) %arg
39 ; GCN-LABEL: {{^}}fold_and_optimize_if_wavefrontsize:
41 define amdgpu_kernel void @fold_and_optimize_if_wavefrontsize(ptr addrspace(1) nocapture %arg) {
43 %tmp = tail call i32 @llvm.amdgcn.wavefrontsize() #0
44 %tmp1 = icmp ugt i32 %tmp, 32
45 br i1 %tmp1, label %bb2, label %bb3
48 store i32 1, ptr addrspace(1) %arg, align 4
51 bb3: ; preds = %bb2, %bb
55 declare i32 @llvm.amdgcn.wavefrontsize() #0
57 attributes #0 = { nounwind readnone speculatable }