lib/Target/Blackfin/BlackfinRegisterInfo.h

   1 //===- BlackfinRegisterInfo.h - Blackfin Register Information ..-*- C++ -*-===//
   2 //
   3 //                     The LLVM Compiler Infrastructure
   4 //
   5 // This file is distributed under the University of Illinois Open Source
   6 // License. See LICENSE.TXT for details.
   7 //
   8 //===----------------------------------------------------------------------===//
   9 //
  10 // This file contains the Blackfin implementation of the TargetRegisterInfo
  11 // class.
  12 //
  13 //===----------------------------------------------------------------------===//
  14
  15 #ifndef BLACKFINREGISTERINFO_H
  16 #define BLACKFINREGISTERINFO_H
  17
  18 #include "llvm/Target/TargetRegisterInfo.h"
  19 #include "BlackfinGenRegisterInfo.h.inc"
  20
  21 namespace llvm {
  22
  23   class BlackfinSubtarget;
  24   class TargetInstrInfo;
  25   class Type;
  26
  27   template<unsigned N>
  28   static inline bool isImm(int x) {
  29     return x >= -(1<<(N-1)) && x < (1<<(N-1));
  30   }
  31
  32   template<unsigned N>
  33   static inline bool isUimm(unsigned x) {
  34     return x < (1<<N);
  35   }
  36
  37   // Subregister indices, keep in sync with BlackfinRegisterInfo.td
  38   enum BfinSubregIdx {
  39     bfin_subreg_lo16 = 1,
  40     bfin_subreg_hi16 = 2,
  41     bfin_subreg_lo32 = 3
  42   };
  43
  44   struct BlackfinRegisterInfo : public BlackfinGenRegisterInfo {
  45     BlackfinSubtarget &Subtarget;
  46     const TargetInstrInfo &TII;
  47
  48     BlackfinRegisterInfo(BlackfinSubtarget &st, const TargetInstrInfo &tii);
  49
  50     /// Code Generation virtual methods...
  51     const unsigned *getCalleeSavedRegs(const MachineFunction *MF = 0) const;
  52
  53     const TargetRegisterClass* const*
  54     getCalleeSavedRegClasses(const MachineFunction *MF = 0) const;
  55
  56     BitVector getReservedRegs(const MachineFunction &MF) const;
  57
  58     // getSubReg implemented by tablegen
  59
  60     const TargetRegisterClass *getPointerRegClass(unsigned Kind = 0) const {
  61       return &BF::PRegClass;
  62     }
  63
  64     const TargetRegisterClass *getPhysicalRegisterRegClass(unsigned reg,
  65                                                            MVT VT) const;
  66
  67     bool hasFP(const MachineFunction &MF) const;
  68
  69     // bool hasReservedCallFrame(MachineFunction &MF) const;
  70
  71     bool requiresRegisterScavenging(const MachineFunction &MF) const;
  72
  73     void eliminateCallFramePseudoInstr(MachineFunction &MF,
  74                                        MachineBasicBlock &MBB,
  75                                        MachineBasicBlock::iterator I) const;
  76
  77     void eliminateFrameIndex(MachineBasicBlock::iterator II,
  78                              int SPAdj, RegScavenger *RS = NULL) const;
  79
  80     void processFunctionBeforeCalleeSavedScan(MachineFunction &MF,
  81                                               RegScavenger *RS) const;
  82
  83     void processFunctionBeforeFrameFinalized(MachineFunction &MF) const;
  84
  85     void emitPrologue(MachineFunction &MF) const;
  86     void emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const;
  87
  88     unsigned getFrameRegister(MachineFunction &MF) const;
  89     int getFrameIndexOffset(MachineFunction &MF, int FI) const;
  90     unsigned getRARegister() const;
  91
  92     // Exception handling queries.
  93     unsigned getEHExceptionRegister() const;
  94     unsigned getEHHandlerRegister() const;
  95
  96     int getDwarfRegNum(unsigned RegNum, bool isEH) const;
  97
  98     // Utility functions
  99     void adjustRegister(MachineBasicBlock &MBB,
 100                         MachineBasicBlock::iterator I,
 101                         DebugLoc DL,
 102                         unsigned Reg,
 103                         unsigned ScratchReg,
 104                         int delta) const;
 105     void loadConstant(MachineBasicBlock &MBB,
 106                       MachineBasicBlock::iterator I,
 107                       DebugLoc DL,
 108                       unsigned Reg,
 109                       int value) const;
 110   };
 111
 112 } // end namespace llvm
 113
 114 #endif