lib/Target/SystemZ/SystemZInstrInfo.h

   1 //===- SystemZInstrInfo.h - SystemZ Instruction Information -------*- C++ -*-===//
   2 //
   3 //                     The LLVM Compiler Infrastructure
   4 //
   5 // This file is distributed under the University of Illinois Open Source
   6 // License. See LICENSE.TXT for details.
   7 //
   8 //===----------------------------------------------------------------------===//
   9 //
  10 // This file contains the SystemZ implementation of the TargetInstrInfo class.
  11 //
  12 //===----------------------------------------------------------------------===//
  13
  14 #ifndef LLVM_TARGET_SYSTEMZINSTRINFO_H
  15 #define LLVM_TARGET_SYSTEMZINSTRINFO_H
  16
  17 #include "SystemZ.h"
  18 #include "SystemZRegisterInfo.h"
  19 #include "llvm/ADT/IndexedMap.h"
  20 #include "llvm/Target/TargetInstrInfo.h"
  21
  22 namespace llvm {
  23
  24 class SystemZTargetMachine;
  25
  26 /// SystemZII - This namespace holds all of the target specific flags that
  27 /// instruction info tracks.
  28 ///
  29 namespace SystemZII {
  30   enum {
  31     //===------------------------------------------------------------------===//
  32     // SystemZ Specific MachineOperand flags.
  33
  34     MO_NO_FLAG = 0,
  35
  36     /// MO_GOTENT - On a symbol operand this indicates that the immediate is
  37     /// the offset to the location of the symbol name from the base of the GOT.
  38     ///
  39     ///    SYMBOL_LABEL @GOTENT
  40     MO_GOTENT = 1,
  41
  42     /// MO_PLT - On a symbol operand this indicates that the immediate is
  43     /// offset to the PLT entry of symbol name from the current code location.
  44     ///
  45     ///    SYMBOL_LABEL @PLT
  46     MO_PLT = 2
  47   };
  48 }
  49
  50 class SystemZInstrInfo : public TargetInstrInfoImpl {
  51   const SystemZRegisterInfo RI;
  52   SystemZTargetMachine &TM;
  53   IndexedMap<unsigned> RegSpillOffsets;
  54 public:
  55   explicit SystemZInstrInfo(SystemZTargetMachine &TM);
  56
  57   /// getRegisterInfo - TargetInstrInfo is a superset of MRegister info.  As
  58   /// such, whenever a client has an instance of instruction info, it should
  59   /// always be able to get register info as well (through this method).
  60   ///
  61   virtual const SystemZRegisterInfo &getRegisterInfo() const { return RI; }
  62
  63   bool copyRegToReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator I,
  64                     unsigned DestReg, unsigned SrcReg,
  65                     const TargetRegisterClass *DestRC,
  66                     const TargetRegisterClass *SrcRC) const;
  67
  68   bool isMoveInstr(const MachineInstr& MI,
  69                    unsigned &SrcReg, unsigned &DstReg,
  70                    unsigned &SrcSubIdx, unsigned &DstSubIdx) const;
  71   unsigned isLoadFromStackSlot(const MachineInstr *MI, int &FrameIndex) const;
  72   unsigned isStoreToStackSlot(const MachineInstr *MI, int &FrameIndex) const;
  73   bool isInvariantLoad(const MachineInstr *MI) const;
  74
  75   virtual void storeRegToStackSlot(MachineBasicBlock &MBB,
  76                                    MachineBasicBlock::iterator MI,
  77                                    unsigned SrcReg, bool isKill,
  78                                    int FrameIndex,
  79                                    const TargetRegisterClass *RC) const;
  80   virtual void loadRegFromStackSlot(MachineBasicBlock &MBB,
  81                                     MachineBasicBlock::iterator MI,
  82                                     unsigned DestReg, int FrameIdx,
  83                                     const TargetRegisterClass *RC) const;
  84
  85   virtual bool spillCalleeSavedRegisters(MachineBasicBlock &MBB,
  86                                          MachineBasicBlock::iterator MI,
  87                                  const std::vector<CalleeSavedInfo> &CSI) const;
  88   virtual bool restoreCalleeSavedRegisters(MachineBasicBlock &MBB,
  89                                            MachineBasicBlock::iterator MI,
  90                                  const std::vector<CalleeSavedInfo> &CSI) const;
  91
  92   bool ReverseBranchCondition(SmallVectorImpl<MachineOperand> &Cond) const;
  93   virtual bool BlockHasNoFallThrough(const MachineBasicBlock &MBB) const;
  94   virtual bool isUnpredicatedTerminator(const MachineInstr *MI) const;
  95   virtual bool AnalyzeBranch(MachineBasicBlock &MBB,
  96                              MachineBasicBlock *&TBB,
  97                              MachineBasicBlock *&FBB,
  98                              SmallVectorImpl<MachineOperand> &Cond,
  99                              bool AllowModify) const;
 100   virtual unsigned InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB,
 101                                 MachineBasicBlock *FBB,
 102                              const SmallVectorImpl<MachineOperand> &Cond) const;
 103   virtual unsigned RemoveBranch(MachineBasicBlock &MBB) const;
 104
 105   SystemZCC::CondCodes getOppositeCondition(SystemZCC::CondCodes CC) const;
 106   SystemZCC::CondCodes getCondFromBranchOpc(unsigned Opc) const;
 107   const TargetInstrDesc& getBrCond(SystemZCC::CondCodes CC) const;
 108   const TargetInstrDesc& getLongDispOpc(unsigned Opc) const;
 109
 110   const TargetInstrDesc& getMemoryInstr(unsigned Opc, int64_t Offset = 0) const {
 111     if (Offset < 0 || Offset >= 4096)
 112       return getLongDispOpc(Opc);
 113     else
 114       return get(Opc);
 115   }
 116 };
 117
 118 }
 119
 120 #endif