1 ; RUN: llc < %s -mtriple=armv6-apple-darwin
3 %struct.rtunion = type { i64 }
4 %struct.rtx_def = type { i16, i8, i8, [1 x %struct.rtunion] }
6 define arm_apcscc void @simplify_unary_real(i8* nocapture %p) nounwind {
8 %tmp121 = load i64* null, align 4 ; <i64> [#uses=1]
9 %0 = getelementptr %struct.rtx_def* null, i32 0, i32 3, i32 3, i32 0 ; <i64*> [#uses=1]
10 %tmp122 = load i64* %0, align 4 ; <i64> [#uses=1]
11 %1 = zext i64 undef to i192 ; <i192> [#uses=2]
12 %2 = zext i64 %tmp121 to i192 ; <i192> [#uses=1]
13 %3 = shl i192 %2, 64 ; <i192> [#uses=2]
14 %4 = zext i64 %tmp122 to i192 ; <i192> [#uses=1]
15 %5 = shl i192 %4, 128 ; <i192> [#uses=1]
16 %6 = or i192 %3, %1 ; <i192> [#uses=1]
17 %7 = or i192 %6, %5 ; <i192> [#uses=2]
18 switch i32 undef, label %bb82 [
24 bb20: ; preds = %entry
27 bb21: ; preds = %entry
28 br i1 undef, label %bb82, label %bb29
31 %tmp18.i = and i192 %3, 1208907372870555465154560 ; <i192> [#uses=1]
32 %mask.i = or i192 %tmp18.i, %1 ; <i192> [#uses=1]
33 %mask41.i = or i192 %mask.i, 0 ; <i192> [#uses=1]
36 bb38: ; preds = %entry
39 bb82: ; preds = %bb38, %bb29, %bb21, %entry
40 %d.0 = phi i192 [ %mask41.i, %bb29 ], [ undef, %bb38 ], [ %7, %entry ], [ %7, %bb21 ] ; <i192> [#uses=1]
41 %tmp51 = trunc i192 %d.0 to i64 ; <i64> [#uses=0]