Fix comment for consistency sake.
[llvm/avr.git] / lib / CodeGen / StackSlotColoring.cpp
blob5884b8213bbc9d6e36914151a3b6ba741b045049
1 //===-- StackSlotColoring.cpp - Stack slot coloring pass. -----------------===//
2 //
3 // The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // This file implements the stack slot coloring pass.
12 //===----------------------------------------------------------------------===//
14 #define DEBUG_TYPE "stackcoloring"
15 #include "VirtRegMap.h"
16 #include "llvm/CodeGen/Passes.h"
17 #include "llvm/CodeGen/LiveIntervalAnalysis.h"
18 #include "llvm/CodeGen/LiveStackAnalysis.h"
19 #include "llvm/CodeGen/MachineFrameInfo.h"
20 #include "llvm/CodeGen/MachineLoopInfo.h"
21 #include "llvm/CodeGen/MachineRegisterInfo.h"
22 #include "llvm/CodeGen/PseudoSourceValue.h"
23 #include "llvm/Support/CommandLine.h"
24 #include "llvm/Support/Compiler.h"
25 #include "llvm/Support/Debug.h"
26 #include "llvm/Target/TargetInstrInfo.h"
27 #include "llvm/Target/TargetMachine.h"
28 #include "llvm/ADT/BitVector.h"
29 #include "llvm/ADT/SmallSet.h"
30 #include "llvm/ADT/SmallVector.h"
31 #include "llvm/ADT/Statistic.h"
32 #include <vector>
33 using namespace llvm;
35 static cl::opt<bool>
36 DisableSharing("no-stack-slot-sharing",
37 cl::init(false), cl::Hidden,
38 cl::desc("Suppress slot sharing during stack coloring"));
40 static cl::opt<bool>
41 ColorWithRegsOpt("color-ss-with-regs",
42 cl::init(false), cl::Hidden,
43 cl::desc("Color stack slots with free registers"));
46 static cl::opt<int> DCELimit("ssc-dce-limit", cl::init(-1), cl::Hidden);
48 STATISTIC(NumEliminated, "Number of stack slots eliminated due to coloring");
49 STATISTIC(NumRegRepl, "Number of stack slot refs replaced with reg refs");
50 STATISTIC(NumLoadElim, "Number of loads eliminated");
51 STATISTIC(NumStoreElim, "Number of stores eliminated");
52 STATISTIC(NumDead, "Number of trivially dead stack accesses eliminated");
54 namespace {
55 class VISIBILITY_HIDDEN StackSlotColoring : public MachineFunctionPass {
56 bool ColorWithRegs;
57 LiveStacks* LS;
58 VirtRegMap* VRM;
59 MachineFrameInfo *MFI;
60 MachineRegisterInfo *MRI;
61 const TargetInstrInfo *TII;
62 const TargetRegisterInfo *TRI;
63 const MachineLoopInfo *loopInfo;
65 // SSIntervals - Spill slot intervals.
66 std::vector<LiveInterval*> SSIntervals;
68 // SSRefs - Keep a list of frame index references for each spill slot.
69 SmallVector<SmallVector<MachineInstr*, 8>, 16> SSRefs;
71 // OrigAlignments - Alignments of stack objects before coloring.
72 SmallVector<unsigned, 16> OrigAlignments;
74 // OrigSizes - Sizess of stack objects before coloring.
75 SmallVector<unsigned, 16> OrigSizes;
77 // AllColors - If index is set, it's a spill slot, i.e. color.
78 // FIXME: This assumes PEI locate spill slot with smaller indices
79 // closest to stack pointer / frame pointer. Therefore, smaller
80 // index == better color.
81 BitVector AllColors;
83 // NextColor - Next "color" that's not yet used.
84 int NextColor;
86 // UsedColors - "Colors" that have been assigned.
87 BitVector UsedColors;
89 // Assignments - Color to intervals mapping.
90 SmallVector<SmallVector<LiveInterval*,4>, 16> Assignments;
92 public:
93 static char ID; // Pass identification
94 StackSlotColoring() :
95 MachineFunctionPass(&ID), ColorWithRegs(false), NextColor(-1) {}
96 StackSlotColoring(bool RegColor) :
97 MachineFunctionPass(&ID), ColorWithRegs(RegColor), NextColor(-1) {}
99 virtual void getAnalysisUsage(AnalysisUsage &AU) const {
100 AU.setPreservesCFG();
101 AU.addRequired<LiveStacks>();
102 AU.addRequired<VirtRegMap>();
103 AU.addPreserved<VirtRegMap>();
104 AU.addRequired<MachineLoopInfo>();
105 AU.addPreserved<MachineLoopInfo>();
106 AU.addPreservedID(MachineDominatorsID);
107 MachineFunctionPass::getAnalysisUsage(AU);
110 virtual bool runOnMachineFunction(MachineFunction &MF);
111 virtual const char* getPassName() const {
112 return "Stack Slot Coloring";
115 private:
116 void InitializeSlots();
117 void ScanForSpillSlotRefs(MachineFunction &MF);
118 bool OverlapWithAssignments(LiveInterval *li, int Color) const;
119 int ColorSlot(LiveInterval *li);
120 bool ColorSlots(MachineFunction &MF);
121 bool ColorSlotsWithFreeRegs(SmallVector<int, 16> &SlotMapping,
122 SmallVector<SmallVector<int, 4>, 16> &RevMap,
123 BitVector &SlotIsReg);
124 void RewriteInstruction(MachineInstr *MI, int OldFI, int NewFI,
125 MachineFunction &MF);
126 bool PropagateBackward(MachineBasicBlock::iterator MII,
127 MachineBasicBlock *MBB,
128 unsigned OldReg, unsigned NewReg);
129 bool PropagateForward(MachineBasicBlock::iterator MII,
130 MachineBasicBlock *MBB,
131 unsigned OldReg, unsigned NewReg);
132 void UnfoldAndRewriteInstruction(MachineInstr *MI, int OldFI,
133 unsigned Reg, const TargetRegisterClass *RC,
134 SmallSet<unsigned, 4> &Defs,
135 MachineFunction &MF);
136 bool AllMemRefsCanBeUnfolded(int SS);
137 bool RemoveDeadStores(MachineBasicBlock* MBB);
139 } // end anonymous namespace
141 char StackSlotColoring::ID = 0;
143 static RegisterPass<StackSlotColoring>
144 X("stack-slot-coloring", "Stack Slot Coloring");
146 FunctionPass *llvm::createStackSlotColoringPass(bool RegColor) {
147 return new StackSlotColoring(RegColor);
150 namespace {
151 // IntervalSorter - Comparison predicate that sort live intervals by
152 // their weight.
153 struct IntervalSorter {
154 bool operator()(LiveInterval* LHS, LiveInterval* RHS) const {
155 return LHS->weight > RHS->weight;
160 /// ScanForSpillSlotRefs - Scan all the machine instructions for spill slot
161 /// references and update spill slot weights.
162 void StackSlotColoring::ScanForSpillSlotRefs(MachineFunction &MF) {
163 SSRefs.resize(MFI->getObjectIndexEnd());
165 // FIXME: Need the equivalent of MachineRegisterInfo for frameindex operands.
166 for (MachineFunction::iterator MBBI = MF.begin(), E = MF.end();
167 MBBI != E; ++MBBI) {
168 MachineBasicBlock *MBB = &*MBBI;
169 unsigned loopDepth = loopInfo->getLoopDepth(MBB);
170 for (MachineBasicBlock::iterator MII = MBB->begin(), EE = MBB->end();
171 MII != EE; ++MII) {
172 MachineInstr *MI = &*MII;
173 for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
174 MachineOperand &MO = MI->getOperand(i);
175 if (!MO.isFI())
176 continue;
177 int FI = MO.getIndex();
178 if (FI < 0)
179 continue;
180 if (!LS->hasInterval(FI))
181 continue;
182 LiveInterval &li = LS->getInterval(FI);
183 li.weight += LiveIntervals::getSpillWeight(false, true, loopDepth);
184 SSRefs[FI].push_back(MI);
190 /// InitializeSlots - Process all spill stack slot liveintervals and add them
191 /// to a sorted (by weight) list.
192 void StackSlotColoring::InitializeSlots() {
193 int LastFI = MFI->getObjectIndexEnd();
194 OrigAlignments.resize(LastFI);
195 OrigSizes.resize(LastFI);
196 AllColors.resize(LastFI);
197 UsedColors.resize(LastFI);
198 Assignments.resize(LastFI);
200 // Gather all spill slots into a list.
201 DEBUG(errs() << "Spill slot intervals:\n");
202 for (LiveStacks::iterator i = LS->begin(), e = LS->end(); i != e; ++i) {
203 LiveInterval &li = i->second;
204 DEBUG(li.dump());
205 int FI = li.getStackSlotIndex();
206 if (MFI->isDeadObjectIndex(FI))
207 continue;
208 SSIntervals.push_back(&li);
209 OrigAlignments[FI] = MFI->getObjectAlignment(FI);
210 OrigSizes[FI] = MFI->getObjectSize(FI);
211 AllColors.set(FI);
213 DEBUG(errs() << '\n');
215 // Sort them by weight.
216 std::stable_sort(SSIntervals.begin(), SSIntervals.end(), IntervalSorter());
218 // Get first "color".
219 NextColor = AllColors.find_first();
222 /// OverlapWithAssignments - Return true if LiveInterval overlaps with any
223 /// LiveIntervals that have already been assigned to the specified color.
224 bool
225 StackSlotColoring::OverlapWithAssignments(LiveInterval *li, int Color) const {
226 const SmallVector<LiveInterval*,4> &OtherLIs = Assignments[Color];
227 for (unsigned i = 0, e = OtherLIs.size(); i != e; ++i) {
228 LiveInterval *OtherLI = OtherLIs[i];
229 if (OtherLI->overlaps(*li))
230 return true;
232 return false;
235 /// ColorSlotsWithFreeRegs - If there are any free registers available, try
236 /// replacing spill slots references with registers instead.
237 bool
238 StackSlotColoring::ColorSlotsWithFreeRegs(SmallVector<int, 16> &SlotMapping,
239 SmallVector<SmallVector<int, 4>, 16> &RevMap,
240 BitVector &SlotIsReg) {
241 if (!(ColorWithRegs || ColorWithRegsOpt) || !VRM->HasUnusedRegisters())
242 return false;
244 bool Changed = false;
245 DEBUG(errs() << "Assigning unused registers to spill slots:\n");
246 for (unsigned i = 0, e = SSIntervals.size(); i != e; ++i) {
247 LiveInterval *li = SSIntervals[i];
248 int SS = li->getStackSlotIndex();
249 if (!UsedColors[SS] || li->weight < 20)
250 // If the weight is < 20, i.e. two references in a loop with depth 1,
251 // don't bother with it.
252 continue;
254 // These slots allow to share the same registers.
255 bool AllColored = true;
256 SmallVector<unsigned, 4> ColoredRegs;
257 for (unsigned j = 0, ee = RevMap[SS].size(); j != ee; ++j) {
258 int RSS = RevMap[SS][j];
259 const TargetRegisterClass *RC = LS->getIntervalRegClass(RSS);
260 // If it's not colored to another stack slot, try coloring it
261 // to a "free" register.
262 if (!RC) {
263 AllColored = false;
264 continue;
266 unsigned Reg = VRM->getFirstUnusedRegister(RC);
267 if (!Reg) {
268 AllColored = false;
269 continue;
271 if (!AllMemRefsCanBeUnfolded(RSS)) {
272 AllColored = false;
273 continue;
274 } else {
275 DEBUG(errs() << "Assigning fi#" << RSS << " to "
276 << TRI->getName(Reg) << '\n');
277 ColoredRegs.push_back(Reg);
278 SlotMapping[RSS] = Reg;
279 SlotIsReg.set(RSS);
280 Changed = true;
284 // Register and its sub-registers are no longer free.
285 while (!ColoredRegs.empty()) {
286 unsigned Reg = ColoredRegs.back();
287 ColoredRegs.pop_back();
288 VRM->setRegisterUsed(Reg);
289 // If reg is a callee-saved register, it will have to be spilled in
290 // the prologue.
291 MRI->setPhysRegUsed(Reg);
292 for (const unsigned *AS = TRI->getAliasSet(Reg); *AS; ++AS) {
293 VRM->setRegisterUsed(*AS);
294 MRI->setPhysRegUsed(*AS);
297 // This spill slot is dead after the rewrites
298 if (AllColored) {
299 MFI->RemoveStackObject(SS);
300 ++NumEliminated;
303 DEBUG(errs() << '\n');
305 return Changed;
308 /// ColorSlot - Assign a "color" (stack slot) to the specified stack slot.
310 int StackSlotColoring::ColorSlot(LiveInterval *li) {
311 int Color = -1;
312 bool Share = false;
313 if (!DisableSharing) {
314 // Check if it's possible to reuse any of the used colors.
315 Color = UsedColors.find_first();
316 while (Color != -1) {
317 if (!OverlapWithAssignments(li, Color)) {
318 Share = true;
319 ++NumEliminated;
320 break;
322 Color = UsedColors.find_next(Color);
326 // Assign it to the first available color (assumed to be the best) if it's
327 // not possible to share a used color with other objects.
328 if (!Share) {
329 assert(NextColor != -1 && "No more spill slots?");
330 Color = NextColor;
331 UsedColors.set(Color);
332 NextColor = AllColors.find_next(NextColor);
335 // Record the assignment.
336 Assignments[Color].push_back(li);
337 int FI = li->getStackSlotIndex();
338 DEBUG(errs() << "Assigning fi#" << FI << " to fi#" << Color << "\n");
340 // Change size and alignment of the allocated slot. If there are multiple
341 // objects sharing the same slot, then make sure the size and alignment
342 // are large enough for all.
343 unsigned Align = OrigAlignments[FI];
344 if (!Share || Align > MFI->getObjectAlignment(Color))
345 MFI->setObjectAlignment(Color, Align);
346 int64_t Size = OrigSizes[FI];
347 if (!Share || Size > MFI->getObjectSize(Color))
348 MFI->setObjectSize(Color, Size);
349 return Color;
352 /// Colorslots - Color all spill stack slots and rewrite all frameindex machine
353 /// operands in the function.
354 bool StackSlotColoring::ColorSlots(MachineFunction &MF) {
355 unsigned NumObjs = MFI->getObjectIndexEnd();
356 SmallVector<int, 16> SlotMapping(NumObjs, -1);
357 SmallVector<float, 16> SlotWeights(NumObjs, 0.0);
358 SmallVector<SmallVector<int, 4>, 16> RevMap(NumObjs);
359 BitVector SlotIsReg(NumObjs);
360 BitVector UsedColors(NumObjs);
362 DEBUG(errs() << "Color spill slot intervals:\n");
363 bool Changed = false;
364 for (unsigned i = 0, e = SSIntervals.size(); i != e; ++i) {
365 LiveInterval *li = SSIntervals[i];
366 int SS = li->getStackSlotIndex();
367 int NewSS = ColorSlot(li);
368 assert(NewSS >= 0 && "Stack coloring failed?");
369 SlotMapping[SS] = NewSS;
370 RevMap[NewSS].push_back(SS);
371 SlotWeights[NewSS] += li->weight;
372 UsedColors.set(NewSS);
373 Changed |= (SS != NewSS);
376 DEBUG(errs() << "\nSpill slots after coloring:\n");
377 for (unsigned i = 0, e = SSIntervals.size(); i != e; ++i) {
378 LiveInterval *li = SSIntervals[i];
379 int SS = li->getStackSlotIndex();
380 li->weight = SlotWeights[SS];
382 // Sort them by new weight.
383 std::stable_sort(SSIntervals.begin(), SSIntervals.end(), IntervalSorter());
385 #ifndef NDEBUG
386 for (unsigned i = 0, e = SSIntervals.size(); i != e; ++i)
387 DEBUG(SSIntervals[i]->dump());
388 DEBUG(errs() << '\n');
389 #endif
391 // Can we "color" a stack slot with a unused register?
392 Changed |= ColorSlotsWithFreeRegs(SlotMapping, RevMap, SlotIsReg);
394 if (!Changed)
395 return false;
397 // Rewrite all MO_FrameIndex operands.
398 SmallVector<SmallSet<unsigned, 4>, 4> NewDefs(MF.getNumBlockIDs());
399 for (unsigned SS = 0, SE = SSRefs.size(); SS != SE; ++SS) {
400 bool isReg = SlotIsReg[SS];
401 int NewFI = SlotMapping[SS];
402 if (NewFI == -1 || (NewFI == (int)SS && !isReg))
403 continue;
405 const TargetRegisterClass *RC = LS->getIntervalRegClass(SS);
406 SmallVector<MachineInstr*, 8> &RefMIs = SSRefs[SS];
407 for (unsigned i = 0, e = RefMIs.size(); i != e; ++i)
408 if (!isReg)
409 RewriteInstruction(RefMIs[i], SS, NewFI, MF);
410 else {
411 // Rewrite to use a register instead.
412 unsigned MBBId = RefMIs[i]->getParent()->getNumber();
413 SmallSet<unsigned, 4> &Defs = NewDefs[MBBId];
414 UnfoldAndRewriteInstruction(RefMIs[i], SS, NewFI, RC, Defs, MF);
418 // Delete unused stack slots.
419 while (NextColor != -1) {
420 DEBUG(errs() << "Removing unused stack object fi#" << NextColor << "\n");
421 MFI->RemoveStackObject(NextColor);
422 NextColor = AllColors.find_next(NextColor);
425 return true;
428 /// AllMemRefsCanBeUnfolded - Return true if all references of the specified
429 /// spill slot index can be unfolded.
430 bool StackSlotColoring::AllMemRefsCanBeUnfolded(int SS) {
431 SmallVector<MachineInstr*, 8> &RefMIs = SSRefs[SS];
432 for (unsigned i = 0, e = RefMIs.size(); i != e; ++i) {
433 MachineInstr *MI = RefMIs[i];
434 if (TII->isLoadFromStackSlot(MI, SS) ||
435 TII->isStoreToStackSlot(MI, SS))
436 // Restore and spill will become copies.
437 return true;
438 if (!TII->getOpcodeAfterMemoryUnfold(MI->getOpcode(), false, false))
439 return false;
440 for (unsigned j = 0, ee = MI->getNumOperands(); j != ee; ++j) {
441 MachineOperand &MO = MI->getOperand(j);
442 if (MO.isFI() && MO.getIndex() != SS)
443 // If it uses another frameindex, we can, currently* unfold it.
444 return false;
447 return true;
450 /// RewriteInstruction - Rewrite specified instruction by replacing references
451 /// to old frame index with new one.
452 void StackSlotColoring::RewriteInstruction(MachineInstr *MI, int OldFI,
453 int NewFI, MachineFunction &MF) {
454 for (unsigned i = 0, ee = MI->getNumOperands(); i != ee; ++i) {
455 MachineOperand &MO = MI->getOperand(i);
456 if (!MO.isFI())
457 continue;
458 int FI = MO.getIndex();
459 if (FI != OldFI)
460 continue;
461 MO.setIndex(NewFI);
464 // Update the MachineMemOperand for the new memory location.
465 // FIXME: We need a better method of managing these too.
466 SmallVector<MachineMemOperand, 2> MMOs(MI->memoperands_begin(),
467 MI->memoperands_end());
468 MI->clearMemOperands(MF);
469 const Value *OldSV = PseudoSourceValue::getFixedStack(OldFI);
470 for (unsigned i = 0, ee = MMOs.size(); i != ee; ++i) {
471 if (MMOs[i].getValue() != OldSV)
472 MI->addMemOperand(MF, MMOs[i]);
473 else {
474 MachineMemOperand MMO(PseudoSourceValue::getFixedStack(NewFI),
475 MMOs[i].getFlags(), MMOs[i].getOffset(),
476 MMOs[i].getSize(), MMOs[i].getAlignment());
477 MI->addMemOperand(MF, MMO);
482 /// PropagateBackward - Traverse backward and look for the definition of
483 /// OldReg. If it can successfully update all of the references with NewReg,
484 /// do so and return true.
485 bool StackSlotColoring::PropagateBackward(MachineBasicBlock::iterator MII,
486 MachineBasicBlock *MBB,
487 unsigned OldReg, unsigned NewReg) {
488 if (MII == MBB->begin())
489 return false;
491 SmallVector<MachineOperand*, 4> Uses;
492 SmallVector<MachineOperand*, 4> Refs;
493 while (--MII != MBB->begin()) {
494 bool FoundDef = false; // Not counting 2address def.
496 Uses.clear();
497 const TargetInstrDesc &TID = MII->getDesc();
498 for (unsigned i = 0, e = MII->getNumOperands(); i != e; ++i) {
499 MachineOperand &MO = MII->getOperand(i);
500 if (!MO.isReg())
501 continue;
502 unsigned Reg = MO.getReg();
503 if (Reg == 0)
504 continue;
505 if (Reg == OldReg) {
506 if (MO.isImplicit())
507 return false;
509 // Abort the use is actually a sub-register def. We don't have enough
510 // information to figure out if it is really legal.
511 if (MO.getSubReg() ||
512 TID.getOpcode() == TargetInstrInfo::EXTRACT_SUBREG ||
513 TID.getOpcode() == TargetInstrInfo::INSERT_SUBREG ||
514 TID.getOpcode() == TargetInstrInfo::SUBREG_TO_REG)
515 return false;
517 const TargetRegisterClass *RC = TID.OpInfo[i].getRegClass(TRI);
518 if (RC && !RC->contains(NewReg))
519 return false;
521 if (MO.isUse()) {
522 Uses.push_back(&MO);
523 } else {
524 Refs.push_back(&MO);
525 if (!MII->isRegTiedToUseOperand(i))
526 FoundDef = true;
528 } else if (TRI->regsOverlap(Reg, NewReg)) {
529 return false;
530 } else if (TRI->regsOverlap(Reg, OldReg)) {
531 if (!MO.isUse() || !MO.isKill())
532 return false;
536 if (FoundDef) {
537 // Found non-two-address def. Stop here.
538 for (unsigned i = 0, e = Refs.size(); i != e; ++i)
539 Refs[i]->setReg(NewReg);
540 return true;
543 // Two-address uses must be updated as well.
544 for (unsigned i = 0, e = Uses.size(); i != e; ++i)
545 Refs.push_back(Uses[i]);
547 return false;
550 /// PropagateForward - Traverse forward and look for the kill of OldReg. If
551 /// it can successfully update all of the uses with NewReg, do so and
552 /// return true.
553 bool StackSlotColoring::PropagateForward(MachineBasicBlock::iterator MII,
554 MachineBasicBlock *MBB,
555 unsigned OldReg, unsigned NewReg) {
556 if (MII == MBB->end())
557 return false;
559 SmallVector<MachineOperand*, 4> Uses;
560 while (++MII != MBB->end()) {
561 bool FoundUse = false;
562 bool FoundKill = false;
563 const TargetInstrDesc &TID = MII->getDesc();
564 for (unsigned i = 0, e = MII->getNumOperands(); i != e; ++i) {
565 MachineOperand &MO = MII->getOperand(i);
566 if (!MO.isReg())
567 continue;
568 unsigned Reg = MO.getReg();
569 if (Reg == 0)
570 continue;
571 if (Reg == OldReg) {
572 if (MO.isDef() || MO.isImplicit())
573 return false;
575 // Abort the use is actually a sub-register use. We don't have enough
576 // information to figure out if it is really legal.
577 if (MO.getSubReg() ||
578 TID.getOpcode() == TargetInstrInfo::EXTRACT_SUBREG)
579 return false;
581 const TargetRegisterClass *RC = TID.OpInfo[i].getRegClass(TRI);
582 if (RC && !RC->contains(NewReg))
583 return false;
584 FoundUse = true;
585 if (MO.isKill())
586 FoundKill = true;
588 Uses.push_back(&MO);
589 } else if (TRI->regsOverlap(Reg, NewReg) ||
590 TRI->regsOverlap(Reg, OldReg))
591 return false;
593 if (FoundKill) {
594 for (unsigned i = 0, e = Uses.size(); i != e; ++i)
595 Uses[i]->setReg(NewReg);
596 return true;
599 return false;
602 /// UnfoldAndRewriteInstruction - Rewrite specified instruction by unfolding
603 /// folded memory references and replacing those references with register
604 /// references instead.
605 void
606 StackSlotColoring::UnfoldAndRewriteInstruction(MachineInstr *MI, int OldFI,
607 unsigned Reg,
608 const TargetRegisterClass *RC,
609 SmallSet<unsigned, 4> &Defs,
610 MachineFunction &MF) {
611 MachineBasicBlock *MBB = MI->getParent();
612 if (unsigned DstReg = TII->isLoadFromStackSlot(MI, OldFI)) {
613 if (PropagateForward(MI, MBB, DstReg, Reg)) {
614 DEBUG(errs() << "Eliminated load: ");
615 DEBUG(MI->dump());
616 ++NumLoadElim;
617 } else {
618 TII->copyRegToReg(*MBB, MI, DstReg, Reg, RC, RC);
619 ++NumRegRepl;
622 if (!Defs.count(Reg)) {
623 // If this is the first use of Reg in this MBB and it wasn't previously
624 // defined in MBB, add it to livein.
625 MBB->addLiveIn(Reg);
626 Defs.insert(Reg);
628 } else if (unsigned SrcReg = TII->isStoreToStackSlot(MI, OldFI)) {
629 if (MI->killsRegister(SrcReg) && PropagateBackward(MI, MBB, SrcReg, Reg)) {
630 DEBUG(errs() << "Eliminated store: ");
631 DEBUG(MI->dump());
632 ++NumStoreElim;
633 } else {
634 TII->copyRegToReg(*MBB, MI, Reg, SrcReg, RC, RC);
635 ++NumRegRepl;
638 // Remember reg has been defined in MBB.
639 Defs.insert(Reg);
640 } else {
641 SmallVector<MachineInstr*, 4> NewMIs;
642 bool Success = TII->unfoldMemoryOperand(MF, MI, Reg, false, false, NewMIs);
643 Success = Success; // Silence compiler warning.
644 assert(Success && "Failed to unfold!");
645 MachineInstr *NewMI = NewMIs[0];
646 MBB->insert(MI, NewMI);
647 ++NumRegRepl;
649 if (NewMI->readsRegister(Reg)) {
650 if (!Defs.count(Reg))
651 // If this is the first use of Reg in this MBB and it wasn't previously
652 // defined in MBB, add it to livein.
653 MBB->addLiveIn(Reg);
654 Defs.insert(Reg);
657 MBB->erase(MI);
660 /// RemoveDeadStores - Scan through a basic block and look for loads followed
661 /// by stores. If they're both using the same stack slot, then the store is
662 /// definitely dead. This could obviously be much more aggressive (consider
663 /// pairs with instructions between them), but such extensions might have a
664 /// considerable compile time impact.
665 bool StackSlotColoring::RemoveDeadStores(MachineBasicBlock* MBB) {
666 // FIXME: This could be much more aggressive, but we need to investigate
667 // the compile time impact of doing so.
668 bool changed = false;
670 SmallVector<MachineInstr*, 4> toErase;
672 for (MachineBasicBlock::iterator I = MBB->begin(), E = MBB->end();
673 I != E; ++I) {
674 if (DCELimit != -1 && (int)NumDead >= DCELimit)
675 break;
677 MachineBasicBlock::iterator NextMI = next(I);
678 if (NextMI == MBB->end()) continue;
680 int FirstSS, SecondSS;
681 unsigned LoadReg = 0;
682 unsigned StoreReg = 0;
683 if (!(LoadReg = TII->isLoadFromStackSlot(I, FirstSS))) continue;
684 if (!(StoreReg = TII->isStoreToStackSlot(NextMI, SecondSS))) continue;
685 if (FirstSS != SecondSS || LoadReg != StoreReg || FirstSS == -1) continue;
687 ++NumDead;
688 changed = true;
690 if (NextMI->findRegisterUseOperandIdx(LoadReg, true, 0) != -1) {
691 ++NumDead;
692 toErase.push_back(I);
695 toErase.push_back(NextMI);
696 ++I;
699 for (SmallVector<MachineInstr*, 4>::iterator I = toErase.begin(),
700 E = toErase.end(); I != E; ++I)
701 (*I)->eraseFromParent();
703 return changed;
707 bool StackSlotColoring::runOnMachineFunction(MachineFunction &MF) {
708 DEBUG(errs() << "********** Stack Slot Coloring **********\n");
710 MFI = MF.getFrameInfo();
711 MRI = &MF.getRegInfo();
712 TII = MF.getTarget().getInstrInfo();
713 TRI = MF.getTarget().getRegisterInfo();
714 LS = &getAnalysis<LiveStacks>();
715 VRM = &getAnalysis<VirtRegMap>();
716 loopInfo = &getAnalysis<MachineLoopInfo>();
718 bool Changed = false;
720 unsigned NumSlots = LS->getNumIntervals();
721 if (NumSlots < 2) {
722 if (NumSlots == 0 || !VRM->HasUnusedRegisters())
723 // Nothing to do!
724 return false;
727 // Gather spill slot references
728 ScanForSpillSlotRefs(MF);
729 InitializeSlots();
730 Changed = ColorSlots(MF);
732 NextColor = -1;
733 SSIntervals.clear();
734 for (unsigned i = 0, e = SSRefs.size(); i != e; ++i)
735 SSRefs[i].clear();
736 SSRefs.clear();
737 OrigAlignments.clear();
738 OrigSizes.clear();
739 AllColors.clear();
740 UsedColors.clear();
741 for (unsigned i = 0, e = Assignments.size(); i != e; ++i)
742 Assignments[i].clear();
743 Assignments.clear();
745 if (Changed) {
746 for (MachineFunction::iterator I = MF.begin(), E = MF.end(); I != E; ++I)
747 Changed |= RemoveDeadStores(I);
750 return Changed;