1 //===-- LegalizeTypes.h - Definition of the DAG Type Legalizer class ------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file defines the DAGTypeLegalizer class. This is a private interface
11 // shared between the code that implements the SelectionDAG::LegalizeTypes
14 //===----------------------------------------------------------------------===//
16 #ifndef SELECTIONDAG_LEGALIZETYPES_H
17 #define SELECTIONDAG_LEGALIZETYPES_H
19 #define DEBUG_TYPE "legalize-types"
20 #include "llvm/CodeGen/SelectionDAG.h"
21 #include "llvm/Target/TargetLowering.h"
22 #include "llvm/ADT/DenseMap.h"
23 #include "llvm/ADT/DenseSet.h"
24 #include "llvm/Support/Compiler.h"
25 #include "llvm/Support/Debug.h"
29 //===----------------------------------------------------------------------===//
30 /// DAGTypeLegalizer - This takes an arbitrary SelectionDAG as input and hacks
31 /// on it until only value types the target machine can handle are left. This
32 /// involves promoting small sizes to large sizes or splitting up large values
33 /// into small values.
35 class VISIBILITY_HIDDEN DAGTypeLegalizer
{
39 // NodeIdFlags - This pass uses the NodeId on the SDNodes to hold information
40 // about the state of the node. The enum has all the values.
42 /// ReadyToProcess - All operands have been processed, so this node is ready
46 /// NewNode - This is a new node, not before seen, that was created in the
47 /// process of legalizing some other node.
50 /// Unanalyzed - This node's ID needs to be set to the number of its
51 /// unprocessed operands.
54 /// Processed - This is a node that has already been processed.
57 // 1+ - This is a node which has this many unprocessed operands.
61 Legal
, // The target natively supports this type.
62 PromoteInteger
, // Replace this integer type with a larger one.
63 ExpandInteger
, // Split this integer type into two of half the size.
64 SoftenFloat
, // Convert this float type to a same size integer type.
65 ExpandFloat
, // Split this float type into two of half the size.
66 ScalarizeVector
, // Replace this one-element vector with its element type.
67 SplitVector
, // Split this vector type into two of half the size.
68 WidenVector
// This vector type should be widened into a larger vector.
71 /// ValueTypeActions - This is a bitvector that contains two bits for each
72 /// simple value type, where the two bits correspond to the LegalizeAction
73 /// enum from TargetLowering. This can be queried with "getTypeAction(VT)".
74 TargetLowering::ValueTypeActionImpl ValueTypeActions
;
76 /// getTypeAction - Return how we should legalize values of this type.
77 LegalizeAction
getTypeAction(EVT VT
) const {
78 switch (ValueTypeActions
.getTypeAction(*DAG
.getContext(), VT
)) {
80 assert(false && "Unknown legalize action!");
81 case TargetLowering::Legal
:
83 case TargetLowering::Promote
:
85 // 1) For integers, use a larger integer type (e.g. i8 -> i32).
86 // 2) For vectors, use a wider vector type (e.g. v3i32 -> v4i32).
88 return PromoteInteger
;
91 case TargetLowering::Expand
:
93 // 1) split scalar in half, 2) convert a float to an integer,
94 // 3) scalarize a single-element vector, 4) split a vector in two.
98 else if (VT
.getSizeInBits() ==
99 TLI
.getTypeToTransformTo(*DAG
.getContext(), VT
).getSizeInBits())
103 } else if (VT
.getVectorNumElements() == 1) {
104 return ScalarizeVector
;
111 /// isTypeLegal - Return true if this type is legal on this target.
112 bool isTypeLegal(EVT VT
) const {
113 return (ValueTypeActions
.getTypeAction(*DAG
.getContext(), VT
) ==
114 TargetLowering::Legal
);
117 /// IgnoreNodeResults - Pretend all of this node's results are legal.
118 bool IgnoreNodeResults(SDNode
*N
) const {
119 return N
->getOpcode() == ISD::TargetConstant
;
122 /// PromotedIntegers - For integer nodes that are below legal width, this map
123 /// indicates what promoted value to use.
124 DenseMap
<SDValue
, SDValue
> PromotedIntegers
;
126 /// ExpandedIntegers - For integer nodes that need to be expanded this map
127 /// indicates which operands are the expanded version of the input.
128 DenseMap
<SDValue
, std::pair
<SDValue
, SDValue
> > ExpandedIntegers
;
130 /// SoftenedFloats - For floating point nodes converted to integers of
131 /// the same size, this map indicates the converted value to use.
132 DenseMap
<SDValue
, SDValue
> SoftenedFloats
;
134 /// ExpandedFloats - For float nodes that need to be expanded this map
135 /// indicates which operands are the expanded version of the input.
136 DenseMap
<SDValue
, std::pair
<SDValue
, SDValue
> > ExpandedFloats
;
138 /// ScalarizedVectors - For nodes that are <1 x ty>, this map indicates the
139 /// scalar value of type 'ty' to use.
140 DenseMap
<SDValue
, SDValue
> ScalarizedVectors
;
142 /// SplitVectors - For nodes that need to be split this map indicates
143 /// which operands are the expanded version of the input.
144 DenseMap
<SDValue
, std::pair
<SDValue
, SDValue
> > SplitVectors
;
146 /// WidenedVectors - For vector nodes that need to be widened, indicates
147 /// the widened value to use.
148 DenseMap
<SDValue
, SDValue
> WidenedVectors
;
150 /// ReplacedValues - For values that have been replaced with another,
151 /// indicates the replacement value to use.
152 DenseMap
<SDValue
, SDValue
> ReplacedValues
;
154 /// Worklist - This defines a worklist of nodes to process. In order to be
155 /// pushed onto this worklist, all operands of a node must have already been
157 SmallVector
<SDNode
*, 128> Worklist
;
160 explicit DAGTypeLegalizer(SelectionDAG
&dag
)
161 : TLI(dag
.getTargetLoweringInfo()), DAG(dag
),
162 ValueTypeActions(TLI
.getValueTypeActions()) {
163 assert(MVT::LAST_VALUETYPE
<= MVT::MAX_ALLOWED_VALUETYPE
&&
164 "Too many value types for ValueTypeActions to hold!");
167 /// run - This is the main entry point for the type legalizer. This does a
168 /// top-down traversal of the dag, legalizing types as it goes. Returns
169 /// "true" if it made any changes.
172 void NoteDeletion(SDNode
*Old
, SDNode
*New
) {
175 for (unsigned i
= 0, e
= Old
->getNumValues(); i
!= e
; ++i
)
176 ReplacedValues
[SDValue(Old
, i
)] = SDValue(New
, i
);
180 SDNode
*AnalyzeNewNode(SDNode
*N
);
181 void AnalyzeNewValue(SDValue
&Val
);
182 void ExpungeNode(SDNode
*N
);
183 void PerformExpensiveChecks();
184 void RemapValue(SDValue
&N
);
187 SDValue
BitConvertToInteger(SDValue Op
);
188 SDValue
BitConvertVectorToIntegerVector(SDValue Op
);
189 SDValue
CreateStackStoreLoad(SDValue Op
, EVT DestVT
);
190 bool CustomLowerNode(SDNode
*N
, EVT VT
, bool LegalizeResult
);
191 SDValue
GetVectorElementPointer(SDValue VecPtr
, EVT EltVT
, SDValue Index
);
192 SDValue
JoinIntegers(SDValue Lo
, SDValue Hi
);
193 SDValue
LibCallify(RTLIB::Libcall LC
, SDNode
*N
, bool isSigned
);
194 SDValue
MakeLibCall(RTLIB::Libcall LC
, EVT RetVT
,
195 const SDValue
*Ops
, unsigned NumOps
, bool isSigned
,
197 SDValue
PromoteTargetBoolean(SDValue Bool
, EVT VT
);
198 void ReplaceValueWith(SDValue From
, SDValue To
);
199 void ReplaceValueWithHelper(SDValue From
, SDValue To
);
200 void SplitInteger(SDValue Op
, SDValue
&Lo
, SDValue
&Hi
);
201 void SplitInteger(SDValue Op
, EVT LoVT
, EVT HiVT
,
202 SDValue
&Lo
, SDValue
&Hi
);
204 //===--------------------------------------------------------------------===//
205 // Integer Promotion Support: LegalizeIntegerTypes.cpp
206 //===--------------------------------------------------------------------===//
208 /// GetPromotedInteger - Given a processed operand Op which was promoted to a
209 /// larger integer type, this returns the promoted value. The low bits of the
210 /// promoted value corresponding to the original type are exactly equal to Op.
211 /// The extra bits contain rubbish, so the promoted value may need to be zero-
212 /// or sign-extended from the original type before it is usable (the helpers
213 /// SExtPromotedInteger and ZExtPromotedInteger can do this for you).
214 /// For example, if Op is an i16 and was promoted to an i32, then this method
215 /// returns an i32, the lower 16 bits of which coincide with Op, and the upper
216 /// 16 bits of which contain rubbish.
217 SDValue
GetPromotedInteger(SDValue Op
) {
218 SDValue
&PromotedOp
= PromotedIntegers
[Op
];
219 RemapValue(PromotedOp
);
220 assert(PromotedOp
.getNode() && "Operand wasn't promoted?");
223 void SetPromotedInteger(SDValue Op
, SDValue Result
);
225 /// SExtPromotedInteger - Get a promoted operand and sign extend it to the
227 SDValue
SExtPromotedInteger(SDValue Op
) {
228 EVT OldVT
= Op
.getValueType();
229 DebugLoc dl
= Op
.getDebugLoc();
230 Op
= GetPromotedInteger(Op
);
231 return DAG
.getNode(ISD::SIGN_EXTEND_INREG
, dl
, Op
.getValueType(), Op
,
232 DAG
.getValueType(OldVT
));
235 /// ZExtPromotedInteger - Get a promoted operand and zero extend it to the
237 SDValue
ZExtPromotedInteger(SDValue Op
) {
238 EVT OldVT
= Op
.getValueType();
239 DebugLoc dl
= Op
.getDebugLoc();
240 Op
= GetPromotedInteger(Op
);
241 return DAG
.getZeroExtendInReg(Op
, dl
, OldVT
);
244 // Integer Result Promotion.
245 void PromoteIntegerResult(SDNode
*N
, unsigned ResNo
);
246 SDValue
PromoteIntRes_AssertSext(SDNode
*N
);
247 SDValue
PromoteIntRes_AssertZext(SDNode
*N
);
248 SDValue
PromoteIntRes_Atomic1(AtomicSDNode
*N
);
249 SDValue
PromoteIntRes_Atomic2(AtomicSDNode
*N
);
250 SDValue
PromoteIntRes_BIT_CONVERT(SDNode
*N
);
251 SDValue
PromoteIntRes_BSWAP(SDNode
*N
);
252 SDValue
PromoteIntRes_BUILD_PAIR(SDNode
*N
);
253 SDValue
PromoteIntRes_Constant(SDNode
*N
);
254 SDValue
PromoteIntRes_CONVERT_RNDSAT(SDNode
*N
);
255 SDValue
PromoteIntRes_CTLZ(SDNode
*N
);
256 SDValue
PromoteIntRes_CTPOP(SDNode
*N
);
257 SDValue
PromoteIntRes_CTTZ(SDNode
*N
);
258 SDValue
PromoteIntRes_EXTRACT_VECTOR_ELT(SDNode
*N
);
259 SDValue
PromoteIntRes_FP_TO_XINT(SDNode
*N
);
260 SDValue
PromoteIntRes_INT_EXTEND(SDNode
*N
);
261 SDValue
PromoteIntRes_LOAD(LoadSDNode
*N
);
262 SDValue
PromoteIntRes_Overflow(SDNode
*N
);
263 SDValue
PromoteIntRes_SADDSUBO(SDNode
*N
, unsigned ResNo
);
264 SDValue
PromoteIntRes_SDIV(SDNode
*N
);
265 SDValue
PromoteIntRes_SELECT(SDNode
*N
);
266 SDValue
PromoteIntRes_SELECT_CC(SDNode
*N
);
267 SDValue
PromoteIntRes_SETCC(SDNode
*N
);
268 SDValue
PromoteIntRes_SHL(SDNode
*N
);
269 SDValue
PromoteIntRes_SimpleIntBinOp(SDNode
*N
);
270 SDValue
PromoteIntRes_SIGN_EXTEND_INREG(SDNode
*N
);
271 SDValue
PromoteIntRes_SRA(SDNode
*N
);
272 SDValue
PromoteIntRes_SRL(SDNode
*N
);
273 SDValue
PromoteIntRes_TRUNCATE(SDNode
*N
);
274 SDValue
PromoteIntRes_UADDSUBO(SDNode
*N
, unsigned ResNo
);
275 SDValue
PromoteIntRes_UDIV(SDNode
*N
);
276 SDValue
PromoteIntRes_UNDEF(SDNode
*N
);
277 SDValue
PromoteIntRes_VAARG(SDNode
*N
);
278 SDValue
PromoteIntRes_XMULO(SDNode
*N
, unsigned ResNo
);
280 // Integer Operand Promotion.
281 bool PromoteIntegerOperand(SDNode
*N
, unsigned OperandNo
);
282 SDValue
PromoteIntOp_ANY_EXTEND(SDNode
*N
);
283 SDValue
PromoteIntOp_BIT_CONVERT(SDNode
*N
);
284 SDValue
PromoteIntOp_BUILD_PAIR(SDNode
*N
);
285 SDValue
PromoteIntOp_BR_CC(SDNode
*N
, unsigned OpNo
);
286 SDValue
PromoteIntOp_BRCOND(SDNode
*N
, unsigned OpNo
);
287 SDValue
PromoteIntOp_BUILD_VECTOR(SDNode
*N
);
288 SDValue
PromoteIntOp_CONVERT_RNDSAT(SDNode
*N
);
289 SDValue
PromoteIntOp_INSERT_VECTOR_ELT(SDNode
*N
, unsigned OpNo
);
290 SDValue
PromoteIntOp_MEMBARRIER(SDNode
*N
);
291 SDValue
PromoteIntOp_SCALAR_TO_VECTOR(SDNode
*N
);
292 SDValue
PromoteIntOp_SELECT(SDNode
*N
, unsigned OpNo
);
293 SDValue
PromoteIntOp_SELECT_CC(SDNode
*N
, unsigned OpNo
);
294 SDValue
PromoteIntOp_SETCC(SDNode
*N
, unsigned OpNo
);
295 SDValue
PromoteIntOp_Shift(SDNode
*N
);
296 SDValue
PromoteIntOp_SIGN_EXTEND(SDNode
*N
);
297 SDValue
PromoteIntOp_SINT_TO_FP(SDNode
*N
);
298 SDValue
PromoteIntOp_STORE(StoreSDNode
*N
, unsigned OpNo
);
299 SDValue
PromoteIntOp_TRUNCATE(SDNode
*N
);
300 SDValue
PromoteIntOp_UINT_TO_FP(SDNode
*N
);
301 SDValue
PromoteIntOp_ZERO_EXTEND(SDNode
*N
);
303 void PromoteSetCCOperands(SDValue
&LHS
,SDValue
&RHS
, ISD::CondCode Code
);
305 //===--------------------------------------------------------------------===//
306 // Integer Expansion Support: LegalizeIntegerTypes.cpp
307 //===--------------------------------------------------------------------===//
309 /// GetExpandedInteger - Given a processed operand Op which was expanded into
310 /// two integers of half the size, this returns the two halves. The low bits
311 /// of Op are exactly equal to the bits of Lo; the high bits exactly equal Hi.
312 /// For example, if Op is an i64 which was expanded into two i32's, then this
313 /// method returns the two i32's, with Lo being equal to the lower 32 bits of
314 /// Op, and Hi being equal to the upper 32 bits.
315 void GetExpandedInteger(SDValue Op
, SDValue
&Lo
, SDValue
&Hi
);
316 void SetExpandedInteger(SDValue Op
, SDValue Lo
, SDValue Hi
);
318 // Integer Result Expansion.
319 void ExpandIntegerResult(SDNode
*N
, unsigned ResNo
);
320 void ExpandIntRes_ANY_EXTEND (SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
321 void ExpandIntRes_AssertSext (SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
322 void ExpandIntRes_AssertZext (SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
323 void ExpandIntRes_Constant (SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
324 void ExpandIntRes_CTLZ (SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
325 void ExpandIntRes_CTPOP (SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
326 void ExpandIntRes_CTTZ (SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
327 void ExpandIntRes_LOAD (LoadSDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
328 void ExpandIntRes_SIGN_EXTEND (SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
329 void ExpandIntRes_SIGN_EXTEND_INREG (SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
330 void ExpandIntRes_TRUNCATE (SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
331 void ExpandIntRes_ZERO_EXTEND (SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
332 void ExpandIntRes_FP_TO_SINT (SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
333 void ExpandIntRes_FP_TO_UINT (SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
335 void ExpandIntRes_Logical (SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
336 void ExpandIntRes_ADDSUB (SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
337 void ExpandIntRes_ADDSUBC (SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
338 void ExpandIntRes_ADDSUBE (SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
339 void ExpandIntRes_BSWAP (SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
340 void ExpandIntRes_MUL (SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
341 void ExpandIntRes_SDIV (SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
342 void ExpandIntRes_SREM (SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
343 void ExpandIntRes_UDIV (SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
344 void ExpandIntRes_UREM (SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
345 void ExpandIntRes_Shift (SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
347 void ExpandShiftByConstant(SDNode
*N
, unsigned Amt
,
348 SDValue
&Lo
, SDValue
&Hi
);
349 bool ExpandShiftWithKnownAmountBit(SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
350 bool ExpandShiftWithUnknownAmountBit(SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
352 // Integer Operand Expansion.
353 bool ExpandIntegerOperand(SDNode
*N
, unsigned OperandNo
);
354 SDValue
ExpandIntOp_BIT_CONVERT(SDNode
*N
);
355 SDValue
ExpandIntOp_BR_CC(SDNode
*N
);
356 SDValue
ExpandIntOp_BUILD_VECTOR(SDNode
*N
);
357 SDValue
ExpandIntOp_EXTRACT_ELEMENT(SDNode
*N
);
358 SDValue
ExpandIntOp_SELECT_CC(SDNode
*N
);
359 SDValue
ExpandIntOp_SETCC(SDNode
*N
);
360 SDValue
ExpandIntOp_Shift(SDNode
*N
);
361 SDValue
ExpandIntOp_SINT_TO_FP(SDNode
*N
);
362 SDValue
ExpandIntOp_STORE(StoreSDNode
*N
, unsigned OpNo
);
363 SDValue
ExpandIntOp_TRUNCATE(SDNode
*N
);
364 SDValue
ExpandIntOp_UINT_TO_FP(SDNode
*N
);
366 void IntegerExpandSetCCOperands(SDValue
&NewLHS
, SDValue
&NewRHS
,
367 ISD::CondCode
&CCCode
, DebugLoc dl
);
369 //===--------------------------------------------------------------------===//
370 // Float to Integer Conversion Support: LegalizeFloatTypes.cpp
371 //===--------------------------------------------------------------------===//
373 /// GetSoftenedFloat - Given a processed operand Op which was converted to an
374 /// integer of the same size, this returns the integer. The integer contains
375 /// exactly the same bits as Op - only the type changed. For example, if Op
376 /// is an f32 which was softened to an i32, then this method returns an i32,
377 /// the bits of which coincide with those of Op.
378 SDValue
GetSoftenedFloat(SDValue Op
) {
379 SDValue
&SoftenedOp
= SoftenedFloats
[Op
];
380 RemapValue(SoftenedOp
);
381 assert(SoftenedOp
.getNode() && "Operand wasn't converted to integer?");
384 void SetSoftenedFloat(SDValue Op
, SDValue Result
);
386 // Result Float to Integer Conversion.
387 void SoftenFloatResult(SDNode
*N
, unsigned OpNo
);
388 SDValue
SoftenFloatRes_BIT_CONVERT(SDNode
*N
);
389 SDValue
SoftenFloatRes_BUILD_PAIR(SDNode
*N
);
390 SDValue
SoftenFloatRes_ConstantFP(ConstantFPSDNode
*N
);
391 SDValue
SoftenFloatRes_EXTRACT_VECTOR_ELT(SDNode
*N
);
392 SDValue
SoftenFloatRes_FABS(SDNode
*N
);
393 SDValue
SoftenFloatRes_FADD(SDNode
*N
);
394 SDValue
SoftenFloatRes_FCEIL(SDNode
*N
);
395 SDValue
SoftenFloatRes_FCOPYSIGN(SDNode
*N
);
396 SDValue
SoftenFloatRes_FCOS(SDNode
*N
);
397 SDValue
SoftenFloatRes_FDIV(SDNode
*N
);
398 SDValue
SoftenFloatRes_FEXP(SDNode
*N
);
399 SDValue
SoftenFloatRes_FEXP2(SDNode
*N
);
400 SDValue
SoftenFloatRes_FFLOOR(SDNode
*N
);
401 SDValue
SoftenFloatRes_FLOG(SDNode
*N
);
402 SDValue
SoftenFloatRes_FLOG2(SDNode
*N
);
403 SDValue
SoftenFloatRes_FLOG10(SDNode
*N
);
404 SDValue
SoftenFloatRes_FMUL(SDNode
*N
);
405 SDValue
SoftenFloatRes_FNEARBYINT(SDNode
*N
);
406 SDValue
SoftenFloatRes_FNEG(SDNode
*N
);
407 SDValue
SoftenFloatRes_FP_EXTEND(SDNode
*N
);
408 SDValue
SoftenFloatRes_FP_ROUND(SDNode
*N
);
409 SDValue
SoftenFloatRes_FPOW(SDNode
*N
);
410 SDValue
SoftenFloatRes_FPOWI(SDNode
*N
);
411 SDValue
SoftenFloatRes_FREM(SDNode
*N
);
412 SDValue
SoftenFloatRes_FRINT(SDNode
*N
);
413 SDValue
SoftenFloatRes_FSIN(SDNode
*N
);
414 SDValue
SoftenFloatRes_FSQRT(SDNode
*N
);
415 SDValue
SoftenFloatRes_FSUB(SDNode
*N
);
416 SDValue
SoftenFloatRes_FTRUNC(SDNode
*N
);
417 SDValue
SoftenFloatRes_LOAD(SDNode
*N
);
418 SDValue
SoftenFloatRes_SELECT(SDNode
*N
);
419 SDValue
SoftenFloatRes_SELECT_CC(SDNode
*N
);
420 SDValue
SoftenFloatRes_UNDEF(SDNode
*N
);
421 SDValue
SoftenFloatRes_VAARG(SDNode
*N
);
422 SDValue
SoftenFloatRes_XINT_TO_FP(SDNode
*N
);
424 // Operand Float to Integer Conversion.
425 bool SoftenFloatOperand(SDNode
*N
, unsigned OpNo
);
426 SDValue
SoftenFloatOp_BIT_CONVERT(SDNode
*N
);
427 SDValue
SoftenFloatOp_BR_CC(SDNode
*N
);
428 SDValue
SoftenFloatOp_FP_ROUND(SDNode
*N
);
429 SDValue
SoftenFloatOp_FP_TO_SINT(SDNode
*N
);
430 SDValue
SoftenFloatOp_FP_TO_UINT(SDNode
*N
);
431 SDValue
SoftenFloatOp_SELECT_CC(SDNode
*N
);
432 SDValue
SoftenFloatOp_SETCC(SDNode
*N
);
433 SDValue
SoftenFloatOp_STORE(SDNode
*N
, unsigned OpNo
);
435 void SoftenSetCCOperands(SDValue
&NewLHS
, SDValue
&NewRHS
,
436 ISD::CondCode
&CCCode
, DebugLoc dl
);
438 //===--------------------------------------------------------------------===//
439 // Float Expansion Support: LegalizeFloatTypes.cpp
440 //===--------------------------------------------------------------------===//
442 /// GetExpandedFloat - Given a processed operand Op which was expanded into
443 /// two floating point values of half the size, this returns the two halves.
444 /// The low bits of Op are exactly equal to the bits of Lo; the high bits
445 /// exactly equal Hi. For example, if Op is a ppcf128 which was expanded
446 /// into two f64's, then this method returns the two f64's, with Lo being
447 /// equal to the lower 64 bits of Op, and Hi to the upper 64 bits.
448 void GetExpandedFloat(SDValue Op
, SDValue
&Lo
, SDValue
&Hi
);
449 void SetExpandedFloat(SDValue Op
, SDValue Lo
, SDValue Hi
);
451 // Float Result Expansion.
452 void ExpandFloatResult(SDNode
*N
, unsigned ResNo
);
453 void ExpandFloatRes_ConstantFP(SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
454 void ExpandFloatRes_FABS (SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
455 void ExpandFloatRes_FADD (SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
456 void ExpandFloatRes_FCEIL (SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
457 void ExpandFloatRes_FCOS (SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
458 void ExpandFloatRes_FDIV (SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
459 void ExpandFloatRes_FEXP (SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
460 void ExpandFloatRes_FEXP2 (SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
461 void ExpandFloatRes_FFLOOR (SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
462 void ExpandFloatRes_FLOG (SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
463 void ExpandFloatRes_FLOG2 (SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
464 void ExpandFloatRes_FLOG10 (SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
465 void ExpandFloatRes_FMUL (SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
466 void ExpandFloatRes_FNEARBYINT(SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
467 void ExpandFloatRes_FNEG (SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
468 void ExpandFloatRes_FP_EXTEND (SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
469 void ExpandFloatRes_FPOW (SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
470 void ExpandFloatRes_FPOWI (SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
471 void ExpandFloatRes_FRINT (SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
472 void ExpandFloatRes_FSIN (SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
473 void ExpandFloatRes_FSQRT (SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
474 void ExpandFloatRes_FSUB (SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
475 void ExpandFloatRes_FTRUNC (SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
476 void ExpandFloatRes_LOAD (SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
477 void ExpandFloatRes_XINT_TO_FP(SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
479 // Float Operand Expansion.
480 bool ExpandFloatOperand(SDNode
*N
, unsigned OperandNo
);
481 SDValue
ExpandFloatOp_BR_CC(SDNode
*N
);
482 SDValue
ExpandFloatOp_FP_ROUND(SDNode
*N
);
483 SDValue
ExpandFloatOp_FP_TO_SINT(SDNode
*N
);
484 SDValue
ExpandFloatOp_FP_TO_UINT(SDNode
*N
);
485 SDValue
ExpandFloatOp_SELECT_CC(SDNode
*N
);
486 SDValue
ExpandFloatOp_SETCC(SDNode
*N
);
487 SDValue
ExpandFloatOp_STORE(SDNode
*N
, unsigned OpNo
);
489 void FloatExpandSetCCOperands(SDValue
&NewLHS
, SDValue
&NewRHS
,
490 ISD::CondCode
&CCCode
, DebugLoc dl
);
492 //===--------------------------------------------------------------------===//
493 // Scalarization Support: LegalizeVectorTypes.cpp
494 //===--------------------------------------------------------------------===//
496 /// GetScalarizedVector - Given a processed one-element vector Op which was
497 /// scalarized to its element type, this returns the element. For example,
498 /// if Op is a v1i32, Op = < i32 val >, this method returns val, an i32.
499 SDValue
GetScalarizedVector(SDValue Op
) {
500 SDValue
&ScalarizedOp
= ScalarizedVectors
[Op
];
501 RemapValue(ScalarizedOp
);
502 assert(ScalarizedOp
.getNode() && "Operand wasn't scalarized?");
505 void SetScalarizedVector(SDValue Op
, SDValue Result
);
507 // Vector Result Scalarization: <1 x ty> -> ty.
508 void ScalarizeVectorResult(SDNode
*N
, unsigned OpNo
);
509 SDValue
ScalarizeVecRes_BinOp(SDNode
*N
);
510 SDValue
ScalarizeVecRes_UnaryOp(SDNode
*N
);
512 SDValue
ScalarizeVecRes_BIT_CONVERT(SDNode
*N
);
513 SDValue
ScalarizeVecRes_CONVERT_RNDSAT(SDNode
*N
);
514 SDValue
ScalarizeVecRes_EXTRACT_SUBVECTOR(SDNode
*N
);
515 SDValue
ScalarizeVecRes_FPOWI(SDNode
*N
);
516 SDValue
ScalarizeVecRes_INSERT_VECTOR_ELT(SDNode
*N
);
517 SDValue
ScalarizeVecRes_LOAD(LoadSDNode
*N
);
518 SDValue
ScalarizeVecRes_SCALAR_TO_VECTOR(SDNode
*N
);
519 SDValue
ScalarizeVecRes_SELECT(SDNode
*N
);
520 SDValue
ScalarizeVecRes_SELECT_CC(SDNode
*N
);
521 SDValue
ScalarizeVecRes_SETCC(SDNode
*N
);
522 SDValue
ScalarizeVecRes_UNDEF(SDNode
*N
);
523 SDValue
ScalarizeVecRes_VECTOR_SHUFFLE(SDNode
*N
);
524 SDValue
ScalarizeVecRes_VSETCC(SDNode
*N
);
526 // Vector Operand Scalarization: <1 x ty> -> ty.
527 bool ScalarizeVectorOperand(SDNode
*N
, unsigned OpNo
);
528 SDValue
ScalarizeVecOp_BIT_CONVERT(SDNode
*N
);
529 SDValue
ScalarizeVecOp_CONCAT_VECTORS(SDNode
*N
);
530 SDValue
ScalarizeVecOp_EXTRACT_VECTOR_ELT(SDNode
*N
);
531 SDValue
ScalarizeVecOp_STORE(StoreSDNode
*N
, unsigned OpNo
);
533 //===--------------------------------------------------------------------===//
534 // Vector Splitting Support: LegalizeVectorTypes.cpp
535 //===--------------------------------------------------------------------===//
537 /// GetSplitVector - Given a processed vector Op which was split into vectors
538 /// of half the size, this method returns the halves. The first elements of
539 /// Op coincide with the elements of Lo; the remaining elements of Op coincide
540 /// with the elements of Hi: Op is what you would get by concatenating Lo and
541 /// Hi. For example, if Op is a v8i32 that was split into two v4i32's, then
542 /// this method returns the two v4i32's, with Lo corresponding to the first 4
543 /// elements of Op, and Hi to the last 4 elements.
544 void GetSplitVector(SDValue Op
, SDValue
&Lo
, SDValue
&Hi
);
545 void SetSplitVector(SDValue Op
, SDValue Lo
, SDValue Hi
);
547 // Vector Result Splitting: <128 x ty> -> 2 x <64 x ty>.
548 void SplitVectorResult(SDNode
*N
, unsigned OpNo
);
549 void SplitVecRes_BinOp(SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
550 void SplitVecRes_UnaryOp(SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
552 void SplitVecRes_BIT_CONVERT(SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
553 void SplitVecRes_BUILD_PAIR(SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
554 void SplitVecRes_BUILD_VECTOR(SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
555 void SplitVecRes_CONCAT_VECTORS(SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
556 void SplitVecRes_CONVERT_RNDSAT(SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
557 void SplitVecRes_EXTRACT_SUBVECTOR(SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
558 void SplitVecRes_FPOWI(SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
559 void SplitVecRes_INSERT_VECTOR_ELT(SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
560 void SplitVecRes_LOAD(LoadSDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
561 void SplitVecRes_SCALAR_TO_VECTOR(SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
562 void SplitVecRes_SETCC(SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
563 void SplitVecRes_UNDEF(SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
564 void SplitVecRes_VECTOR_SHUFFLE(ShuffleVectorSDNode
*N
, SDValue
&Lo
,
567 // Vector Operand Splitting: <128 x ty> -> 2 x <64 x ty>.
568 bool SplitVectorOperand(SDNode
*N
, unsigned OpNo
);
569 SDValue
SplitVecOp_UnaryOp(SDNode
*N
);
571 SDValue
SplitVecOp_BIT_CONVERT(SDNode
*N
);
572 SDValue
SplitVecOp_EXTRACT_SUBVECTOR(SDNode
*N
);
573 SDValue
SplitVecOp_EXTRACT_VECTOR_ELT(SDNode
*N
);
574 SDValue
SplitVecOp_STORE(StoreSDNode
*N
, unsigned OpNo
);
576 //===--------------------------------------------------------------------===//
577 // Vector Widening Support: LegalizeVectorTypes.cpp
578 //===--------------------------------------------------------------------===//
580 /// GetWidenedVector - Given a processed vector Op which was widened into a
581 /// larger vector, this method returns the larger vector. The elements of
582 /// the returned vector consist of the elements of Op followed by elements
583 /// containing rubbish. For example, if Op is a v2i32 that was widened to a
584 /// v4i32, then this method returns a v4i32 for which the first two elements
585 /// are the same as those of Op, while the last two elements contain rubbish.
586 SDValue
GetWidenedVector(SDValue Op
) {
587 SDValue
&WidenedOp
= WidenedVectors
[Op
];
588 RemapValue(WidenedOp
);
589 assert(WidenedOp
.getNode() && "Operand wasn't widened?");
592 void SetWidenedVector(SDValue Op
, SDValue Result
);
594 // Widen Vector Result Promotion.
595 void WidenVectorResult(SDNode
*N
, unsigned ResNo
);
596 SDValue
WidenVecRes_BIT_CONVERT(SDNode
* N
);
597 SDValue
WidenVecRes_BUILD_VECTOR(SDNode
* N
);
598 SDValue
WidenVecRes_CONCAT_VECTORS(SDNode
* N
);
599 SDValue
WidenVecRes_CONVERT_RNDSAT(SDNode
* N
);
600 SDValue
WidenVecRes_EXTRACT_SUBVECTOR(SDNode
* N
);
601 SDValue
WidenVecRes_INSERT_VECTOR_ELT(SDNode
* N
);
602 SDValue
WidenVecRes_LOAD(SDNode
* N
);
603 SDValue
WidenVecRes_SCALAR_TO_VECTOR(SDNode
* N
);
604 SDValue
WidenVecRes_SELECT(SDNode
* N
);
605 SDValue
WidenVecRes_SELECT_CC(SDNode
* N
);
606 SDValue
WidenVecRes_UNDEF(SDNode
*N
);
607 SDValue
WidenVecRes_VECTOR_SHUFFLE(ShuffleVectorSDNode
*N
);
608 SDValue
WidenVecRes_VSETCC(SDNode
* N
);
610 SDValue
WidenVecRes_Binary(SDNode
*N
);
611 SDValue
WidenVecRes_Convert(SDNode
*N
);
612 SDValue
WidenVecRes_Shift(SDNode
*N
);
613 SDValue
WidenVecRes_Unary(SDNode
*N
);
615 // Widen Vector Operand.
616 bool WidenVectorOperand(SDNode
*N
, unsigned ResNo
);
617 SDValue
WidenVecOp_BIT_CONVERT(SDNode
*N
);
618 SDValue
WidenVecOp_CONCAT_VECTORS(SDNode
*N
);
619 SDValue
WidenVecOp_EXTRACT_VECTOR_ELT(SDNode
*N
);
620 SDValue
WidenVecOp_STORE(SDNode
* N
);
622 SDValue
WidenVecOp_Convert(SDNode
*N
);
624 //===--------------------------------------------------------------------===//
625 // Vector Widening Utilities Support: LegalizeVectorTypes.cpp
626 //===--------------------------------------------------------------------===//
628 /// Helper genWidenVectorLoads - Helper function to generate a set of
629 /// loads to load a vector with a resulting wider type. It takes
630 /// ExtType: Extension type
631 /// LdChain: list of chains for the load we have generated.
632 /// Chain: incoming chain for the ld vector.
633 /// BasePtr: base pointer to load from.
634 /// SV: memory disambiguation source value.
635 /// SVOffset: memory disambiugation offset.
636 /// Alignment: alignment of the memory.
637 /// isVolatile: volatile load.
638 /// LdWidth: width of memory that we want to load.
639 /// ResType: the wider result result type for the resulting vector.
640 /// dl: DebugLoc to be applied to new nodes
641 SDValue
GenWidenVectorLoads(SmallVector
<SDValue
, 16>& LdChain
, SDValue Chain
,
642 SDValue BasePtr
, const Value
*SV
,
643 int SVOffset
, unsigned Alignment
,
644 bool isVolatile
, unsigned LdWidth
,
645 EVT ResType
, DebugLoc dl
);
647 /// Helper genWidenVectorStores - Helper function to generate a set of
648 /// stores to store a widen vector into non widen memory
650 /// StChain: list of chains for the stores we have generated
651 /// Chain: incoming chain for the ld vector
652 /// BasePtr: base pointer to load from
653 /// SV: memory disambiguation source value
654 /// SVOffset: memory disambiugation offset
655 /// Alignment: alignment of the memory
656 /// isVolatile: volatile lod
657 /// ValOp: value to store
658 /// StWidth: width of memory that we want to store
659 /// dl: DebugLoc to be applied to new nodes
660 void GenWidenVectorStores(SmallVector
<SDValue
, 16>& StChain
, SDValue Chain
,
661 SDValue BasePtr
, const Value
*SV
,
662 int SVOffset
, unsigned Alignment
,
663 bool isVolatile
, SDValue ValOp
,
664 unsigned StWidth
, DebugLoc dl
);
666 /// Modifies a vector input (widen or narrows) to a vector of NVT. The
667 /// input vector must have the same element type as NVT.
668 SDValue
ModifyToType(SDValue InOp
, EVT WidenVT
);
671 //===--------------------------------------------------------------------===//
672 // Generic Splitting: LegalizeTypesGeneric.cpp
673 //===--------------------------------------------------------------------===//
675 // Legalization methods which only use that the illegal type is split into two
676 // not necessarily identical types. As such they can be used for splitting
677 // vectors and expanding integers and floats.
679 void GetSplitOp(SDValue Op
, SDValue
&Lo
, SDValue
&Hi
) {
680 if (Op
.getValueType().isVector())
681 GetSplitVector(Op
, Lo
, Hi
);
682 else if (Op
.getValueType().isInteger())
683 GetExpandedInteger(Op
, Lo
, Hi
);
685 GetExpandedFloat(Op
, Lo
, Hi
);
688 /// GetSplitDestVTs - Compute the VTs needed for the low/hi parts of a type
689 /// which is split (or expanded) into two not necessarily identical pieces.
690 void GetSplitDestVTs(EVT InVT
, EVT
&LoVT
, EVT
&HiVT
);
692 /// GetPairElements - Use ISD::EXTRACT_ELEMENT nodes to extract the low and
693 /// high parts of the given value.
694 void GetPairElements(SDValue Pair
, SDValue
&Lo
, SDValue
&Hi
);
696 // Generic Result Splitting.
697 void SplitRes_MERGE_VALUES(SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
698 void SplitRes_SELECT (SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
699 void SplitRes_SELECT_CC (SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
700 void SplitRes_UNDEF (SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
702 //===--------------------------------------------------------------------===//
703 // Generic Expansion: LegalizeTypesGeneric.cpp
704 //===--------------------------------------------------------------------===//
706 // Legalization methods which only use that the illegal type is split into two
707 // identical types of half the size, and that the Lo/Hi part is stored first
708 // in memory on little/big-endian machines, followed by the Hi/Lo part. As
709 // such they can be used for expanding integers and floats.
711 void GetExpandedOp(SDValue Op
, SDValue
&Lo
, SDValue
&Hi
) {
712 if (Op
.getValueType().isInteger())
713 GetExpandedInteger(Op
, Lo
, Hi
);
715 GetExpandedFloat(Op
, Lo
, Hi
);
718 // Generic Result Expansion.
719 void ExpandRes_BIT_CONVERT (SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
720 void ExpandRes_BUILD_PAIR (SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
721 void ExpandRes_EXTRACT_ELEMENT (SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
722 void ExpandRes_EXTRACT_VECTOR_ELT(SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
723 void ExpandRes_NormalLoad (SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
724 void ExpandRes_VAARG (SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
726 // Generic Operand Expansion.
727 SDValue
ExpandOp_BIT_CONVERT (SDNode
*N
);
728 SDValue
ExpandOp_BUILD_VECTOR (SDNode
*N
);
729 SDValue
ExpandOp_EXTRACT_ELEMENT (SDNode
*N
);
730 SDValue
ExpandOp_INSERT_VECTOR_ELT(SDNode
*N
);
731 SDValue
ExpandOp_SCALAR_TO_VECTOR (SDNode
*N
);
732 SDValue
ExpandOp_NormalStore (SDNode
*N
, unsigned OpNo
);
735 } // end namespace llvm.