1 //===- DeadMachineInstructionElim.cpp - Remove dead machine instructions --===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This is an extremely simple MachineInstr-level dead-code-elimination pass.
12 //===----------------------------------------------------------------------===//
14 #include "llvm/CodeGen/Passes.h"
15 #include "llvm/Pass.h"
16 #include "llvm/CodeGen/MachineFunctionPass.h"
17 #include "llvm/CodeGen/MachineRegisterInfo.h"
18 #include "llvm/Support/Compiler.h"
19 #include "llvm/Support/Debug.h"
20 #include "llvm/Target/TargetInstrInfo.h"
21 #include "llvm/Target/TargetMachine.h"
25 class VISIBILITY_HIDDEN DeadMachineInstructionElim
:
26 public MachineFunctionPass
{
27 virtual bool runOnMachineFunction(MachineFunction
&MF
);
29 const TargetRegisterInfo
*TRI
;
30 const MachineRegisterInfo
*MRI
;
31 const TargetInstrInfo
*TII
;
32 BitVector LivePhysRegs
;
35 static char ID
; // Pass identification, replacement for typeid
36 DeadMachineInstructionElim() : MachineFunctionPass(&ID
) {}
39 bool isDead(const MachineInstr
*MI
) const;
42 char DeadMachineInstructionElim::ID
= 0;
44 static RegisterPass
<DeadMachineInstructionElim
>
45 Y("dead-mi-elimination",
46 "Remove dead machine instructions");
48 FunctionPass
*llvm::createDeadMachineInstructionElimPass() {
49 return new DeadMachineInstructionElim();
52 bool DeadMachineInstructionElim::isDead(const MachineInstr
*MI
) const {
53 // Don't delete instructions with side effects.
54 bool SawStore
= false;
55 if (!MI
->isSafeToMove(TII
, SawStore
))
58 // Examine each operand.
59 for (unsigned i
= 0, e
= MI
->getNumOperands(); i
!= e
; ++i
) {
60 const MachineOperand
&MO
= MI
->getOperand(i
);
61 if (MO
.isReg() && MO
.isDef()) {
62 unsigned Reg
= MO
.getReg();
63 if (TargetRegisterInfo::isPhysicalRegister(Reg
) ?
64 LivePhysRegs
[Reg
] : !MRI
->use_empty(Reg
)) {
65 // This def has a use. Don't delete the instruction!
71 // If there are no defs with uses, the instruction is dead.
75 bool DeadMachineInstructionElim::runOnMachineFunction(MachineFunction
&MF
) {
76 bool AnyChanges
= false;
77 MRI
= &MF
.getRegInfo();
78 TRI
= MF
.getTarget().getRegisterInfo();
79 TII
= MF
.getTarget().getInstrInfo();
81 // Compute a bitvector to represent all non-allocatable physregs.
82 BitVector NonAllocatableRegs
= TRI
->getAllocatableSet(MF
);
83 NonAllocatableRegs
.flip();
85 // Loop over all instructions in all blocks, from bottom to top, so that it's
86 // more likely that chains of dependent but ultimately dead instructions will
88 for (MachineFunction::reverse_iterator I
= MF
.rbegin(), E
= MF
.rend();
90 MachineBasicBlock
*MBB
= &*I
;
92 // Start out assuming that all non-allocatable registers are live
94 LivePhysRegs
= NonAllocatableRegs
;
96 // Also add any explicit live-out physregs for this block.
97 if (!MBB
->empty() && MBB
->back().getDesc().isReturn())
98 for (MachineRegisterInfo::liveout_iterator LOI
= MRI
->liveout_begin(),
99 LOE
= MRI
->liveout_end(); LOI
!= LOE
; ++LOI
) {
101 if (TargetRegisterInfo::isPhysicalRegister(Reg
))
102 LivePhysRegs
.set(Reg
);
105 // Now scan the instructions and delete dead ones, tracking physreg
106 // liveness as we go.
107 for (MachineBasicBlock::reverse_iterator MII
= MBB
->rbegin(),
108 MIE
= MBB
->rend(); MII
!= MIE
; ) {
109 MachineInstr
*MI
= &*MII
;
111 // If the instruction is dead, delete it!
113 DOUT
<< "DeadMachineInstructionElim: DELETING: " << *MI
;
115 MI
->eraseFromParent();
117 // MII is now pointing to the next instruction to process,
118 // so don't increment it.
122 // Record the physreg defs.
123 for (unsigned i
= 0, e
= MI
->getNumOperands(); i
!= e
; ++i
) {
124 const MachineOperand
&MO
= MI
->getOperand(i
);
125 if (MO
.isReg() && MO
.isDef()) {
126 unsigned Reg
= MO
.getReg();
127 if (Reg
!= 0 && TargetRegisterInfo::isPhysicalRegister(Reg
)) {
128 LivePhysRegs
.reset(Reg
);
129 // Check the subreg set, not the alias set, because a def
130 // of a super-register may still be partially live after
132 for (const unsigned *SubRegs
= TRI
->getSubRegisters(Reg
);
134 LivePhysRegs
.reset(*SubRegs
);
138 // Record the physreg uses, after the defs, in case a physreg is
139 // both defined and used in the same instruction.
140 for (unsigned i
= 0, e
= MI
->getNumOperands(); i
!= e
; ++i
) {
141 const MachineOperand
&MO
= MI
->getOperand(i
);
142 if (MO
.isReg() && MO
.isUse()) {
143 unsigned Reg
= MO
.getReg();
144 if (Reg
!= 0 && TargetRegisterInfo::isPhysicalRegister(Reg
)) {
145 LivePhysRegs
.set(Reg
);
146 for (const unsigned *AliasSet
= TRI
->getAliasSet(Reg
);
147 *AliasSet
; ++AliasSet
)
148 LivePhysRegs
.set(*AliasSet
);
153 // We didn't delete the current instruction, so increment MII to
159 LivePhysRegs
.clear();