lib/Target/Blackfin/BlackfinISelLowering.h

   1 //===- BlackfinISelLowering.h - Blackfin DAG Lowering Interface -*- C++ -*-===//
   2 //
   3 //                     The LLVM Compiler Infrastructure
   4 //
   5 // This file is distributed under the University of Illinois Open Source
   6 // License. See LICENSE.TXT for details.
   7 //
   8 //===----------------------------------------------------------------------===//
   9 //
  10 // This file defines the interfaces that Blackfin uses to lower LLVM code into a
  11 // selection DAG.
  12 //
  13 //===----------------------------------------------------------------------===//
  14
  15 #ifndef BLACKFIN_ISELLOWERING_H
  16 #define BLACKFIN_ISELLOWERING_H
  17
  18 #include "llvm/Target/TargetLowering.h"
  19 #include "Blackfin.h"
  20
  21 namespace llvm {
  22
  23   namespace BFISD {
  24     enum {
  25       FIRST_NUMBER = ISD::BUILTIN_OP_END,
  26       CALL,                     // A call instruction.
  27       RET_FLAG,                 // Return with a flag operand.
  28       Wrapper                   // Address wrapper
  29     };
  30   }
  31
  32   class BlackfinTargetLowering : public TargetLowering {
  33     int VarArgsFrameOffset;   // Frame offset to start of varargs area.
  34   public:
  35     BlackfinTargetLowering(TargetMachine &TM);
  36     virtual MVT::SimpleValueType getSetCCResultType(EVT VT) const;
  37     virtual SDValue LowerOperation(SDValue Op, SelectionDAG &DAG);
  38     virtual void ReplaceNodeResults(SDNode *N,
  39                                     SmallVectorImpl<SDValue> &Results,
  40                                     SelectionDAG &DAG);
  41
  42     int getVarArgsFrameOffset() const { return VarArgsFrameOffset; }
  43
  44     ConstraintType getConstraintType(const std::string &Constraint) const;
  45     std::pair<unsigned, const TargetRegisterClass*>
  46     getRegForInlineAsmConstraint(const std::string &Constraint, EVT VT) const;
  47     std::vector<unsigned>
  48     getRegClassForInlineAsmConstraint(const std::string &Constraint,
  49                                       EVT VT) const;
  50     virtual bool isOffsetFoldingLegal(const GlobalAddressSDNode *GA) const;
  51     const char *getTargetNodeName(unsigned Opcode) const;
  52     unsigned getFunctionAlignment(const Function *F) const;
  53
  54   private:
  55     SDValue LowerGlobalAddress(SDValue Op, SelectionDAG &DAG);
  56     SDValue LowerJumpTable(SDValue Op, SelectionDAG &DAG);
  57     SDValue LowerADDE(SDValue Op, SelectionDAG &DAG);
  58
  59     virtual SDValue
  60       LowerFormalArguments(SDValue Chain,
  61                            CallingConv::ID CallConv, bool isVarArg,
  62                            const SmallVectorImpl<ISD::InputArg> &Ins,
  63                            DebugLoc dl, SelectionDAG &DAG,
  64                            SmallVectorImpl<SDValue> &InVals);
  65     virtual SDValue
  66       LowerCall(SDValue Chain, SDValue Callee,
  67                 CallingConv::ID CallConv, bool isVarArg, bool isTailCall,
  68                 const SmallVectorImpl<ISD::OutputArg> &Outs,
  69                 const SmallVectorImpl<ISD::InputArg> &Ins,
  70                 DebugLoc dl, SelectionDAG &DAG,
  71                 SmallVectorImpl<SDValue> &InVals);
  72
  73     virtual SDValue
  74       LowerReturn(SDValue Chain,
  75                   CallingConv::ID CallConv, bool isVarArg,
  76                   const SmallVectorImpl<ISD::OutputArg> &Outs,
  77                   DebugLoc dl, SelectionDAG &DAG);
  78   };
  79 } // end namespace llvm
  80
  81 #endif    // BLACKFIN_ISELLOWERING_H