this is failing on linux hosts, force a triple.
[llvm/avr.git] / lib / Target / PowerPC / PPCCodeEmitter.cpp
blob16535b258d92def314ba476b7dafe8743c1edb69
1 //===-- PPCCodeEmitter.cpp - JIT Code Emitter for PowerPC32 -------*- C++ -*-=//
2 //
3 // The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // This file defines the PowerPC 32-bit CodeEmitter and associated machinery to
11 // JIT-compile bitcode to native PowerPC.
13 //===----------------------------------------------------------------------===//
15 #include "PPCTargetMachine.h"
16 #include "PPCRelocations.h"
17 #include "PPC.h"
18 #include "llvm/Module.h"
19 #include "llvm/PassManager.h"
20 #include "llvm/CodeGen/MachineCodeEmitter.h"
21 #include "llvm/CodeGen/JITCodeEmitter.h"
22 #include "llvm/CodeGen/ObjectCodeEmitter.h"
23 #include "llvm/CodeGen/MachineFunctionPass.h"
24 #include "llvm/CodeGen/MachineInstrBuilder.h"
25 #include "llvm/CodeGen/MachineModuleInfo.h"
26 #include "llvm/CodeGen/Passes.h"
27 #include "llvm/Support/Debug.h"
28 #include "llvm/Support/Compiler.h"
29 #include "llvm/Support/ErrorHandling.h"
30 #include "llvm/Support/raw_ostream.h"
31 #include "llvm/Target/TargetOptions.h"
32 using namespace llvm;
34 namespace {
35 class PPCCodeEmitter {
36 TargetMachine &TM;
37 MachineCodeEmitter &MCE;
38 public:
39 PPCCodeEmitter(TargetMachine &tm, MachineCodeEmitter &mce):
40 TM(tm), MCE(mce) {}
42 /// getBinaryCodeForInstr - This function, generated by the
43 /// CodeEmitterGenerator using TableGen, produces the binary encoding for
44 /// machine instructions.
46 unsigned getBinaryCodeForInstr(const MachineInstr &MI);
48 /// getMachineOpValue - evaluates the MachineOperand of a given MachineInstr
50 unsigned getMachineOpValue(const MachineInstr &MI,
51 const MachineOperand &MO);
53 /// MovePCtoLROffset - When/if we see a MovePCtoLR instruction, we record
54 /// its address in the function into this pointer.
56 void *MovePCtoLROffset;
59 template <class CodeEmitter>
60 class VISIBILITY_HIDDEN Emitter : public MachineFunctionPass,
61 public PPCCodeEmitter {
62 TargetMachine &TM;
63 CodeEmitter &MCE;
65 void getAnalysisUsage(AnalysisUsage &AU) const {
66 AU.addRequired<MachineModuleInfo>();
67 MachineFunctionPass::getAnalysisUsage(AU);
70 public:
71 static char ID;
72 Emitter(TargetMachine &tm, CodeEmitter &mce)
73 : MachineFunctionPass(&ID), PPCCodeEmitter(tm, mce), TM(tm), MCE(mce) {}
75 const char *getPassName() const { return "PowerPC Machine Code Emitter"; }
77 /// runOnMachineFunction - emits the given MachineFunction to memory
78 ///
79 bool runOnMachineFunction(MachineFunction &MF);
81 /// emitBasicBlock - emits the given MachineBasicBlock to memory
82 ///
83 void emitBasicBlock(MachineBasicBlock &MBB);
85 /// getValueBit - return the particular bit of Val
86 ///
87 unsigned getValueBit(int64_t Val, unsigned bit) { return (Val >> bit) & 1; }
90 template <class CodeEmitter>
91 char Emitter<CodeEmitter>::ID = 0;
94 /// createPPCCodeEmitterPass - Return a pass that emits the collected PPC code
95 /// to the specified MCE object.
97 FunctionPass *llvm::createPPCCodeEmitterPass(PPCTargetMachine &TM,
98 MachineCodeEmitter &MCE) {
99 return new Emitter<MachineCodeEmitter>(TM, MCE);
102 FunctionPass *llvm::createPPCJITCodeEmitterPass(PPCTargetMachine &TM,
103 JITCodeEmitter &JCE) {
104 return new Emitter<JITCodeEmitter>(TM, JCE);
107 FunctionPass *llvm::createPPCObjectCodeEmitterPass(PPCTargetMachine &TM,
108 ObjectCodeEmitter &OCE) {
109 return new Emitter<ObjectCodeEmitter>(TM, OCE);
112 template <class CodeEmitter>
113 bool Emitter<CodeEmitter>::runOnMachineFunction(MachineFunction &MF) {
114 assert((MF.getTarget().getRelocationModel() != Reloc::Default ||
115 MF.getTarget().getRelocationModel() != Reloc::Static) &&
116 "JIT relocation model must be set to static or default!");
118 MCE.setModuleInfo(&getAnalysis<MachineModuleInfo>());
119 do {
120 MovePCtoLROffset = 0;
121 MCE.startFunction(MF);
122 for (MachineFunction::iterator BB = MF.begin(), E = MF.end(); BB != E; ++BB)
123 emitBasicBlock(*BB);
124 } while (MCE.finishFunction(MF));
126 return false;
129 template <class CodeEmitter>
130 void Emitter<CodeEmitter>::emitBasicBlock(MachineBasicBlock &MBB) {
131 MCE.StartMachineBasicBlock(&MBB);
133 for (MachineBasicBlock::iterator I = MBB.begin(), E = MBB.end(); I != E; ++I){
134 const MachineInstr &MI = *I;
135 MCE.processDebugLoc(MI.getDebugLoc());
136 switch (MI.getOpcode()) {
137 default:
138 MCE.emitWordBE(getBinaryCodeForInstr(MI));
139 break;
140 case TargetInstrInfo::DBG_LABEL:
141 case TargetInstrInfo::EH_LABEL:
142 MCE.emitLabel(MI.getOperand(0).getImm());
143 break;
144 case TargetInstrInfo::IMPLICIT_DEF:
145 break; // pseudo opcode, no side effects
146 case PPC::MovePCtoLR:
147 case PPC::MovePCtoLR8:
148 assert(TM.getRelocationModel() == Reloc::PIC_);
149 MovePCtoLROffset = (void*)MCE.getCurrentPCValue();
150 MCE.emitWordBE(0x48000005); // bl 1
151 break;
156 unsigned PPCCodeEmitter::getMachineOpValue(const MachineInstr &MI,
157 const MachineOperand &MO) {
159 unsigned rv = 0; // Return value; defaults to 0 for unhandled cases
160 // or things that get fixed up later by the JIT.
161 if (MO.isReg()) {
162 rv = PPCRegisterInfo::getRegisterNumbering(MO.getReg());
164 // Special encoding for MTCRF and MFOCRF, which uses a bit mask for the
165 // register, not the register number directly.
166 if ((MI.getOpcode() == PPC::MTCRF || MI.getOpcode() == PPC::MFOCRF) &&
167 (MO.getReg() >= PPC::CR0 && MO.getReg() <= PPC::CR7)) {
168 rv = 0x80 >> rv;
170 } else if (MO.isImm()) {
171 rv = MO.getImm();
172 } else if (MO.isGlobal() || MO.isSymbol() ||
173 MO.isCPI() || MO.isJTI()) {
174 unsigned Reloc = 0;
175 if (MI.getOpcode() == PPC::BL_Darwin || MI.getOpcode() == PPC::BL8_Darwin ||
176 MI.getOpcode() == PPC::BL_SVR4 || MI.getOpcode() == PPC::BL8_ELF ||
177 MI.getOpcode() == PPC::TAILB || MI.getOpcode() == PPC::TAILB8)
178 Reloc = PPC::reloc_pcrel_bx;
179 else {
180 if (TM.getRelocationModel() == Reloc::PIC_) {
181 assert(MovePCtoLROffset && "MovePCtoLR not seen yet?");
183 switch (MI.getOpcode()) {
184 default: MI.dump(); llvm_unreachable("Unknown instruction for relocation!");
185 case PPC::LIS:
186 case PPC::LIS8:
187 case PPC::ADDIS:
188 case PPC::ADDIS8:
189 Reloc = PPC::reloc_absolute_high; // Pointer to symbol
190 break;
191 case PPC::LI:
192 case PPC::LI8:
193 case PPC::LA:
194 // Loads.
195 case PPC::LBZ:
196 case PPC::LBZ8:
197 case PPC::LHA:
198 case PPC::LHA8:
199 case PPC::LHZ:
200 case PPC::LHZ8:
201 case PPC::LWZ:
202 case PPC::LWZ8:
203 case PPC::LFS:
204 case PPC::LFD:
206 // Stores.
207 case PPC::STB:
208 case PPC::STB8:
209 case PPC::STH:
210 case PPC::STH8:
211 case PPC::STW:
212 case PPC::STW8:
213 case PPC::STFS:
214 case PPC::STFD:
215 Reloc = PPC::reloc_absolute_low;
216 break;
218 case PPC::LWA:
219 case PPC::LD:
220 case PPC::STD:
221 case PPC::STD_32:
222 Reloc = PPC::reloc_absolute_low_ix;
223 break;
227 MachineRelocation R;
228 if (MO.isGlobal()) {
229 R = MachineRelocation::getGV(MCE.getCurrentPCOffset(), Reloc,
230 MO.getGlobal(), 0,
231 isa<Function>(MO.getGlobal()));
232 } else if (MO.isSymbol()) {
233 R = MachineRelocation::getExtSym(MCE.getCurrentPCOffset(),
234 Reloc, MO.getSymbolName(), 0);
235 } else if (MO.isCPI()) {
236 R = MachineRelocation::getConstPool(MCE.getCurrentPCOffset(),
237 Reloc, MO.getIndex(), 0);
238 } else {
239 assert(MO.isJTI());
240 R = MachineRelocation::getJumpTable(MCE.getCurrentPCOffset(),
241 Reloc, MO.getIndex(), 0);
244 // If in PIC mode, we need to encode the negated address of the
245 // 'movepctolr' into the unrelocated field. After relocation, we'll have
246 // &gv-&movepctolr-4 in the imm field. Once &movepctolr is added to the imm
247 // field, we get &gv. This doesn't happen for branch relocations, which are
248 // always implicitly pc relative.
249 if (TM.getRelocationModel() == Reloc::PIC_ && Reloc != PPC::reloc_pcrel_bx){
250 assert(MovePCtoLROffset && "MovePCtoLR not seen yet?");
251 R.setConstantVal(-(intptr_t)MovePCtoLROffset - 4);
253 MCE.addRelocation(R);
255 } else if (MO.isMBB()) {
256 unsigned Reloc = 0;
257 unsigned Opcode = MI.getOpcode();
258 if (Opcode == PPC::B || Opcode == PPC::BL_Darwin ||
259 Opcode == PPC::BLA_Darwin|| Opcode == PPC::BL_SVR4 ||
260 Opcode == PPC::BLA_SVR4)
261 Reloc = PPC::reloc_pcrel_bx;
262 else // BCC instruction
263 Reloc = PPC::reloc_pcrel_bcx;
265 MCE.addRelocation(MachineRelocation::getBB(MCE.getCurrentPCOffset(),
266 Reloc, MO.getMBB()));
267 } else {
268 #ifndef NDEBUG
269 errs() << "ERROR: Unknown type of MachineOperand: " << MO << "\n";
270 #endif
271 llvm_unreachable(0);
274 return rv;
277 #include "PPCGenCodeEmitter.inc"