1 //===-- PPCTargetMachine.h - Define TargetMachine for PowerPC -----*- C++ -*-=//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file declares the PowerPC specific subclass of TargetMachine.
12 //===----------------------------------------------------------------------===//
14 #ifndef PPC_TARGETMACHINE_H
15 #define PPC_TARGETMACHINE_H
17 #include "PPCFrameInfo.h"
18 #include "PPCSubtarget.h"
19 #include "PPCJITInfo.h"
20 #include "PPCInstrInfo.h"
21 #include "PPCISelLowering.h"
22 #include "PPCMachOWriterInfo.h"
23 #include "llvm/Target/TargetMachine.h"
24 #include "llvm/Target/TargetData.h"
30 /// PPCTargetMachine - Common code between 32-bit and 64-bit PowerPC targets.
32 class PPCTargetMachine
: public LLVMTargetMachine
{
33 PPCSubtarget Subtarget
;
34 const TargetData DataLayout
; // Calculates type size & alignment
35 PPCInstrInfo InstrInfo
;
36 PPCFrameInfo FrameInfo
;
38 PPCTargetLowering TLInfo
;
39 InstrItineraryData InstrItins
;
40 PPCMachOWriterInfo MachOWriterInfo
;
43 PPCTargetMachine(const Target
&T
, const std::string
&TT
,
44 const std::string
&FS
, bool is64Bit
);
46 virtual const PPCInstrInfo
*getInstrInfo() const { return &InstrInfo
; }
47 virtual const PPCFrameInfo
*getFrameInfo() const { return &FrameInfo
; }
48 virtual PPCJITInfo
*getJITInfo() { return &JITInfo
; }
49 virtual PPCTargetLowering
*getTargetLowering() const {
50 return const_cast<PPCTargetLowering
*>(&TLInfo
);
52 virtual const PPCRegisterInfo
*getRegisterInfo() const {
53 return &InstrInfo
.getRegisterInfo();
56 virtual const TargetData
*getTargetData() const { return &DataLayout
; }
57 virtual const PPCSubtarget
*getSubtargetImpl() const { return &Subtarget
; }
58 virtual const InstrItineraryData
getInstrItineraryData() const {
61 virtual const PPCMachOWriterInfo
*getMachOWriterInfo() const {
62 return &MachOWriterInfo
;
65 // Pass Pipeline Configuration
66 virtual bool addInstSelector(PassManagerBase
&PM
, CodeGenOpt::Level OptLevel
);
67 virtual bool addPreEmitPass(PassManagerBase
&PM
, CodeGenOpt::Level OptLevel
);
68 virtual bool addCodeEmitter(PassManagerBase
&PM
, CodeGenOpt::Level OptLevel
,
69 MachineCodeEmitter
&MCE
);
70 virtual bool addCodeEmitter(PassManagerBase
&PM
, CodeGenOpt::Level OptLevel
,
72 virtual bool addCodeEmitter(PassManagerBase
&PM
, CodeGenOpt::Level OptLevel
,
73 ObjectCodeEmitter
&OCE
);
74 virtual bool addSimpleCodeEmitter(PassManagerBase
&PM
,
75 CodeGenOpt::Level OptLevel
,
76 MachineCodeEmitter
&MCE
);
77 virtual bool addSimpleCodeEmitter(PassManagerBase
&PM
,
78 CodeGenOpt::Level OptLevel
,
80 virtual bool addSimpleCodeEmitter(PassManagerBase
&PM
,
81 CodeGenOpt::Level OptLevel
,
82 ObjectCodeEmitter
&OCE
);
83 virtual bool getEnableTailMergeDefault() const;
86 /// PPC32TargetMachine - PowerPC 32-bit target machine.
88 class PPC32TargetMachine
: public PPCTargetMachine
{
90 PPC32TargetMachine(const Target
&T
, const std::string
&TT
,
91 const std::string
&FS
);
94 /// PPC64TargetMachine - PowerPC 64-bit target machine.
96 class PPC64TargetMachine
: public PPCTargetMachine
{
98 PPC64TargetMachine(const Target
&T
, const std::string
&TT
,
99 const std::string
&FS
);
102 } // end namespace llvm