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we don't want people to override printBasicBlockLabel.
[llvm/avr.git] / utils / TableGen / CodeGenTarget.cpp
bloba3ec8dc41d0e5dfcaf55f1f98e535b464721fbc3
1 //===- CodeGenTarget.cpp - CodeGen Target Class Wrapper -------------------===//
2 //
3 // The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // This class wraps target description classes used by the various code
11 // generation TableGen backends. This makes it easier to access the data and
12 // provides a single place that needs to check it for validity. All of these
13 // classes throw exceptions on error conditions.
14 //
15 //===----------------------------------------------------------------------===//
16
17 #include "CodeGenTarget.h"
18 #include "CodeGenIntrinsics.h"
19 #include "Record.h"
20 #include "llvm/ADT/StringExtras.h"
21 #include "llvm/Support/CommandLine.h"
22 #include <algorithm>
23 using namespace llvm;
24
25 static cl::opt<unsigned>
26 AsmParserNum("asmparsernum", cl::init(0),
27 cl::desc("Make -gen-asm-parser emit assembly parser #N"));
28
29 static cl::opt<unsigned>
30 AsmWriterNum("asmwriternum", cl::init(0),
31 cl::desc("Make -gen-asm-writer emit assembly writer #N"));
32
33 /// getValueType - Return the MVT::SimpleValueType that the specified TableGen
34 /// record corresponds to.
35 MVT::SimpleValueType llvm::getValueType(Record *Rec) {
36 return (MVT::SimpleValueType)Rec->getValueAsInt("Value");
37 }
38
39 std::string llvm::getName(MVT::SimpleValueType T) {
40 switch (T) {
41 case MVT::Other: return "UNKNOWN";
42 case MVT::iPTR: return "TLI.getPointerTy()";
43 case MVT::iPTRAny: return "TLI.getPointerTy()";
44 default: return getEnumName(T);
45 }
46 }
47
48 std::string llvm::getEnumName(MVT::SimpleValueType T) {
49 switch (T) {
50 case MVT::Other: return "MVT::Other";
51 case MVT::i1: return "MVT::i1";
52 case MVT::i8: return "MVT::i8";
53 case MVT::i16: return "MVT::i16";
54 case MVT::i32: return "MVT::i32";
55 case MVT::i64: return "MVT::i64";
56 case MVT::i128: return "MVT::i128";
57 case MVT::iAny: return "MVT::iAny";
58 case MVT::fAny: return "MVT::fAny";
59 case MVT::vAny: return "MVT::vAny";
60 case MVT::f32: return "MVT::f32";
61 case MVT::f64: return "MVT::f64";
62 case MVT::f80: return "MVT::f80";
63 case MVT::f128: return "MVT::f128";
64 case MVT::ppcf128: return "MVT::ppcf128";
65 case MVT::Flag: return "MVT::Flag";
66 case MVT::isVoid:return "MVT::isVoid";
67 case MVT::v2i8: return "MVT::v2i8";
68 case MVT::v4i8: return "MVT::v4i8";
69 case MVT::v8i8: return "MVT::v8i8";
70 case MVT::v16i8: return "MVT::v16i8";
71 case MVT::v32i8: return "MVT::v32i8";
72 case MVT::v2i16: return "MVT::v2i16";
73 case MVT::v4i16: return "MVT::v4i16";
74 case MVT::v8i16: return "MVT::v8i16";
75 case MVT::v16i16: return "MVT::v16i16";
76 case MVT::v2i32: return "MVT::v2i32";
77 case MVT::v4i32: return "MVT::v4i32";
78 case MVT::v8i32: return "MVT::v8i32";
79 case MVT::v1i64: return "MVT::v1i64";
80 case MVT::v2i64: return "MVT::v2i64";
81 case MVT::v4i64: return "MVT::v4i64";
82 case MVT::v2f32: return "MVT::v2f32";
83 case MVT::v4f32: return "MVT::v4f32";
84 case MVT::v8f32: return "MVT::v8f32";
85 case MVT::v2f64: return "MVT::v2f64";
86 case MVT::v4f64: return "MVT::v4f64";
87 case MVT::Metadata: return "MVT::Metadata";
88 case MVT::iPTR: return "MVT::iPTR";
89 case MVT::iPTRAny: return "MVT::iPTRAny";
90 default: assert(0 && "ILLEGAL VALUE TYPE!"); return "";
91 }
92 }
93
94 /// getQualifiedName - Return the name of the specified record, with a
95 /// namespace qualifier if the record contains one.
96 ///
97 std::string llvm::getQualifiedName(const Record *R) {
98 std::string Namespace = R->getValueAsString("Namespace");
99 if (Namespace.empty()) return R->getName();
100 return Namespace + "::" + R->getName();
101 }
102
103
104
105
106 /// getTarget - Return the current instance of the Target class.
107 ///
108 CodeGenTarget::CodeGenTarget() {
109 std::vector<Record*> Targets = Records.getAllDerivedDefinitions("Target");
110 if (Targets.size() == 0)
111 throw std::string("ERROR: No 'Target' subclasses defined!");
112 if (Targets.size() != 1)
113 throw std::string("ERROR: Multiple subclasses of Target defined!");
114 TargetRec = Targets[0];
115 }
116
117
118 const std::string &CodeGenTarget::getName() const {
119 return TargetRec->getName();
120 }
121
122 std::string CodeGenTarget::getInstNamespace() const {
123 std::string InstNS;
124
125 for (inst_iterator i = inst_begin(), e = inst_end(); i != e; ++i) {
126 InstNS = i->second.Namespace;
127
128 // Make sure not to pick up "TargetInstrInfo" by accidentally getting
129 // the namespace off the PHI instruction or something.
130 if (InstNS != "TargetInstrInfo")
131 break;
132 }
133
134 return InstNS;
135 }
136
137 Record *CodeGenTarget::getInstructionSet() const {
138 return TargetRec->getValueAsDef("InstructionSet");
139 }
140
141 /// getAsmParser - Return the AssemblyParser definition for this target.
142 ///
143 Record *CodeGenTarget::getAsmParser() const {
144 std::vector<Record*> LI = TargetRec->getValueAsListOfDefs("AssemblyParsers");
145 if (AsmParserNum >= LI.size())
146 throw "Target does not have an AsmParser #" + utostr(AsmParserNum) + "!";
147 return LI[AsmParserNum];
148 }
149
150 /// getAsmWriter - Return the AssemblyWriter definition for this target.
151 ///
152 Record *CodeGenTarget::getAsmWriter() const {
153 std::vector<Record*> LI = TargetRec->getValueAsListOfDefs("AssemblyWriters");
154 if (AsmWriterNum >= LI.size())
155 throw "Target does not have an AsmWriter #" + utostr(AsmWriterNum) + "!";
156 return LI[AsmWriterNum];
157 }
158
159 void CodeGenTarget::ReadRegisters() const {
160 std::vector<Record*> Regs = Records.getAllDerivedDefinitions("Register");
161 if (Regs.empty())
162 throw std::string("No 'Register' subclasses defined!");
163
164 Registers.reserve(Regs.size());
165 Registers.assign(Regs.begin(), Regs.end());
166 }
167
168 CodeGenRegister::CodeGenRegister(Record *R) : TheDef(R) {
169 DeclaredSpillSize = R->getValueAsInt("SpillSize");
170 DeclaredSpillAlignment = R->getValueAsInt("SpillAlignment");
171 }
172
173 const std::string &CodeGenRegister::getName() const {
174 return TheDef->getName();
175 }
176
177 void CodeGenTarget::ReadRegisterClasses() const {
178 std::vector<Record*> RegClasses =
179 Records.getAllDerivedDefinitions("RegisterClass");
180 if (RegClasses.empty())
181 throw std::string("No 'RegisterClass' subclasses defined!");
182
183 RegisterClasses.reserve(RegClasses.size());
184 RegisterClasses.assign(RegClasses.begin(), RegClasses.end());
185 }
186
187 std::vector<unsigned char> CodeGenTarget::getRegisterVTs(Record *R) const {
188 std::vector<unsigned char> Result;
189 const std::vector<CodeGenRegisterClass> &RCs = getRegisterClasses();
190 for (unsigned i = 0, e = RCs.size(); i != e; ++i) {
191 const CodeGenRegisterClass &RC = RegisterClasses[i];
192 for (unsigned ei = 0, ee = RC.Elements.size(); ei != ee; ++ei) {
193 if (R == RC.Elements[ei]) {
194 const std::vector<MVT::SimpleValueType> &InVTs = RC.getValueTypes();
195 for (unsigned i = 0, e = InVTs.size(); i != e; ++i)
196 Result.push_back(InVTs[i]);
197 }
198 }
199 }
200 return Result;
201 }
202
203
204 CodeGenRegisterClass::CodeGenRegisterClass(Record *R) : TheDef(R) {
205 // Rename anonymous register classes.
206 if (R->getName().size() > 9 && R->getName()[9] == '.') {
207 static unsigned AnonCounter = 0;
208 R->setName("AnonRegClass_"+utostr(AnonCounter++));
209 }
210
211 std::vector<Record*> TypeList = R->getValueAsListOfDefs("RegTypes");
212 for (unsigned i = 0, e = TypeList.size(); i != e; ++i) {
213 Record *Type = TypeList[i];
214 if (!Type->isSubClassOf("ValueType"))
215 throw "RegTypes list member '" + Type->getName() +
216 "' does not derive from the ValueType class!";
217 VTs.push_back(getValueType(Type));
218 }
219 assert(!VTs.empty() && "RegisterClass must contain at least one ValueType!");
220
221 std::vector<Record*> RegList = R->getValueAsListOfDefs("MemberList");
222 for (unsigned i = 0, e = RegList.size(); i != e; ++i) {
223 Record *Reg = RegList[i];
224 if (!Reg->isSubClassOf("Register"))
225 throw "Register Class member '" + Reg->getName() +
226 "' does not derive from the Register class!";
227 Elements.push_back(Reg);
228 }
229
230 std::vector<Record*> SubRegClassList =
231 R->getValueAsListOfDefs("SubRegClassList");
232 for (unsigned i = 0, e = SubRegClassList.size(); i != e; ++i) {
233 Record *SubRegClass = SubRegClassList[i];
234 if (!SubRegClass->isSubClassOf("RegisterClass"))
235 throw "Register Class member '" + SubRegClass->getName() +
236 "' does not derive from the RegisterClass class!";
237 SubRegClasses.push_back(SubRegClass);
238 }
239
240 // Allow targets to override the size in bits of the RegisterClass.
241 unsigned Size = R->getValueAsInt("Size");
242
243 Namespace = R->getValueAsString("Namespace");
244 SpillSize = Size ? Size : EVT(VTs[0]).getSizeInBits();
245 SpillAlignment = R->getValueAsInt("Alignment");
246 CopyCost = R->getValueAsInt("CopyCost");
247 MethodBodies = R->getValueAsCode("MethodBodies");
248 MethodProtos = R->getValueAsCode("MethodProtos");
249 }
250
251 const std::string &CodeGenRegisterClass::getName() const {
252 return TheDef->getName();
253 }
254
255 void CodeGenTarget::ReadLegalValueTypes() const {
256 const std::vector<CodeGenRegisterClass> &RCs = getRegisterClasses();
257 for (unsigned i = 0, e = RCs.size(); i != e; ++i)
258 for (unsigned ri = 0, re = RCs[i].VTs.size(); ri != re; ++ri)
259 LegalValueTypes.push_back(RCs[i].VTs[ri]);
260
261 // Remove duplicates.
262 std::sort(LegalValueTypes.begin(), LegalValueTypes.end());
263 LegalValueTypes.erase(std::unique(LegalValueTypes.begin(),
264 LegalValueTypes.end()),
265 LegalValueTypes.end());
266 }
267
268
269 void CodeGenTarget::ReadInstructions() const {
270 std::vector<Record*> Insts = Records.getAllDerivedDefinitions("Instruction");
271 if (Insts.size() <= 2)
272 throw std::string("No 'Instruction' subclasses defined!");
273
274 // Parse the instructions defined in the .td file.
275 std::string InstFormatName =
276 getAsmWriter()->getValueAsString("InstFormatName");
277
278 for (unsigned i = 0, e = Insts.size(); i != e; ++i) {
279 std::string AsmStr = Insts[i]->getValueAsString(InstFormatName);
280 Instructions.insert(std::make_pair(Insts[i]->getName(),
281 CodeGenInstruction(Insts[i], AsmStr)));
282 }
283 }
284
285 /// getInstructionsByEnumValue - Return all of the instructions defined by the
286 /// target, ordered by their enum value.
287 void CodeGenTarget::
288 getInstructionsByEnumValue(std::vector<const CodeGenInstruction*>
289 &NumberedInstructions) {
290 std::map<std::string, CodeGenInstruction>::const_iterator I;
291 I = getInstructions().find("PHI");
292 if (I == Instructions.end()) throw "Could not find 'PHI' instruction!";
293 const CodeGenInstruction *PHI = &I->second;
294
295 I = getInstructions().find("INLINEASM");
296 if (I == Instructions.end()) throw "Could not find 'INLINEASM' instruction!";
297 const CodeGenInstruction *INLINEASM = &I->second;
298
299 I = getInstructions().find("DBG_LABEL");
300 if (I == Instructions.end()) throw "Could not find 'DBG_LABEL' instruction!";
301 const CodeGenInstruction *DBG_LABEL = &I->second;
302
303 I = getInstructions().find("EH_LABEL");
304 if (I == Instructions.end()) throw "Could not find 'EH_LABEL' instruction!";
305 const CodeGenInstruction *EH_LABEL = &I->second;
306
307 I = getInstructions().find("GC_LABEL");
308 if (I == Instructions.end()) throw "Could not find 'GC_LABEL' instruction!";
309 const CodeGenInstruction *GC_LABEL = &I->second;
310
311 I = getInstructions().find("DECLARE");
312 if (I == Instructions.end()) throw "Could not find 'DECLARE' instruction!";
313 const CodeGenInstruction *DECLARE = &I->second;
314
315 I = getInstructions().find("EXTRACT_SUBREG");
316 if (I == Instructions.end())
317 throw "Could not find 'EXTRACT_SUBREG' instruction!";
318 const CodeGenInstruction *EXTRACT_SUBREG = &I->second;
319
320 I = getInstructions().find("INSERT_SUBREG");
321 if (I == Instructions.end())
322 throw "Could not find 'INSERT_SUBREG' instruction!";
323 const CodeGenInstruction *INSERT_SUBREG = &I->second;
324
325 I = getInstructions().find("IMPLICIT_DEF");
326 if (I == Instructions.end())
327 throw "Could not find 'IMPLICIT_DEF' instruction!";
328 const CodeGenInstruction *IMPLICIT_DEF = &I->second;
329
330 I = getInstructions().find("SUBREG_TO_REG");
331 if (I == Instructions.end())
332 throw "Could not find 'SUBREG_TO_REG' instruction!";
333 const CodeGenInstruction *SUBREG_TO_REG = &I->second;
334
335 I = getInstructions().find("COPY_TO_REGCLASS");
336 if (I == Instructions.end())
337 throw "Could not find 'COPY_TO_REGCLASS' instruction!";
338 const CodeGenInstruction *COPY_TO_REGCLASS = &I->second;
339
340 // Print out the rest of the instructions now.
341 NumberedInstructions.push_back(PHI);
342 NumberedInstructions.push_back(INLINEASM);
343 NumberedInstructions.push_back(DBG_LABEL);
344 NumberedInstructions.push_back(EH_LABEL);
345 NumberedInstructions.push_back(GC_LABEL);
346 NumberedInstructions.push_back(DECLARE);
347 NumberedInstructions.push_back(EXTRACT_SUBREG);
348 NumberedInstructions.push_back(INSERT_SUBREG);
349 NumberedInstructions.push_back(IMPLICIT_DEF);
350 NumberedInstructions.push_back(SUBREG_TO_REG);
351 NumberedInstructions.push_back(COPY_TO_REGCLASS);
352 for (inst_iterator II = inst_begin(), E = inst_end(); II != E; ++II)
353 if (&II->second != PHI &&
354 &II->second != INLINEASM &&
355 &II->second != DBG_LABEL &&
356 &II->second != EH_LABEL &&
357 &II->second != GC_LABEL &&
358 &II->second != DECLARE &&
359 &II->second != EXTRACT_SUBREG &&
360 &II->second != INSERT_SUBREG &&
361 &II->second != IMPLICIT_DEF &&
362 &II->second != SUBREG_TO_REG &&
363 &II->second != COPY_TO_REGCLASS)
364 NumberedInstructions.push_back(&II->second);
365 }
366
367
368 /// isLittleEndianEncoding - Return whether this target encodes its instruction
369 /// in little-endian format, i.e. bits laid out in the order [0..n]
370 ///
371 bool CodeGenTarget::isLittleEndianEncoding() const {
372 return getInstructionSet()->getValueAsBit("isLittleEndianEncoding");
373 }
374
375 //===----------------------------------------------------------------------===//
376 // ComplexPattern implementation
377 //
378 ComplexPattern::ComplexPattern(Record *R) {
379 Ty = ::getValueType(R->getValueAsDef("Ty"));
380 NumOperands = R->getValueAsInt("NumOperands");
381 SelectFunc = R->getValueAsString("SelectFunc");
382 RootNodes = R->getValueAsListOfDefs("RootNodes");
383
384 // Parse the properties.
385 Properties = 0;
386 std::vector<Record*> PropList = R->getValueAsListOfDefs("Properties");
387 for (unsigned i = 0, e = PropList.size(); i != e; ++i)
388 if (PropList[i]->getName() == "SDNPHasChain") {
389 Properties |= 1 << SDNPHasChain;
390 } else if (PropList[i]->getName() == "SDNPOptInFlag") {
391 Properties |= 1 << SDNPOptInFlag;
392 } else if (PropList[i]->getName() == "SDNPMayStore") {
393 Properties |= 1 << SDNPMayStore;
394 } else if (PropList[i]->getName() == "SDNPMayLoad") {
395 Properties |= 1 << SDNPMayLoad;
396 } else if (PropList[i]->getName() == "SDNPSideEffect") {
397 Properties |= 1 << SDNPSideEffect;
398 } else if (PropList[i]->getName() == "SDNPMemOperand") {
399 Properties |= 1 << SDNPMemOperand;
400 } else {
401 errs() << "Unsupported SD Node property '" << PropList[i]->getName()
402 << "' on ComplexPattern '" << R->getName() << "'!\n";
403 exit(1);
404 }
405
406 // Parse the attributes.
407 Attributes = 0;
408 PropList = R->getValueAsListOfDefs("Attributes");
409 for (unsigned i = 0, e = PropList.size(); i != e; ++i)
410 if (PropList[i]->getName() == "CPAttrParentAsRoot") {
411 Attributes |= 1 << CPAttrParentAsRoot;
412 } else {
413 errs() << "Unsupported pattern attribute '" << PropList[i]->getName()
414 << "' on ComplexPattern '" << R->getName() << "'!\n";
415 exit(1);
416 }
417 }
418
419 //===----------------------------------------------------------------------===//
420 // CodeGenIntrinsic Implementation
421 //===----------------------------------------------------------------------===//
422
423 std::vector<CodeGenIntrinsic> llvm::LoadIntrinsics(const RecordKeeper &RC,
424 bool TargetOnly) {
425 std::vector<Record*> I = RC.getAllDerivedDefinitions("Intrinsic");
426
427 std::vector<CodeGenIntrinsic> Result;
428
429 for (unsigned i = 0, e = I.size(); i != e; ++i) {
430 bool isTarget = I[i]->getValueAsBit("isTarget");
431 if (isTarget == TargetOnly)
432 Result.push_back(CodeGenIntrinsic(I[i]));
433 }
434 return Result;
435 }
436
437 CodeGenIntrinsic::CodeGenIntrinsic(Record *R) {
438 TheDef = R;
439 std::string DefName = R->getName();
440 ModRef = WriteMem;
441 isOverloaded = false;
442 isCommutative = false;
443
444 if (DefName.size() <= 4 ||
445 std::string(DefName.begin(), DefName.begin() + 4) != "int_")
446 throw "Intrinsic '" + DefName + "' does not start with 'int_'!";
447
448 EnumName = std::string(DefName.begin()+4, DefName.end());
449
450 if (R->getValue("GCCBuiltinName")) // Ignore a missing GCCBuiltinName field.
451 GCCBuiltinName = R->getValueAsString("GCCBuiltinName");
452
453 TargetPrefix = R->getValueAsString("TargetPrefix");
454 Name = R->getValueAsString("LLVMName");
455
456 if (Name == "") {
457 // If an explicit name isn't specified, derive one from the DefName.
458 Name = "llvm.";
459
460 for (unsigned i = 0, e = EnumName.size(); i != e; ++i)
461 Name += (EnumName[i] == '_') ? '.' : EnumName[i];
462 } else {
463 // Verify it starts with "llvm.".
464 if (Name.size() <= 5 ||
465 std::string(Name.begin(), Name.begin() + 5) != "llvm.")
466 throw "Intrinsic '" + DefName + "'s name does not start with 'llvm.'!";
467 }
468
469 // If TargetPrefix is specified, make sure that Name starts with
470 // "llvm.<targetprefix>.".
471 if (!TargetPrefix.empty()) {
472 if (Name.size() < 6+TargetPrefix.size() ||
473 std::string(Name.begin() + 5, Name.begin() + 6 + TargetPrefix.size())
474 != (TargetPrefix + "."))
475 throw "Intrinsic '" + DefName + "' does not start with 'llvm." +
476 TargetPrefix + ".'!";
477 }
478
479 // Parse the list of return types.
480 std::vector<MVT::SimpleValueType> OverloadedVTs;
481 ListInit *TypeList = R->getValueAsListInit("RetTypes");
482 for (unsigned i = 0, e = TypeList->getSize(); i != e; ++i) {
483 Record *TyEl = TypeList->getElementAsRecord(i);
484 assert(TyEl->isSubClassOf("LLVMType") && "Expected a type!");
485 MVT::SimpleValueType VT;
486 if (TyEl->isSubClassOf("LLVMMatchType")) {
487 unsigned MatchTy = TyEl->getValueAsInt("Number");
488 assert(MatchTy < OverloadedVTs.size() &&
489 "Invalid matching number!");
490 VT = OverloadedVTs[MatchTy];
491 // It only makes sense to use the extended and truncated vector element
492 // variants with iAny types; otherwise, if the intrinsic is not
493 // overloaded, all the types can be specified directly.
494 assert(((!TyEl->isSubClassOf("LLVMExtendedElementVectorType") &&
495 !TyEl->isSubClassOf("LLVMTruncatedElementVectorType")) ||
496 VT == MVT::iAny || VT == MVT::vAny) &&
497 "Expected iAny or vAny type");
498 } else {
499 VT = getValueType(TyEl->getValueAsDef("VT"));
500 }
501 if (EVT(VT).isOverloaded()) {
502 OverloadedVTs.push_back(VT);
503 isOverloaded |= true;
504 }
505 IS.RetVTs.push_back(VT);
506 IS.RetTypeDefs.push_back(TyEl);
507 }
508
509 if (IS.RetVTs.size() == 0)
510 throw "Intrinsic '"+DefName+"' needs at least a type for the ret value!";
511
512 // Parse the list of parameter types.
513 TypeList = R->getValueAsListInit("ParamTypes");
514 for (unsigned i = 0, e = TypeList->getSize(); i != e; ++i) {
515 Record *TyEl = TypeList->getElementAsRecord(i);
516 assert(TyEl->isSubClassOf("LLVMType") && "Expected a type!");
517 MVT::SimpleValueType VT;
518 if (TyEl->isSubClassOf("LLVMMatchType")) {
519 unsigned MatchTy = TyEl->getValueAsInt("Number");
520 assert(MatchTy < OverloadedVTs.size() &&
521 "Invalid matching number!");
522 VT = OverloadedVTs[MatchTy];
523 // It only makes sense to use the extended and truncated vector element
524 // variants with iAny types; otherwise, if the intrinsic is not
525 // overloaded, all the types can be specified directly.
526 assert(((!TyEl->isSubClassOf("LLVMExtendedElementVectorType") &&
527 !TyEl->isSubClassOf("LLVMTruncatedElementVectorType")) ||
528 VT == MVT::iAny || VT == MVT::vAny) &&
529 "Expected iAny or vAny type");
530 } else
531 VT = getValueType(TyEl->getValueAsDef("VT"));
532 if (EVT(VT).isOverloaded()) {
533 OverloadedVTs.push_back(VT);
534 isOverloaded |= true;
535 }
536 IS.ParamVTs.push_back(VT);
537 IS.ParamTypeDefs.push_back(TyEl);
538 }
539
540 // Parse the intrinsic properties.
541 ListInit *PropList = R->getValueAsListInit("Properties");
542 for (unsigned i = 0, e = PropList->getSize(); i != e; ++i) {
543 Record *Property = PropList->getElementAsRecord(i);
544 assert(Property->isSubClassOf("IntrinsicProperty") &&
545 "Expected a property!");
546
547 if (Property->getName() == "IntrNoMem")
548 ModRef = NoMem;
549 else if (Property->getName() == "IntrReadArgMem")
550 ModRef = ReadArgMem;
551 else if (Property->getName() == "IntrReadMem")
552 ModRef = ReadMem;
553 else if (Property->getName() == "IntrWriteArgMem")
554 ModRef = WriteArgMem;
555 else if (Property->getName() == "IntrWriteMem")
556 ModRef = WriteMem;
557 else if (Property->getName() == "Commutative")
558 isCommutative = true;
559 else if (Property->isSubClassOf("NoCapture")) {
560 unsigned ArgNo = Property->getValueAsInt("ArgNo");
561 ArgumentAttributes.push_back(std::make_pair(ArgNo, NoCapture));
562 } else
563 assert(0 && "Unknown property!");
564 }
565 }
AVR Backend for LLVM