1 //===- InstrInfoEmitter.h - Generate a Instruction Set Desc. ----*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This tablegen backend is responsible for emitting a description of the target
11 // instruction set for the code generator.
13 //===----------------------------------------------------------------------===//
15 #ifndef INSTRINFO_EMITTER_H
16 #define INSTRINFO_EMITTER_H
18 #include "TableGenBackend.h"
19 #include "CodeGenDAGPatterns.h"
28 class CodeGenInstruction
;
30 class InstrInfoEmitter
: public TableGenBackend
{
31 RecordKeeper
&Records
;
32 CodeGenDAGPatterns CDP
;
33 std::map
<std::string
, unsigned> ItinClassMap
;
36 InstrInfoEmitter(RecordKeeper
&R
) : Records(R
), CDP(R
) { }
38 // run - Output the instruction set description, returning true on failure.
39 void run(raw_ostream
&OS
);
42 typedef std::map
<std::vector
<std::string
>, unsigned> OperandInfoMapTy
;
44 void emitRecord(const CodeGenInstruction
&Inst
, unsigned Num
,
46 std::map
<std::vector
<Record
*>, unsigned> &EL
,
47 std::map
<Record
*, unsigned> &BM
,
48 const OperandInfoMapTy
&OpInfo
,
50 void emitShiftedValue(Record
*R
, StringInit
*Val
, IntInit
*Shift
,
53 // Itinerary information.
54 void GatherItinClasses();
55 unsigned getItinClassNumber(const Record
*InstRec
);
57 // Operand information.
58 void EmitOperandInfo(raw_ostream
&OS
, OperandInfoMapTy
&OperandInfoIDs
);
59 std::vector
<std::string
> GetOperandInfo(const CodeGenInstruction
&Inst
);
61 void DetectRegisterClassBarriers(std::vector
<Record
*> &Defs
,
62 const std::vector
<CodeGenRegisterClass
> &RCs
,
63 std::vector
<Record
*> &Barriers
);
66 } // End llvm namespace