lib/CodeGen/RegAllocSimple.cpp

   1 //===-- RegAllocSimple.cpp - A simple generic register allocator ----------===//
   2 //
   3 //                     The LLVM Compiler Infrastructure
   4 //
   5 // This file is distributed under the University of Illinois Open Source
   6 // License. See LICENSE.TXT for details.
   7 //
   8 //===----------------------------------------------------------------------===//
   9 //
  10 // This file implements a simple register allocator. *Very* simple: It immediate
  11 // spills every value right after it is computed, and it reloads all used
  12 // operands from the spill area to temporary registers before each instruction.
  13 // It does not keep values in registers across instructions.
  14 //
  15 //===----------------------------------------------------------------------===//
  16
  17 #define DEBUG_TYPE "regalloc"
  18 #include "llvm/CodeGen/Passes.h"
  19 #include "llvm/CodeGen/MachineFunctionPass.h"
  20 #include "llvm/CodeGen/MachineInstr.h"
  21 #include "llvm/CodeGen/MachineFrameInfo.h"
  22 #include "llvm/CodeGen/MachineRegisterInfo.h"
  23 #include "llvm/CodeGen/RegAllocRegistry.h"
  24 #include "llvm/Target/TargetInstrInfo.h"
  25 #include "llvm/Target/TargetMachine.h"
  26 #include "llvm/Support/Debug.h"
  27 #include "llvm/Support/Compiler.h"
  28 #include "llvm/ADT/Statistic.h"
  29 #include "llvm/ADT/STLExtras.h"
  30 #include <map>
  31 using namespace llvm;
  32
  33 STATISTIC(NumStores, "Number of stores added");
  34 STATISTIC(NumLoads , "Number of loads added");
  35
  36 namespace {
  37   static RegisterRegAlloc
  38     simpleRegAlloc("simple", "simple register allocator",
  39                    createSimpleRegisterAllocator);
  40
  41   class VISIBILITY_HIDDEN RegAllocSimple : public MachineFunctionPass {
  42   public:
  43     static char ID;
  44     RegAllocSimple() : MachineFunctionPass(&ID) {}
  45   private:
  46     MachineFunction *MF;
  47     const TargetMachine *TM;
  48     const TargetRegisterInfo *TRI;
  49     const TargetInstrInfo *TII;
  50
  51     // StackSlotForVirtReg - Maps SSA Regs => frame index on the stack where
  52     // these values are spilled
  53     std::map<unsigned, int> StackSlotForVirtReg;
  54
  55     // RegsUsed - Keep track of what registers are currently in use.  This is a
  56     // bitset.
  57     std::vector<bool> RegsUsed;
  58
  59     // RegClassIdx - Maps RegClass => which index we can take a register
  60     // from. Since this is a simple register allocator, when we need a register
  61     // of a certain class, we just take the next available one.
  62     std::map<const TargetRegisterClass*, unsigned> RegClassIdx;
  63
  64   public:
  65     virtual const char *getPassName() const {
  66       return "Simple Register Allocator";
  67     }
  68
  69     /// runOnMachineFunction - Register allocate the whole function
  70     bool runOnMachineFunction(MachineFunction &Fn);
  71
  72     virtual void getAnalysisUsage(AnalysisUsage &AU) const {
  73       AU.setPreservesCFG();
  74       AU.addRequiredID(PHIEliminationID);           // Eliminate PHI nodes
  75       MachineFunctionPass::getAnalysisUsage(AU);
  76     }
  77   private:
  78     /// AllocateBasicBlock - Register allocate the specified basic block.
  79     void AllocateBasicBlock(MachineBasicBlock &MBB);
  80
  81     /// getStackSpaceFor - This returns the offset of the specified virtual
  82     /// register on the stack, allocating space if necessary.
  83     int getStackSpaceFor(unsigned VirtReg, const TargetRegisterClass *RC);
  84
  85     /// Given a virtual register, return a compatible physical register that is
  86     /// currently unused.
  87     ///
  88     /// Side effect: marks that register as being used until manually cleared
  89     ///
  90     unsigned getFreeReg(unsigned virtualReg);
  91
  92     /// Moves value from memory into that register
  93     unsigned reloadVirtReg(MachineBasicBlock &MBB,
  94                            MachineBasicBlock::iterator I, unsigned VirtReg);
  95
  96     /// Saves reg value on the stack (maps virtual register to stack value)
  97     void spillVirtReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator I,
  98                       unsigned VirtReg, unsigned PhysReg);
  99   };
 100   char RegAllocSimple::ID = 0;
 101 }
 102
 103 /// getStackSpaceFor - This allocates space for the specified virtual
 104 /// register to be held on the stack.
 105 int RegAllocSimple::getStackSpaceFor(unsigned VirtReg,
 106                                      const TargetRegisterClass *RC) {
 107   // Find the location VirtReg would belong...
 108   std::map<unsigned, int>::iterator I = StackSlotForVirtReg.find(VirtReg);
 109
 110   if (I != StackSlotForVirtReg.end())
 111     return I->second;          // Already has space allocated?
 112
 113   // Allocate a new stack object for this spill location...
 114   int FrameIdx = MF->getFrameInfo()->CreateStackObject(RC->getSize(),
 115                                                        RC->getAlignment());
 116
 117   // Assign the slot...
 118   StackSlotForVirtReg.insert(I, std::make_pair(VirtReg, FrameIdx));
 119
 120   return FrameIdx;
 121 }
 122
 123 unsigned RegAllocSimple::getFreeReg(unsigned virtualReg) {
 124   const TargetRegisterClass* RC = MF->getRegInfo().getRegClass(virtualReg);
 125   TargetRegisterClass::iterator RI = RC->allocation_order_begin(*MF);
 126 #ifndef NDEBUG
 127   TargetRegisterClass::iterator RE = RC->allocation_order_end(*MF);
 128 #endif
 129
 130   while (1) {
 131     unsigned regIdx = RegClassIdx[RC]++;
 132     assert(RI+regIdx != RE && "Not enough registers!");
 133     unsigned PhysReg = *(RI+regIdx);
 134
 135     if (!RegsUsed[PhysReg]) {
 136       MF->getRegInfo().setPhysRegUsed(PhysReg);
 137       return PhysReg;
 138     }
 139   }
 140 }
 141
 142 unsigned RegAllocSimple::reloadVirtReg(MachineBasicBlock &MBB,
 143                                        MachineBasicBlock::iterator I,
 144                                        unsigned VirtReg) {
 145   const TargetRegisterClass* RC = MF->getRegInfo().getRegClass(VirtReg);
 146   int FrameIdx = getStackSpaceFor(VirtReg, RC);
 147   unsigned PhysReg = getFreeReg(VirtReg);
 148
 149   // Add move instruction(s)
 150   ++NumLoads;
 151   TII->loadRegFromStackSlot(MBB, I, PhysReg, FrameIdx, RC);
 152   return PhysReg;
 153 }
 154
 155 void RegAllocSimple::spillVirtReg(MachineBasicBlock &MBB,
 156                                   MachineBasicBlock::iterator I,
 157                                   unsigned VirtReg, unsigned PhysReg) {
 158   const TargetRegisterClass* RC = MF->getRegInfo().getRegClass(VirtReg);
 159
 160   int FrameIdx = getStackSpaceFor(VirtReg, RC);
 161
 162   // Add move instruction(s)
 163   ++NumStores;
 164   TII->storeRegToStackSlot(MBB, I, PhysReg, true, FrameIdx, RC);
 165 }
 166
 167
 168 void RegAllocSimple::AllocateBasicBlock(MachineBasicBlock &MBB) {
 169   // loop over each instruction
 170   for (MachineBasicBlock::iterator MI = MBB.begin(); MI != MBB.end(); ++MI) {
 171     // Made to combat the incorrect allocation of r2 = add r1, r1
 172     std::map<unsigned, unsigned> Virt2PhysRegMap;
 173
 174     RegsUsed.resize(TRI->getNumRegs());
 175
 176     // This is a preliminary pass that will invalidate any registers that are
 177     // used by the instruction (including implicit uses).
 178     const TargetInstrDesc &Desc = MI->getDesc();
 179     const unsigned *Regs;
 180     if (Desc.ImplicitUses) {
 181       for (Regs = Desc.ImplicitUses; *Regs; ++Regs)
 182         RegsUsed[*Regs] = true;
 183     }
 184
 185     if (Desc.ImplicitDefs) {
 186       for (Regs = Desc.ImplicitDefs; *Regs; ++Regs) {
 187         RegsUsed[*Regs] = true;
 188         MF->getRegInfo().setPhysRegUsed(*Regs);
 189       }
 190     }
 191
 192     // Loop over uses, move from memory into registers.
 193     for (int i = MI->getNumOperands() - 1; i >= 0; --i) {
 194       MachineOperand &MO = MI->getOperand(i);
 195
 196       if (MO.isReg() && MO.getReg() &&
 197           TargetRegisterInfo::isVirtualRegister(MO.getReg())) {
 198         unsigned virtualReg = (unsigned) MO.getReg();
 199         DOUT << "op: " << MO << "\n";
 200         DOUT << "\t inst[" << i << "]: ";
 201         DEBUG(MI->print(*cerr.stream(), TM));
 202
 203         // make sure the same virtual register maps to the same physical
 204         // register in any given instruction
 205         unsigned physReg = Virt2PhysRegMap[virtualReg];
 206         if (physReg == 0) {
 207           if (MO.isDef()) {
 208             unsigned TiedOp;
 209             if (!MI->isRegTiedToUseOperand(i, &TiedOp)) {
 210               physReg = getFreeReg(virtualReg);
 211             } else {
 212               // must be same register number as the source operand that is
 213               // tied to. This maps a = b + c into b = b + c, and saves b into
 214               // a's spot.
 215               assert(MI->getOperand(TiedOp).isReg()  &&
 216                      MI->getOperand(TiedOp).getReg() &&
 217                      MI->getOperand(TiedOp).isUse() &&
 218                      "Two address instruction invalid!");
 219
 220               physReg = MI->getOperand(TiedOp).getReg();
 221             }
 222             spillVirtReg(MBB, next(MI), virtualReg, physReg);
 223           } else {
 224             physReg = reloadVirtReg(MBB, MI, virtualReg);
 225             Virt2PhysRegMap[virtualReg] = physReg;
 226           }
 227         }
 228         MO.setReg(physReg);
 229         DOUT << "virt: " << virtualReg << ", phys: " << MO.getReg() << "\n";
 230       }
 231     }
 232     RegClassIdx.clear();
 233     RegsUsed.clear();
 234   }
 235 }
 236
 237
 238 /// runOnMachineFunction - Register allocate the whole function
 239 ///
 240 bool RegAllocSimple::runOnMachineFunction(MachineFunction &Fn) {
 241   DOUT << "Machine Function\n";
 242   MF = &Fn;
 243   TM = &MF->getTarget();
 244   TRI = TM->getRegisterInfo();
 245   TII = TM->getInstrInfo();
 246
 247   // Loop over all of the basic blocks, eliminating virtual register references
 248   for (MachineFunction::iterator MBB = Fn.begin(), MBBe = Fn.end();
 249        MBB != MBBe; ++MBB)
 250     AllocateBasicBlock(*MBB);
 251
 252   StackSlotForVirtReg.clear();
 253   return true;
 254 }
 255
 256 FunctionPass *llvm::createSimpleRegisterAllocator() {
 257   return new RegAllocSimple();
 258 }