lib/CodeGen/SimpleRegisterCoalescing.h

   1 //===-- SimpleRegisterCoalescing.h - Register Coalescing --------*- C++ -*-===//
   2 //
   3 //                     The LLVM Compiler Infrastructure
   4 //
   5 // This file is distributed under the University of Illinois Open Source
   6 // License. See LICENSE.TXT for details.
   7 //
   8 //===----------------------------------------------------------------------===//
   9 //
  10 // This file implements a simple register copy coalescing phase.
  11 //
  12 //===----------------------------------------------------------------------===//
  13
  14 #ifndef LLVM_CODEGEN_SIMPLE_REGISTER_COALESCING_H
  15 #define LLVM_CODEGEN_SIMPLE_REGISTER_COALESCING_H
  16
  17 #include "llvm/CodeGen/MachineFunctionPass.h"
  18 #include "llvm/CodeGen/LiveIntervalAnalysis.h"
  19 #include "llvm/CodeGen/RegisterCoalescer.h"
  20 #include "llvm/ADT/BitVector.h"
  21
  22 namespace llvm {
  23   class SimpleRegisterCoalescing;
  24   class LiveVariables;
  25   class TargetRegisterInfo;
  26   class TargetInstrInfo;
  27   class VirtRegMap;
  28   class MachineLoopInfo;
  29
  30   /// CopyRec - Representation for copy instructions in coalescer queue.
  31   ///
  32   struct CopyRec {
  33     MachineInstr *MI;
  34     unsigned LoopDepth;
  35     CopyRec(MachineInstr *mi, unsigned depth)
  36       : MI(mi), LoopDepth(depth) {};
  37   };
  38
  39   class SimpleRegisterCoalescing : public MachineFunctionPass,
  40                                    public RegisterCoalescer {
  41     MachineFunction* mf_;
  42     MachineRegisterInfo* mri_;
  43     const TargetMachine* tm_;
  44     const TargetRegisterInfo* tri_;
  45     const TargetInstrInfo* tii_;
  46     LiveIntervals *li_;
  47     const MachineLoopInfo* loopInfo;
  48
  49     BitVector allocatableRegs_;
  50     DenseMap<const TargetRegisterClass*, BitVector> allocatableRCRegs_;
  51
  52     /// JoinedCopies - Keep track of copies eliminated due to coalescing.
  53     ///
  54     SmallPtrSet<MachineInstr*, 32> JoinedCopies;
  55
  56     /// ReMatCopies - Keep track of copies eliminated due to remat.
  57     ///
  58     SmallPtrSet<MachineInstr*, 32> ReMatCopies;
  59
  60     /// ReMatDefs - Keep track of definition instructions which have
  61     /// been remat'ed.
  62     SmallPtrSet<MachineInstr*, 8> ReMatDefs;
  63
  64   public:
  65     static char ID; // Pass identifcation, replacement for typeid
  66     SimpleRegisterCoalescing() : MachineFunctionPass(&ID) {}
  67
  68     struct InstrSlots {
  69       enum {
  70         LOAD  = 0,
  71         USE   = 1,
  72         DEF   = 2,
  73         STORE = 3,
  74         NUM   = 4
  75       };
  76     };
  77
  78     virtual void getAnalysisUsage(AnalysisUsage &AU) const;
  79     virtual void releaseMemory();
  80
  81     /// runOnMachineFunction - pass entry point
  82     virtual bool runOnMachineFunction(MachineFunction&);
  83
  84     bool coalesceFunction(MachineFunction &mf, RegallocQuery &) {
  85       // This runs as an independent pass, so don't do anything.
  86       return false;
  87     };
  88
  89     /// print - Implement the dump method.
  90     virtual void print(raw_ostream &O, const Module* = 0) const;
  91
  92   private:
  93     /// joinIntervals - join compatible live intervals
  94     void joinIntervals();
  95
  96     /// CopyCoalesceInMBB - Coalesce copies in the specified MBB, putting
  97     /// copies that cannot yet be coalesced into the "TryAgain" list.
  98     void CopyCoalesceInMBB(MachineBasicBlock *MBB,
  99                            std::vector<CopyRec> &TryAgain);
 100
 101     /// JoinCopy - Attempt to join intervals corresponding to SrcReg/DstReg,
 102     /// which are the src/dst of the copy instruction CopyMI.  This returns true
 103     /// if the copy was successfully coalesced away. If it is not currently
 104     /// possible to coalesce this interval, but it may be possible if other
 105     /// things get coalesced, then it returns true by reference in 'Again'.
 106     bool JoinCopy(CopyRec &TheCopy, bool &Again);
 107
 108     /// JoinIntervals - Attempt to join these two intervals.  On failure, this
 109     /// returns false.  Otherwise, if one of the intervals being joined is a
 110     /// physreg, this method always canonicalizes DestInt to be it.  The output
 111     /// "SrcInt" will not have been modified, so we can use this information
 112     /// below to update aliases.
 113     bool JoinIntervals(LiveInterval &LHS, LiveInterval &RHS, bool &Swapped);
 114
 115     /// SimpleJoin - Attempt to join the specified interval into this one. The
 116     /// caller of this method must guarantee that the RHS only contains a single
 117     /// value number and that the RHS is not defined by a copy from this
 118     /// interval.  This returns false if the intervals are not joinable, or it
 119     /// joins them and returns true.
 120     bool SimpleJoin(LiveInterval &LHS, LiveInterval &RHS);
 121
 122     /// Return true if the two specified registers belong to different register
 123     /// classes.  The registers may be either phys or virt regs.
 124     bool differingRegisterClasses(unsigned RegA, unsigned RegB) const;
 125
 126
 127     /// AdjustCopiesBackFrom - We found a non-trivially-coalescable copy. If
 128     /// the source value number is defined by a copy from the destination reg
 129     /// see if we can merge these two destination reg valno# into a single
 130     /// value number, eliminating a copy.
 131     bool AdjustCopiesBackFrom(LiveInterval &IntA, LiveInterval &IntB,
 132                               MachineInstr *CopyMI);
 133
 134     /// HasOtherReachingDefs - Return true if there are definitions of IntB
 135     /// other than BValNo val# that can reach uses of AValno val# of IntA.
 136     bool HasOtherReachingDefs(LiveInterval &IntA, LiveInterval &IntB,
 137                               VNInfo *AValNo, VNInfo *BValNo);
 138
 139     /// RemoveCopyByCommutingDef - We found a non-trivially-coalescable copy.
 140     /// If the source value number is defined by a commutable instruction and
 141     /// its other operand is coalesced to the copy dest register, see if we
 142     /// can transform the copy into a noop by commuting the definition.
 143     bool RemoveCopyByCommutingDef(LiveInterval &IntA, LiveInterval &IntB,
 144                                   MachineInstr *CopyMI);
 145
 146     /// TrimLiveIntervalToLastUse - If there is a last use in the same basic
 147     /// block as the copy instruction, trim the ive interval to the last use
 148     /// and return true.
 149     bool TrimLiveIntervalToLastUse(MachineInstrIndex CopyIdx,
 150                                    MachineBasicBlock *CopyMBB,
 151                                    LiveInterval &li, const LiveRange *LR);
 152
 153     /// ReMaterializeTrivialDef - If the source of a copy is defined by a trivial
 154     /// computation, replace the copy by rematerialize the definition.
 155     bool ReMaterializeTrivialDef(LiveInterval &SrcInt, unsigned DstReg,
 156                                  unsigned DstSubIdx, MachineInstr *CopyMI);
 157
 158     /// CanCoalesceWithImpDef - Returns true if the specified copy instruction
 159     /// from an implicit def to another register can be coalesced away.
 160     bool CanCoalesceWithImpDef(MachineInstr *CopyMI,
 161                                LiveInterval &li, LiveInterval &ImpLi) const;
 162
 163     /// TurnCopiesFromValNoToImpDefs - The specified value# is defined by an
 164     /// implicit_def and it is being removed. Turn all copies from this value#
 165     /// into implicit_defs.
 166     void TurnCopiesFromValNoToImpDefs(LiveInterval &li, VNInfo *VNI);
 167
 168     /// isWinToJoinVRWithSrcPhysReg - Return true if it's worth while to join a
 169     /// a virtual destination register with physical source register.
 170     bool isWinToJoinVRWithSrcPhysReg(MachineInstr *CopyMI,
 171                                     MachineBasicBlock *CopyMBB,
 172                                     LiveInterval &DstInt, LiveInterval &SrcInt);
 173
 174     /// isWinToJoinVRWithDstPhysReg - Return true if it's worth while to join a
 175     /// copy from a virtual source register to a physical destination register.
 176     bool isWinToJoinVRWithDstPhysReg(MachineInstr *CopyMI,
 177                                     MachineBasicBlock *CopyMBB,
 178                                     LiveInterval &DstInt, LiveInterval &SrcInt);
 179
 180     /// isWinToJoinCrossClass - Return true if it's profitable to coalesce
 181     /// two virtual registers from different register classes.
 182     bool isWinToJoinCrossClass(unsigned LargeReg, unsigned SmallReg,
 183                                unsigned Threshold);
 184
 185     /// HasIncompatibleSubRegDefUse - If we are trying to coalesce a virtual
 186     /// register with a physical register, check if any of the virtual register
 187     /// operand is a sub-register use or def. If so, make sure it won't result
 188     /// in an illegal extract_subreg or insert_subreg instruction.
 189     bool HasIncompatibleSubRegDefUse(MachineInstr *CopyMI,
 190                                      unsigned VirtReg, unsigned PhysReg);
 191
 192     /// CanJoinExtractSubRegToPhysReg - Return true if it's possible to coalesce
 193     /// an extract_subreg where dst is a physical register, e.g.
 194     /// cl = EXTRACT_SUBREG reg1024, 1
 195     bool CanJoinExtractSubRegToPhysReg(unsigned DstReg, unsigned SrcReg,
 196                                        unsigned SubIdx, unsigned &RealDstReg);
 197
 198     /// CanJoinInsertSubRegToPhysReg - Return true if it's possible to coalesce
 199     /// an insert_subreg where src is a physical register, e.g.
 200     /// reg1024 = INSERT_SUBREG reg1024, c1, 0
 201     bool CanJoinInsertSubRegToPhysReg(unsigned DstReg, unsigned SrcReg,
 202                                       unsigned SubIdx, unsigned &RealDstReg);
 203
 204     /// RangeIsDefinedByCopyFromReg - Return true if the specified live range of
 205     /// the specified live interval is defined by a copy from the specified
 206     /// register.
 207     bool RangeIsDefinedByCopyFromReg(LiveInterval &li, LiveRange *LR,
 208                                      unsigned Reg);
 209
 210     /// UpdateRegDefsUses - Replace all defs and uses of SrcReg to DstReg and
 211     /// update the subregister number if it is not zero. If DstReg is a
 212     /// physical register and the existing subregister number of the def / use
 213     /// being updated is not zero, make sure to set it to the correct physical
 214     /// subregister.
 215     void UpdateRegDefsUses(unsigned SrcReg, unsigned DstReg, unsigned SubIdx);
 216
 217     /// RemoveUnnecessaryKills - Remove kill markers that are no longer accurate
 218     /// due to live range lengthening as the result of coalescing.
 219     void RemoveUnnecessaryKills(unsigned Reg, LiveInterval &LI);
 220
 221     /// ShortenDeadCopyLiveRange - Shorten a live range defined by a dead copy.
 222     /// Return true if live interval is removed.
 223     bool ShortenDeadCopyLiveRange(LiveInterval &li, MachineInstr *CopyMI);
 224
 225     /// ShortenDeadCopyLiveRange - Shorten a live range as it's artificially
 226     /// extended by a dead copy. Mark the last use (if any) of the val# as kill
 227     /// as ends the live range there. If there isn't another use, then this
 228     /// live range is dead. Return true if live interval is removed.
 229     bool ShortenDeadCopySrcLiveRange(LiveInterval &li, MachineInstr *CopyMI);
 230
 231     /// RemoveDeadDef - If a def of a live interval is now determined dead,
 232     /// remove the val# it defines. If the live interval becomes empty, remove
 233     /// it as well.
 234     bool RemoveDeadDef(LiveInterval &li, MachineInstr *DefMI);
 235
 236     /// lastRegisterUse - Returns the last use of the specific register between
 237     /// cycles Start and End or NULL if there are no uses.
 238     MachineOperand *lastRegisterUse(MachineInstrIndex Start, MachineInstrIndex End,
 239                                     unsigned Reg, MachineInstrIndex &LastUseIdx) const;
 240
 241     void printRegName(unsigned reg) const;
 242
 243     /// Returns true if the given live interval is zero length.
 244     bool isZeroLengthInterval(LiveInterval *li) const;
 245   };
 246
 247 } // End llvm namespace
 248
 249 #endif