It's not legal to fold a load from a narrower stack slot into a wider instruction...
[llvm/avr.git] / lib / CodeGen / CMakeLists.txt
blob7eae5202490f45ad9d508a41188e45d38c0c812e
1 add_llvm_library(LLVMCodeGen
2   BranchFolding.cpp
3   CodePlacementOpt.cpp
4   DeadMachineInstructionElim.cpp
5   DwarfEHPrepare.cpp
6   ELFCodeEmitter.cpp
7   ELFWriter.cpp
8   ExactHazardRecognizer.cpp
9   GCMetadata.cpp
10   GCMetadataPrinter.cpp
11   GCStrategy.cpp
12   IfConversion.cpp
13   IntrinsicLowering.cpp
14   LLVMTargetMachine.cpp
15   LatencyPriorityQueue.cpp
16   LazyLiveness.cpp
17   LiveInterval.cpp
18   LiveIntervalAnalysis.cpp
19   LiveStackAnalysis.cpp
20   LiveVariables.cpp
21   LowerSubregs.cpp
22   MachOCodeEmitter.cpp
23   MachOWriter.cpp
24   MachineBasicBlock.cpp
25   MachineDominators.cpp
26   MachineFunction.cpp
27   MachineFunctionAnalysis.cpp
28   MachineFunctionPass.cpp
29   MachineInstr.cpp
30   MachineLICM.cpp
31   MachineLoopInfo.cpp
32   MachineModuleInfo.cpp
33   MachinePassRegistry.cpp
34   MachineRegisterInfo.cpp
35   MachineSink.cpp
36   MachineVerifier.cpp
37   ObjectCodeEmitter.cpp
38   OcamlGC.cpp
39   PHIElimination.cpp
40   Passes.cpp
41   PostRASchedulerList.cpp
42   PreAllocSplitting.cpp
43   PrologEpilogInserter.cpp
44   PseudoSourceValue.cpp
45   RegAllocLinearScan.cpp
46   RegAllocLocal.cpp
47   RegAllocPBQP.cpp
48   RegAllocSimple.cpp
49   RegisterCoalescer.cpp
50   RegisterScavenging.cpp
51   ScheduleDAG.cpp
52   ScheduleDAGEmit.cpp
53   ScheduleDAGInstrs.cpp
54   ScheduleDAGPrinter.cpp
55   ShadowStackGC.cpp
56   ShrinkWrapping.cpp
57   SimpleRegisterCoalescing.cpp
58   SjLjEHPrepare.cpp
59   Spiller.cpp
60   StackProtector.cpp
61   StackSlotColoring.cpp
62   StrongPHIElimination.cpp
63   TargetInstrInfoImpl.cpp
64   TwoAddressInstructionPass.cpp
65   UnreachableBlockElim.cpp
66   VirtRegMap.cpp
67   VirtRegRewriter.cpp
68   )
70 target_link_libraries (LLVMCodeGen LLVMCore LLVMScalarOpts)