It's not legal to fold a load from a narrower stack slot into a wider instruction...
[llvm/avr.git] / lib / CodeGen / RegAllocSimple.cpp
blob5abeb7c1b879934090947b09656f04cf38ad5ac4
1 //===-- RegAllocSimple.cpp - A simple generic register allocator ----------===//
2 //
3 // The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // This file implements a simple register allocator. *Very* simple: It immediate
11 // spills every value right after it is computed, and it reloads all used
12 // operands from the spill area to temporary registers before each instruction.
13 // It does not keep values in registers across instructions.
15 //===----------------------------------------------------------------------===//
17 #define DEBUG_TYPE "regalloc"
18 #include "llvm/CodeGen/Passes.h"
19 #include "llvm/CodeGen/MachineFunctionPass.h"
20 #include "llvm/CodeGen/MachineInstr.h"
21 #include "llvm/CodeGen/MachineFrameInfo.h"
22 #include "llvm/CodeGen/MachineRegisterInfo.h"
23 #include "llvm/CodeGen/RegAllocRegistry.h"
24 #include "llvm/Target/TargetInstrInfo.h"
25 #include "llvm/Target/TargetMachine.h"
26 #include "llvm/Support/Compiler.h"
27 #include "llvm/Support/Debug.h"
28 #include "llvm/Support/raw_ostream.h"
29 #include "llvm/ADT/Statistic.h"
30 #include "llvm/ADT/STLExtras.h"
31 #include <map>
32 using namespace llvm;
34 STATISTIC(NumStores, "Number of stores added");
35 STATISTIC(NumLoads , "Number of loads added");
37 namespace {
38 static RegisterRegAlloc
39 simpleRegAlloc("simple", "simple register allocator",
40 createSimpleRegisterAllocator);
42 class VISIBILITY_HIDDEN RegAllocSimple : public MachineFunctionPass {
43 public:
44 static char ID;
45 RegAllocSimple() : MachineFunctionPass(&ID) {}
46 private:
47 MachineFunction *MF;
48 const TargetMachine *TM;
49 const TargetRegisterInfo *TRI;
50 const TargetInstrInfo *TII;
52 // StackSlotForVirtReg - Maps SSA Regs => frame index on the stack where
53 // these values are spilled
54 std::map<unsigned, int> StackSlotForVirtReg;
56 // RegsUsed - Keep track of what registers are currently in use. This is a
57 // bitset.
58 std::vector<bool> RegsUsed;
60 // RegClassIdx - Maps RegClass => which index we can take a register
61 // from. Since this is a simple register allocator, when we need a register
62 // of a certain class, we just take the next available one.
63 std::map<const TargetRegisterClass*, unsigned> RegClassIdx;
65 public:
66 virtual const char *getPassName() const {
67 return "Simple Register Allocator";
70 /// runOnMachineFunction - Register allocate the whole function
71 bool runOnMachineFunction(MachineFunction &Fn);
73 virtual void getAnalysisUsage(AnalysisUsage &AU) const {
74 AU.setPreservesCFG();
75 AU.addRequiredID(PHIEliminationID); // Eliminate PHI nodes
76 MachineFunctionPass::getAnalysisUsage(AU);
78 private:
79 /// AllocateBasicBlock - Register allocate the specified basic block.
80 void AllocateBasicBlock(MachineBasicBlock &MBB);
82 /// getStackSpaceFor - This returns the offset of the specified virtual
83 /// register on the stack, allocating space if necessary.
84 int getStackSpaceFor(unsigned VirtReg, const TargetRegisterClass *RC);
86 /// Given a virtual register, return a compatible physical register that is
87 /// currently unused.
88 ///
89 /// Side effect: marks that register as being used until manually cleared
90 ///
91 unsigned getFreeReg(unsigned virtualReg);
93 /// Moves value from memory into that register
94 unsigned reloadVirtReg(MachineBasicBlock &MBB,
95 MachineBasicBlock::iterator I, unsigned VirtReg);
97 /// Saves reg value on the stack (maps virtual register to stack value)
98 void spillVirtReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator I,
99 unsigned VirtReg, unsigned PhysReg);
101 char RegAllocSimple::ID = 0;
104 /// getStackSpaceFor - This allocates space for the specified virtual
105 /// register to be held on the stack.
106 int RegAllocSimple::getStackSpaceFor(unsigned VirtReg,
107 const TargetRegisterClass *RC) {
108 // Find the location VirtReg would belong...
109 std::map<unsigned, int>::iterator I = StackSlotForVirtReg.find(VirtReg);
111 if (I != StackSlotForVirtReg.end())
112 return I->second; // Already has space allocated?
114 // Allocate a new stack object for this spill location...
115 int FrameIdx = MF->getFrameInfo()->CreateStackObject(RC->getSize(),
116 RC->getAlignment());
118 // Assign the slot...
119 StackSlotForVirtReg.insert(I, std::make_pair(VirtReg, FrameIdx));
121 return FrameIdx;
124 unsigned RegAllocSimple::getFreeReg(unsigned virtualReg) {
125 const TargetRegisterClass* RC = MF->getRegInfo().getRegClass(virtualReg);
126 TargetRegisterClass::iterator RI = RC->allocation_order_begin(*MF);
127 #ifndef NDEBUG
128 TargetRegisterClass::iterator RE = RC->allocation_order_end(*MF);
129 #endif
131 while (1) {
132 unsigned regIdx = RegClassIdx[RC]++;
133 assert(RI+regIdx != RE && "Not enough registers!");
134 unsigned PhysReg = *(RI+regIdx);
136 if (!RegsUsed[PhysReg]) {
137 MF->getRegInfo().setPhysRegUsed(PhysReg);
138 return PhysReg;
143 unsigned RegAllocSimple::reloadVirtReg(MachineBasicBlock &MBB,
144 MachineBasicBlock::iterator I,
145 unsigned VirtReg) {
146 const TargetRegisterClass* RC = MF->getRegInfo().getRegClass(VirtReg);
147 int FrameIdx = getStackSpaceFor(VirtReg, RC);
148 unsigned PhysReg = getFreeReg(VirtReg);
150 // Add move instruction(s)
151 ++NumLoads;
152 TII->loadRegFromStackSlot(MBB, I, PhysReg, FrameIdx, RC);
153 return PhysReg;
156 void RegAllocSimple::spillVirtReg(MachineBasicBlock &MBB,
157 MachineBasicBlock::iterator I,
158 unsigned VirtReg, unsigned PhysReg) {
159 const TargetRegisterClass* RC = MF->getRegInfo().getRegClass(VirtReg);
161 int FrameIdx = getStackSpaceFor(VirtReg, RC);
163 // Add move instruction(s)
164 ++NumStores;
165 TII->storeRegToStackSlot(MBB, I, PhysReg, true, FrameIdx, RC);
169 void RegAllocSimple::AllocateBasicBlock(MachineBasicBlock &MBB) {
170 // loop over each instruction
171 for (MachineBasicBlock::iterator MI = MBB.begin(); MI != MBB.end(); ++MI) {
172 // Made to combat the incorrect allocation of r2 = add r1, r1
173 std::map<unsigned, unsigned> Virt2PhysRegMap;
175 RegsUsed.resize(TRI->getNumRegs());
177 // This is a preliminary pass that will invalidate any registers that are
178 // used by the instruction (including implicit uses).
179 const TargetInstrDesc &Desc = MI->getDesc();
180 const unsigned *Regs;
181 if (Desc.ImplicitUses) {
182 for (Regs = Desc.ImplicitUses; *Regs; ++Regs)
183 RegsUsed[*Regs] = true;
186 if (Desc.ImplicitDefs) {
187 for (Regs = Desc.ImplicitDefs; *Regs; ++Regs) {
188 RegsUsed[*Regs] = true;
189 MF->getRegInfo().setPhysRegUsed(*Regs);
193 // Loop over uses, move from memory into registers.
194 for (int i = MI->getNumOperands() - 1; i >= 0; --i) {
195 MachineOperand &MO = MI->getOperand(i);
197 if (MO.isReg() && MO.getReg() &&
198 TargetRegisterInfo::isVirtualRegister(MO.getReg())) {
199 unsigned virtualReg = (unsigned) MO.getReg();
200 DEBUG({
201 errs() << "op: " << MO << "\n" << "\t inst[" << i << "]: ";
202 MI->print(errs(), TM);
205 // make sure the same virtual register maps to the same physical
206 // register in any given instruction
207 unsigned physReg = Virt2PhysRegMap[virtualReg];
208 if (physReg == 0) {
209 if (MO.isDef()) {
210 unsigned TiedOp;
211 if (!MI->isRegTiedToUseOperand(i, &TiedOp)) {
212 physReg = getFreeReg(virtualReg);
213 } else {
214 // must be same register number as the source operand that is
215 // tied to. This maps a = b + c into b = b + c, and saves b into
216 // a's spot.
217 assert(MI->getOperand(TiedOp).isReg() &&
218 MI->getOperand(TiedOp).getReg() &&
219 MI->getOperand(TiedOp).isUse() &&
220 "Two address instruction invalid!");
222 physReg = MI->getOperand(TiedOp).getReg();
224 spillVirtReg(MBB, next(MI), virtualReg, physReg);
225 } else {
226 physReg = reloadVirtReg(MBB, MI, virtualReg);
227 Virt2PhysRegMap[virtualReg] = physReg;
230 MO.setReg(physReg);
231 DEBUG(errs() << "virt: " << virtualReg
232 << ", phys: " << MO.getReg() << "\n");
235 RegClassIdx.clear();
236 RegsUsed.clear();
241 /// runOnMachineFunction - Register allocate the whole function
243 bool RegAllocSimple::runOnMachineFunction(MachineFunction &Fn) {
244 DEBUG(errs() << "Machine Function\n");
245 MF = &Fn;
246 TM = &MF->getTarget();
247 TRI = TM->getRegisterInfo();
248 TII = TM->getInstrInfo();
250 // Loop over all of the basic blocks, eliminating virtual register references
251 for (MachineFunction::iterator MBB = Fn.begin(), MBBe = Fn.end();
252 MBB != MBBe; ++MBB)
253 AllocateBasicBlock(*MBB);
255 StackSlotForVirtReg.clear();
256 return true;
259 FunctionPass *llvm::createSimpleRegisterAllocator() {
260 return new RegAllocSimple();