1 ; RUN: llc < %s -mtriple=thumbv7-elf -mattr=+neon | FileCheck %s
4 %bar = type { float, float, float }
5 %baz = type { i32, [16 x %bar], [16 x float], [16 x i32], i8 }
6 %foo = type { <4 x float> }
7 %quux = type { i32 (...)**, %baz*, i32 }
8 %quuz = type { %quux, i32, %bar, [128 x i8], [16 x %foo], %foo, %foo, %foo }
10 declare <4 x float> @llvm.arm.neon.vld1.v4f32(i8*) nounwind readonly
12 define arm_apcscc void @aaa(%quuz* %this, i8* %block) {
17 %0 = call <4 x float> @llvm.arm.neon.vld1.v4f32(i8* undef) nounwind ; <<4 x float>> [#uses=1]
18 store float 6.300000e+01, float* undef, align 4
19 %1 = call <4 x float> @llvm.arm.neon.vld1.v4f32(i8* undef) nounwind ; <<4 x float>> [#uses=1]
20 store float 0.000000e+00, float* undef, align 4
21 %2 = call <4 x float> @llvm.arm.neon.vld1.v4f32(i8* undef) nounwind ; <<4 x float>> [#uses=1]
22 %val173 = load <4 x float>* undef ; <<4 x float>> [#uses=1]
25 bb4: ; preds = %bb193, %entry
26 %besterror.0.2264 = phi <4 x float> [ undef, %entry ], [ %besterror.0.0, %bb193 ] ; <<4 x float>> [#uses=2]
27 %part0.0.0261 = phi <4 x float> [ zeroinitializer, %entry ], [ %23, %bb193 ] ; <<4 x float>> [#uses=2]
28 %3 = fmul <4 x float> zeroinitializer, %0 ; <<4 x float>> [#uses=2]
29 %4 = fadd <4 x float> %3, %part0.0.0261 ; <<4 x float>> [#uses=1]
30 %5 = shufflevector <4 x float> %3, <4 x float> undef, <2 x i32> <i32 2, i32 3> ; <<2 x float>> [#uses=1]
31 %6 = shufflevector <2 x float> %5, <2 x float> undef, <4 x i32> <i32 1, i32 1, i32 1, i32 1> ; <<4 x float>> [#uses=1]
32 %7 = fmul <4 x float> %1, undef ; <<4 x float>> [#uses=1]
33 %8 = fadd <4 x float> %7, <float 5.000000e-01, float 5.000000e-01, float 5.000000e-01, float 5.000000e-01> ; <<4 x float>> [#uses=1]
34 %9 = fptosi <4 x float> %8 to <4 x i32> ; <<4 x i32>> [#uses=1]
35 %10 = sitofp <4 x i32> %9 to <4 x float> ; <<4 x float>> [#uses=1]
36 %11 = fmul <4 x float> %10, %2 ; <<4 x float>> [#uses=1]
37 %12 = fmul <4 x float> undef, %6 ; <<4 x float>> [#uses=1]
38 %13 = fmul <4 x float> %11, %4 ; <<4 x float>> [#uses=1]
39 %14 = fsub <4 x float> %12, %13 ; <<4 x float>> [#uses=1]
40 %15 = fsub <4 x float> %14, undef ; <<4 x float>> [#uses=1]
41 %16 = fmul <4 x float> %15, <float 2.000000e+00, float 2.000000e+00, float 2.000000e+00, float 2.000000e+00> ; <<4 x float>> [#uses=1]
42 %17 = fadd <4 x float> %16, undef ; <<4 x float>> [#uses=1]
43 %18 = fmul <4 x float> %17, %val173 ; <<4 x float>> [#uses=1]
44 %19 = shufflevector <4 x float> %18, <4 x float> undef, <2 x i32> <i32 2, i32 3> ; <<2 x float>> [#uses=1]
45 %20 = shufflevector <2 x float> %19, <2 x float> undef, <4 x i32> zeroinitializer ; <<4 x float>> [#uses=1]
46 %21 = fadd <4 x float> zeroinitializer, %20 ; <<4 x float>> [#uses=2]
47 %22 = fcmp ogt <4 x float> %besterror.0.2264, %21 ; <<4 x i1>> [#uses=0]
48 br i1 undef, label %bb193, label %bb186
53 bb193: ; preds = %bb186, %bb4
54 %besterror.0.0 = phi <4 x float> [ %21, %bb186 ], [ %besterror.0.2264, %bb4 ] ; <<4 x float>> [#uses=1]
55 %23 = fadd <4 x float> %part0.0.0261, zeroinitializer ; <<4 x float>> [#uses=1]