pass machinemoduleinfo down into getSymbolForDwarfGlobalReference,
[llvm/avr.git] / lib / Target / CellSPU / SPURegisterInfo.h
blob0d3bbbe805be5af92fee5f956dbf30c45122a827
1 //===- SPURegisterInfo.h - Cell SPU Register Information Impl ----*- C++ -*-==//
2 //
3 // The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // This file contains the Cell SPU implementation of the TargetRegisterInfo
11 // class.
13 //===----------------------------------------------------------------------===//
15 #ifndef SPU_REGISTERINFO_H
16 #define SPU_REGISTERINFO_H
18 #include "SPU.h"
19 #include "SPUGenRegisterInfo.h.inc"
21 namespace llvm {
22 class SPUSubtarget;
23 class TargetInstrInfo;
24 class Type;
26 class SPURegisterInfo : public SPUGenRegisterInfo {
27 private:
28 const SPUSubtarget &Subtarget;
29 const TargetInstrInfo &TII;
31 //! Predicate: Does the machine function use the link register?
32 bool usesLR(MachineFunction &MF) const;
34 public:
35 SPURegisterInfo(const SPUSubtarget &subtarget, const TargetInstrInfo &tii);
37 //! Translate a register's enum value to a register number
38 /*!
39 This method translates a register's enum value to it's regiser number,
40 e.g. SPU::R14 -> 14.
42 static unsigned getRegisterNumbering(unsigned RegEnum);
44 /// getPointerRegClass - Return the register class to use to hold pointers.
45 /// This is used for addressing modes.
46 virtual const TargetRegisterClass *
47 getPointerRegClass(unsigned Kind = 0) const;
49 //! Return the array of callee-saved registers
50 virtual const unsigned* getCalleeSavedRegs(const MachineFunction *MF) const;
52 //! Return the register class array of the callee-saved registers
53 virtual const TargetRegisterClass* const *
54 getCalleeSavedRegClasses(const MachineFunction *MF) const;
56 //! Return the reserved registers
57 BitVector getReservedRegs(const MachineFunction &MF) const;
59 //! Prediate: Target has dedicated frame pointer
60 bool hasFP(const MachineFunction &MF) const;
61 //! Eliminate the call frame setup pseudo-instructions
62 void eliminateCallFramePseudoInstr(MachineFunction &MF,
63 MachineBasicBlock &MBB,
64 MachineBasicBlock::iterator I) const;
65 //! Convert frame indicies into machine operands
66 void eliminateFrameIndex(MachineBasicBlock::iterator II, int,
67 RegScavenger *RS) const;
68 //! Determine the frame's layour
69 void determineFrameLayout(MachineFunction &MF) const;
71 void processFunctionBeforeCalleeSavedScan(MachineFunction &MF,
72 RegScavenger *RS = NULL) const;
73 //! Emit the function prologue
74 void emitPrologue(MachineFunction &MF) const;
75 //! Emit the function epilogue
76 void emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const;
77 //! Get return address register (LR, aka R0)
78 unsigned getRARegister() const;
79 //! Get the stack frame register (SP, aka R1)
80 unsigned getFrameRegister(MachineFunction &MF) const;
81 //! Perform target-specific stack frame setup.
82 void getInitialFrameState(std::vector<MachineMove> &Moves) const;
84 //------------------------------------------------------------------------
85 // New methods added:
86 //------------------------------------------------------------------------
88 //! Return the array of argument passing registers
89 /*!
90 \note The size of this array is returned by getArgRegsSize().
92 static const unsigned *getArgRegs();
94 //! Return the size of the argument passing register array
95 static unsigned getNumArgRegs();
97 //! Get DWARF debugging register number
98 int getDwarfRegNum(unsigned RegNum, bool isEH) const;
100 } // end namespace llvm
102 #endif