lib/Target/Mips/MipsISelLowering.h

   1 //===-- MipsISelLowering.h - Mips DAG Lowering Interface --------*- C++ -*-===//
   2 //
   3 //                     The LLVM Compiler Infrastructure
   4 //
   5 // This file is distributed under the University of Illinois Open Source
   6 // License. See LICENSE.TXT for details.
   7 //
   8 //===----------------------------------------------------------------------===//
   9 //
  10 // This file defines the interfaces that Mips uses to lower LLVM code into a
  11 // selection DAG.
  12 //
  13 //===----------------------------------------------------------------------===//
  14
  15 #ifndef MipsISELLOWERING_H
  16 #define MipsISELLOWERING_H
  17
  18 #include "llvm/CodeGen/SelectionDAG.h"
  19 #include "llvm/Target/TargetLowering.h"
  20 #include "Mips.h"
  21 #include "MipsSubtarget.h"
  22
  23 namespace llvm {
  24   namespace MipsISD {
  25     enum NodeType {
  26       // Start the numbering from where ISD NodeType finishes.
  27       FIRST_NUMBER = ISD::BUILTIN_OP_END,
  28
  29       // Jump and link (call)
  30       JmpLink,
  31
  32       // Get the Higher 16 bits from a 32-bit immediate
  33       // No relation with Mips Hi register
  34       Hi,
  35
  36       // Get the Lower 16 bits from a 32-bit immediate
  37       // No relation with Mips Lo register
  38       Lo,
  39
  40       // Handle gp_rel (small data/bss sections) relocation.
  41       GPRel,
  42
  43       // Conditional Move
  44       CMov,
  45
  46       // Select CC Pseudo Instruction
  47       SelectCC,
  48
  49       // Floating Point Select CC Pseudo Instruction
  50       FPSelectCC,
  51
  52       // Floating Point Branch Conditional
  53       FPBrcond,
  54
  55       // Floating Point Compare
  56       FPCmp,
  57
  58       // Floating Point Rounding
  59       FPRound,
  60
  61       // Return
  62       Ret
  63     };
  64   }
  65
  66   //===--------------------------------------------------------------------===//
  67   // TargetLowering Implementation
  68   //===--------------------------------------------------------------------===//
  69
  70   class MipsTargetLowering : public TargetLowering  {
  71   public:
  72
  73     explicit MipsTargetLowering(MipsTargetMachine &TM);
  74
  75     /// LowerOperation - Provide custom lowering hooks for some operations.
  76     virtual SDValue LowerOperation(SDValue Op, SelectionDAG &DAG);
  77
  78     /// getTargetNodeName - This method returns the name of a target specific
  79     //  DAG node.
  80     virtual const char *getTargetNodeName(unsigned Opcode) const;
  81
  82     /// getSetCCResultType - get the ISD::SETCC result ValueType
  83     MVT::SimpleValueType getSetCCResultType(EVT VT) const;
  84
  85     /// getFunctionAlignment - Return the Log2 alignment of this function.
  86     virtual unsigned getFunctionAlignment(const Function *F) const;
  87   private:
  88     // Subtarget Info
  89     const MipsSubtarget *Subtarget;
  90
  91
  92     // Lower Operand helpers
  93     SDValue LowerCallResult(SDValue Chain, SDValue InFlag,
  94                             CallingConv::ID CallConv, bool isVarArg,
  95                             const SmallVectorImpl<ISD::InputArg> &Ins,
  96                             DebugLoc dl, SelectionDAG &DAG,
  97                             SmallVectorImpl<SDValue> &InVals);
  98
  99     // Lower Operand specifics
 100     SDValue LowerANDOR(SDValue Op, SelectionDAG &DAG);
 101     SDValue LowerBRCOND(SDValue Op, SelectionDAG &DAG);
 102     SDValue LowerConstantPool(SDValue Op, SelectionDAG &DAG);
 103     SDValue LowerDYNAMIC_STACKALLOC(SDValue Op, SelectionDAG &DAG);
 104     SDValue LowerFP_TO_SINT(SDValue Op, SelectionDAG &DAG);
 105     SDValue LowerGlobalAddress(SDValue Op, SelectionDAG &DAG);
 106     SDValue LowerGlobalTLSAddress(SDValue Op, SelectionDAG &DAG);
 107     SDValue LowerJumpTable(SDValue Op, SelectionDAG &DAG);
 108     SDValue LowerSELECT(SDValue Op, SelectionDAG &DAG);
 109     SDValue LowerSETCC(SDValue Op, SelectionDAG &DAG);
 110
 111     virtual SDValue
 112       LowerFormalArguments(SDValue Chain,
 113                            CallingConv::ID CallConv, bool isVarArg,
 114                            const SmallVectorImpl<ISD::InputArg> &Ins,
 115                            DebugLoc dl, SelectionDAG &DAG,
 116                            SmallVectorImpl<SDValue> &InVals);
 117
 118     virtual SDValue
 119       LowerCall(SDValue Chain, SDValue Callee,
 120                 CallingConv::ID CallConv, bool isVarArg,
 121                 bool isTailCall,
 122                 const SmallVectorImpl<ISD::OutputArg> &Outs,
 123                 const SmallVectorImpl<ISD::InputArg> &Ins,
 124                 DebugLoc dl, SelectionDAG &DAG,
 125                 SmallVectorImpl<SDValue> &InVals);
 126
 127     virtual SDValue
 128       LowerReturn(SDValue Chain,
 129                   CallingConv::ID CallConv, bool isVarArg,
 130                   const SmallVectorImpl<ISD::OutputArg> &Outs,
 131                   DebugLoc dl, SelectionDAG &DAG);
 132
 133     virtual MachineBasicBlock *EmitInstrWithCustomInserter(MachineInstr *MI,
 134                                                    MachineBasicBlock *MBB) const;
 135
 136     // Inline asm support
 137     ConstraintType getConstraintType(const std::string &Constraint) const;
 138
 139     std::pair<unsigned, const TargetRegisterClass*>
 140               getRegForInlineAsmConstraint(const std::string &Constraint,
 141               EVT VT) const;
 142
 143     std::vector<unsigned>
 144     getRegClassForInlineAsmConstraint(const std::string &Constraint,
 145               EVT VT) const;
 146
 147     virtual bool isOffsetFoldingLegal(const GlobalAddressSDNode *GA) const;
 148   };
 149 }
 150
 151 #endif // MipsISELLOWERING_H