1 //===- AsmWriterEmitter.h - Generate an assembly writer ---------*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This tablegen backend is responsible for emitting an assembly printer for the
13 //===----------------------------------------------------------------------===//
15 #ifndef ASMWRITER_EMITTER_H
16 #define ASMWRITER_EMITTER_H
18 #include "TableGenBackend.h"
25 class CodeGenInstruction
;
27 class AsmWriterEmitter
: public TableGenBackend
{
28 RecordKeeper
&Records
;
29 std::map
<const CodeGenInstruction
*, AsmWriterInst
*> CGIAWIMap
;
30 std::vector
<const CodeGenInstruction
*> NumberedInstructions
;
32 AsmWriterEmitter(RecordKeeper
&R
) : Records(R
) {}
34 // run - Output the asmwriter, returning true on failure.
35 void run(raw_ostream
&o
);
38 void EmitPrintInstruction(raw_ostream
&o
);
39 void EmitGetRegisterName(raw_ostream
&o
);
41 AsmWriterInst
*getAsmWriterInstByID(unsigned ID
) const {
42 assert(ID
< NumberedInstructions
.size());
43 std::map
<const CodeGenInstruction
*, AsmWriterInst
*>::const_iterator I
=
44 CGIAWIMap
.find(NumberedInstructions
[ID
]);
45 assert(I
!= CGIAWIMap
.end() && "Didn't find inst!");
48 void FindUniqueOperandCommands(std::vector
<std::string
> &UOC
,
49 std::vector
<unsigned> &InstIdxs
,
50 std::vector
<unsigned> &InstOpsUsed
) const;