1 //===- SystemZInstrFormats.td - SystemZ Instruction Formats ----*- tablegen -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // Format specifies the encoding used by the instruction. This is part of the
11 // ad-hoc solution used to emit machine instruction encodings by our machine
13 class Format<bits<5> val> {
17 def Pseudo : Format<0>;
18 def EForm : Format<1>;
19 def IForm : Format<2>;
20 def RIForm : Format<3>;
21 def RIEForm : Format<4>;
22 def RILForm : Format<5>;
23 def RISForm : Format<6>;
24 def RRForm : Format<7>;
25 def RREForm : Format<8>;
26 def RRFForm : Format<9>;
27 def RRRForm : Format<10>;
28 def RRSForm : Format<11>;
29 def RSForm : Format<12>;
30 def RSIForm : Format<13>;
31 def RSILForm : Format<14>;
32 def RSYForm : Format<15>;
33 def RXForm : Format<16>;
34 def RXEForm : Format<17>;
35 def RXFForm : Format<18>;
36 def RXYForm : Format<19>;
37 def SForm : Format<20>;
38 def SIForm : Format<21>;
39 def SILForm : Format<22>;
40 def SIYForm : Format<23>;
41 def SSForm : Format<24>;
42 def SSEForm : Format<25>;
43 def SSFForm : Format<26>;
45 class InstSystemZ<bits<16> op, Format f, dag outs, dag ins> : Instruction {
46 let Namespace = "SystemZ";
51 bits<5> FormBits = Form.Value;
53 dag OutOperandList = outs;
54 dag InOperandList = ins;
57 class I8<bits<8> op, Format f, dag outs, dag ins, string asmstr,
59 : InstSystemZ<0, f, outs, ins> {
63 let Pattern = pattern;
64 let AsmString = asmstr;
67 class I12<bits<12> op, Format f, dag outs, dag ins, string asmstr,
69 : InstSystemZ<0, f, outs, ins> {
70 let Opcode{0-11} = op;
71 let Opcode{12-15} = 0;
73 let Pattern = pattern;
74 let AsmString = asmstr;
77 class I16<bits<16> op, Format f, dag outs, dag ins, string asmstr,
79 : InstSystemZ<op, f, outs, ins> {
80 let Pattern = pattern;
81 let AsmString = asmstr;
84 class RRI<bits<8> op, dag outs, dag ins, string asmstr, list<dag> pattern>
85 : I8<op, RRForm, outs, ins, asmstr, pattern>;
87 class RII<bits<12> op, dag outs, dag ins, string asmstr, list<dag> pattern>
88 : I12<op, RIForm, outs, ins, asmstr, pattern>;
90 class RILI<bits<12> op, dag outs, dag ins, string asmstr, list<dag> pattern>
91 : I12<op, RILForm, outs, ins, asmstr, pattern>;
93 class RREI<bits<16> op, dag outs, dag ins, string asmstr, list<dag> pattern>
94 : I16<op, RREForm, outs, ins, asmstr, pattern>;
96 class RXI<bits<8> op, dag outs, dag ins, string asmstr, list<dag> pattern>
97 : I8<op, RXForm, outs, ins, asmstr, pattern>;
99 class RXYI<bits<16> op, dag outs, dag ins, string asmstr, list<dag> pattern>
100 : I16<op, RXYForm, outs, ins, asmstr, pattern>;
102 class RSI<bits<8> op, dag outs, dag ins, string asmstr, list<dag> pattern>
103 : I8<op, RSForm, outs, ins, asmstr, pattern>;
105 class RSYI<bits<16> op, dag outs, dag ins, string asmstr, list<dag> pattern>
106 : I16<op, RSYForm, outs, ins, asmstr, pattern>;
108 class SII<bits<8> op, dag outs, dag ins, string asmstr, list<dag> pattern>
109 : I8<op, SIForm, outs, ins, asmstr, pattern>;
111 class SIYI<bits<16> op, dag outs, dag ins, string asmstr, list<dag> pattern>
112 : I16<op, SIYForm, outs, ins, asmstr, pattern>;
114 class SILI<bits<16> op, dag outs, dag ins, string asmstr, list<dag> pattern>
115 : I16<op, SILForm, outs, ins, asmstr, pattern>;
118 //===----------------------------------------------------------------------===//
119 // Pseudo instructions
120 //===----------------------------------------------------------------------===//
122 class Pseudo<dag outs, dag ins, string asmstr, list<dag> pattern>
123 : InstSystemZ<0, Pseudo, outs, ins> {
125 let Pattern = pattern;
126 let AsmString = asmstr;