lib/Target/TargetInstrInfo.cpp

   1 //===-- TargetInstrInfo.cpp - Target Instruction Information --------------===//
   2 //
   3 //                     The LLVM Compiler Infrastructure
   4 //
   5 // This file is distributed under the University of Illinois Open Source
   6 // License. See LICENSE.TXT for details.
   7 //
   8 //===----------------------------------------------------------------------===//
   9 //
  10 // This file implements the TargetInstrInfo class.
  11 //
  12 //===----------------------------------------------------------------------===//
  13
  14 #include "llvm/Target/TargetInstrInfo.h"
  15 #include "llvm/Target/TargetAsmInfo.h"
  16 #include "llvm/Target/TargetRegisterInfo.h"
  17 #include "llvm/Support/ErrorHandling.h"
  18 using namespace llvm;
  19
  20 //===----------------------------------------------------------------------===//
  21 //  TargetOperandInfo
  22 //===----------------------------------------------------------------------===//
  23
  24 /// getRegClass - Get the register class for the operand, handling resolution
  25 /// of "symbolic" pointer register classes etc.  If this is not a register
  26 /// operand, this returns null.
  27 const TargetRegisterClass *
  28 TargetOperandInfo::getRegClass(const TargetRegisterInfo *TRI) const {
  29   if (isLookupPtrRegClass())
  30     return TRI->getPointerRegClass(RegClass);
  31   return TRI->getRegClass(RegClass);
  32 }
  33
  34 //===----------------------------------------------------------------------===//
  35 //  TargetInstrInfo
  36 //===----------------------------------------------------------------------===//
  37
  38 TargetInstrInfo::TargetInstrInfo(const TargetInstrDesc* Desc,
  39                                  unsigned numOpcodes)
  40   : Descriptors(Desc), NumOpcodes(numOpcodes) {
  41 }
  42
  43 TargetInstrInfo::~TargetInstrInfo() {
  44 }
  45
  46 /// insertNoop - Insert a noop into the instruction stream at the specified
  47 /// point.
  48 void TargetInstrInfo::insertNoop(MachineBasicBlock &MBB,
  49                                  MachineBasicBlock::iterator MI) const {
  50   llvm_unreachable("Target didn't implement insertNoop!");
  51 }
  52
  53
  54 bool TargetInstrInfo::isUnpredicatedTerminator(const MachineInstr *MI) const {
  55   const TargetInstrDesc &TID = MI->getDesc();
  56   if (!TID.isTerminator()) return false;
  57
  58   // Conditional branch is a special case.
  59   if (TID.isBranch() && !TID.isBarrier())
  60     return true;
  61   if (!TID.isPredicable())
  62     return true;
  63   return !isPredicated(MI);
  64 }
  65
  66
  67 /// Measure the specified inline asm to determine an approximation of its
  68 /// length.
  69 /// Comments (which run till the next SeparatorChar or newline) do not
  70 /// count as an instruction.
  71 /// Any other non-whitespace text is considered an instruction, with
  72 /// multiple instructions separated by SeparatorChar or newlines.
  73 /// Variable-length instructions are not handled here; this function
  74 /// may be overloaded in the target code to do that.
  75 unsigned TargetInstrInfo::getInlineAsmLength(const char *Str,
  76                                              const TargetAsmInfo &TAI) const {
  77
  78
  79   // Count the number of instructions in the asm.
  80   bool atInsnStart = true;
  81   unsigned Length = 0;
  82   for (; *Str; ++Str) {
  83     if (*Str == '\n' || *Str == TAI.getSeparatorChar())
  84       atInsnStart = true;
  85     if (atInsnStart && !isspace(*Str)) {
  86       Length += TAI.getMaxInstLength();
  87       atInsnStart = false;
  88     }
  89     if (atInsnStart && strncmp(Str, TAI.getCommentString(),
  90                                strlen(TAI.getCommentString())) == 0)
  91       atInsnStart = false;
  92   }
  93
  94   return Length;
  95 }