Change allowsUnalignedMemoryAccesses to take type argument since some targets
[llvm/avr.git] / lib / Target / X86 / AsmPrinter / X86ATTInstPrinter.cpp
blob52950aa323b4afdafebbcc90fe086997c4ac89da
1 //===-- X86ATTInstPrinter.cpp - AT&T assembly instruction printing --------===//
2 //
3 // The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // This file includes code for rendering MCInst instances as AT&T-style
11 // assembly.
13 //===----------------------------------------------------------------------===//
15 #define DEBUG_TYPE "asm-printer"
16 #include "llvm/MC/MCInst.h"
17 #include "X86ATTAsmPrinter.h"
18 #include "llvm/Target/TargetAsmInfo.h"
19 #include "llvm/Support/ErrorHandling.h"
20 #include "llvm/Support/FormattedStream.h"
21 using namespace llvm;
23 // Include the auto-generated portion of the assembly writer.
24 #define MachineInstr MCInst
25 #define NO_ASM_WRITER_BOILERPLATE
26 #include "X86GenAsmWriter.inc"
27 #undef MachineInstr
29 void X86ATTAsmPrinter::printSSECC(const MCInst *MI, unsigned Op) {
30 switch (MI->getOperand(Op).getImm()) {
31 default: llvm_unreachable("Invalid ssecc argument!");
32 case 0: O << "eq"; break;
33 case 1: O << "lt"; break;
34 case 2: O << "le"; break;
35 case 3: O << "unord"; break;
36 case 4: O << "neq"; break;
37 case 5: O << "nlt"; break;
38 case 6: O << "nle"; break;
39 case 7: O << "ord"; break;
44 void X86ATTAsmPrinter::printPICLabel(const MCInst *MI, unsigned Op) {
45 llvm_unreachable("This is only used for MOVPC32r,"
46 "should lower before asm printing!");
50 /// print_pcrel_imm - This is used to print an immediate value that ends up
51 /// being encoded as a pc-relative value. These print slightly differently, for
52 /// example, a $ is not emitted.
53 void X86ATTAsmPrinter::print_pcrel_imm(const MCInst *MI, unsigned OpNo) {
54 const MCOperand &Op = MI->getOperand(OpNo);
56 if (Op.isImm())
57 O << Op.getImm();
58 else if (Op.isMCValue())
59 Op.getMCValue().print(O);
60 else if (Op.isMBBLabel())
61 // FIXME: Keep in sync with printBasicBlockLabel. printBasicBlockLabel
62 // should eventually call into this code, not the other way around.
63 O << TAI->getPrivateGlobalPrefix() << "BB" << Op.getMBBLabelFunction()
64 << '_' << Op.getMBBLabelBlock();
65 else
66 llvm_unreachable("Unknown pcrel immediate operand");
70 void X86ATTAsmPrinter::printOperand(const MCInst *MI, unsigned OpNo,
71 const char *Modifier) {
72 assert(Modifier == 0 && "Modifiers should not be used");
74 const MCOperand &Op = MI->getOperand(OpNo);
75 if (Op.isReg()) {
76 O << '%';
77 unsigned Reg = Op.getReg();
78 #if 0
79 if (Modifier && strncmp(Modifier, "subreg", strlen("subreg")) == 0) {
80 EVT VT = (strcmp(Modifier+6,"64") == 0) ?
81 EVT::i64 : ((strcmp(Modifier+6, "32") == 0) ? EVT::i32 :
82 ((strcmp(Modifier+6,"16") == 0) ? EVT::i16 : EVT::i8));
83 Reg = getX86SubSuperRegister(Reg, VT);
85 #endif
86 O << TRI->getAsmName(Reg);
87 return;
88 } else if (Op.isImm()) {
89 //if (!Modifier || (strcmp(Modifier, "debug") && strcmp(Modifier, "mem")))
90 O << '$';
91 O << Op.getImm();
92 return;
93 } else if (Op.isMCValue()) {
94 O << '$';
95 Op.getMCValue().print(O);
96 return;
99 O << "<<UNKNOWN OPERAND KIND>>";
102 void X86ATTAsmPrinter::printLeaMemReference(const MCInst *MI, unsigned Op) {
104 const MCOperand &BaseReg = MI->getOperand(Op);
105 const MCOperand &IndexReg = MI->getOperand(Op+2);
106 const MCOperand &DispSpec = MI->getOperand(Op+3);
108 if (DispSpec.isImm()) {
109 int64_t DispVal = DispSpec.getImm();
110 if (DispVal || (!IndexReg.getReg() && !BaseReg.getReg()))
111 O << DispVal;
112 } else if (DispSpec.isMCValue()) {
113 DispSpec.getMCValue().print(O);
114 } else {
115 llvm_unreachable("non-immediate displacement for LEA?");
116 //assert(DispSpec.isGlobal() || DispSpec.isCPI() ||
117 // DispSpec.isJTI() || DispSpec.isSymbol());
118 //printOperand(MI, Op+3, "mem");
121 if (IndexReg.getReg() || BaseReg.getReg()) {
122 // There are cases where we can end up with ESP/RSP in the indexreg slot.
123 // If this happens, swap the base/index register to support assemblers that
124 // don't work when the index is *SP.
125 // FIXME: REMOVE THIS.
126 assert(IndexReg.getReg() != X86::ESP && IndexReg.getReg() != X86::RSP);
128 O << '(';
129 if (BaseReg.getReg())
130 printOperand(MI, Op);
132 if (IndexReg.getReg()) {
133 O << ',';
134 printOperand(MI, Op+2);
135 unsigned ScaleVal = MI->getOperand(Op+1).getImm();
136 if (ScaleVal != 1)
137 O << ',' << ScaleVal;
139 O << ')';
143 void X86ATTAsmPrinter::printMemReference(const MCInst *MI, unsigned Op) {
144 const MCOperand &Segment = MI->getOperand(Op+4);
145 if (Segment.getReg()) {
146 printOperand(MI, Op+4);
147 O << ':';
149 printLeaMemReference(MI, Op);