Change allowsUnalignedMemoryAccesses to take type argument since some targets
[llvm/avr.git] / lib / Target / X86 / X86TargetMachine.cpp
blob8c4e5d02bec36d1cc571820d29a9e0dfc792edc2
1 //===-- X86TargetMachine.cpp - Define TargetMachine for the X86 -----------===//
2 //
3 // The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // This file defines the X86 specific subclass of TargetMachine.
12 //===----------------------------------------------------------------------===//
14 #include "X86TargetAsmInfo.h"
15 #include "X86TargetMachine.h"
16 #include "X86.h"
17 #include "llvm/PassManager.h"
18 #include "llvm/CodeGen/MachineFunction.h"
19 #include "llvm/CodeGen/Passes.h"
20 #include "llvm/Support/FormattedStream.h"
21 #include "llvm/Target/TargetOptions.h"
22 #include "llvm/Target/TargetRegistry.h"
23 using namespace llvm;
25 static const TargetAsmInfo *createTargetAsmInfo(const Target &T,
26 const StringRef &TT) {
27 Triple TheTriple(TT);
28 switch (TheTriple.getOS()) {
29 case Triple::Darwin:
30 return new X86DarwinTargetAsmInfo(TheTriple);
31 case Triple::MinGW32:
32 case Triple::MinGW64:
33 case Triple::Cygwin:
34 return new X86COFFTargetAsmInfo(TheTriple);
35 case Triple::Win32:
36 return new X86WinTargetAsmInfo(TheTriple);
37 default:
38 return new X86ELFTargetAsmInfo(TheTriple);
42 extern "C" void LLVMInitializeX86Target() {
43 // Register the target.
44 RegisterTargetMachine<X86_32TargetMachine> X(TheX86_32Target);
45 RegisterTargetMachine<X86_64TargetMachine> Y(TheX86_64Target);
47 // Register the target asm info.
48 RegisterAsmInfoFn A(TheX86_32Target, createTargetAsmInfo);
49 RegisterAsmInfoFn B(TheX86_64Target, createTargetAsmInfo);
53 X86_32TargetMachine::X86_32TargetMachine(const Target &T, const std::string &TT,
54 const std::string &FS)
55 : X86TargetMachine(T, TT, FS, false) {
59 X86_64TargetMachine::X86_64TargetMachine(const Target &T, const std::string &TT,
60 const std::string &FS)
61 : X86TargetMachine(T, TT, FS, true) {
64 /// X86TargetMachine ctor - Create an X86 target.
65 ///
66 X86TargetMachine::X86TargetMachine(const Target &T, const std::string &TT,
67 const std::string &FS, bool is64Bit)
68 : LLVMTargetMachine(T, TT),
69 Subtarget(TT, FS, is64Bit),
70 DataLayout(Subtarget.getDataLayout()),
71 FrameInfo(TargetFrameInfo::StackGrowsDown,
72 Subtarget.getStackAlignment(),
73 (Subtarget.isTargetWin64() ? -40 :
74 (Subtarget.is64Bit() ? -8 : -4))),
75 InstrInfo(*this), JITInfo(*this), TLInfo(*this), ELFWriterInfo(*this) {
76 DefRelocModel = getRelocationModel();
78 // If no relocation model was picked, default as appropriate for the target.
79 if (getRelocationModel() == Reloc::Default) {
80 if (!Subtarget.isTargetDarwin())
81 setRelocationModel(Reloc::Static);
82 else if (Subtarget.is64Bit())
83 setRelocationModel(Reloc::PIC_);
84 else
85 setRelocationModel(Reloc::DynamicNoPIC);
88 assert(getRelocationModel() != Reloc::Default &&
89 "Relocation mode not picked");
91 // If no code model is picked, default to small.
92 if (getCodeModel() == CodeModel::Default)
93 setCodeModel(CodeModel::Small);
95 // ELF and X86-64 don't have a distinct DynamicNoPIC model. DynamicNoPIC
96 // is defined as a model for code which may be used in static or dynamic
97 // executables but not necessarily a shared library. On X86-32 we just
98 // compile in -static mode, in x86-64 we use PIC.
99 if (getRelocationModel() == Reloc::DynamicNoPIC) {
100 if (is64Bit)
101 setRelocationModel(Reloc::PIC_);
102 else if (!Subtarget.isTargetDarwin())
103 setRelocationModel(Reloc::Static);
106 // If we are on Darwin, disallow static relocation model in X86-64 mode, since
107 // the Mach-O file format doesn't support it.
108 if (getRelocationModel() == Reloc::Static &&
109 Subtarget.isTargetDarwin() &&
110 is64Bit)
111 setRelocationModel(Reloc::PIC_);
113 // Determine the PICStyle based on the target selected.
114 if (getRelocationModel() == Reloc::Static) {
115 // Unless we're in PIC or DynamicNoPIC mode, set the PIC style to None.
116 Subtarget.setPICStyle(PICStyles::None);
117 } else if (Subtarget.isTargetCygMing()) {
118 Subtarget.setPICStyle(PICStyles::None);
119 } else if (Subtarget.isTargetDarwin()) {
120 if (Subtarget.is64Bit())
121 Subtarget.setPICStyle(PICStyles::RIPRel);
122 else if (getRelocationModel() == Reloc::PIC_)
123 Subtarget.setPICStyle(PICStyles::StubPIC);
124 else {
125 assert(getRelocationModel() == Reloc::DynamicNoPIC);
126 Subtarget.setPICStyle(PICStyles::StubDynamicNoPIC);
128 } else if (Subtarget.isTargetELF()) {
129 if (Subtarget.is64Bit())
130 Subtarget.setPICStyle(PICStyles::RIPRel);
131 else
132 Subtarget.setPICStyle(PICStyles::GOT);
135 // Finally, if we have "none" as our PIC style, force to static mode.
136 if (Subtarget.getPICStyle() == PICStyles::None)
137 setRelocationModel(Reloc::Static);
140 //===----------------------------------------------------------------------===//
141 // Pass Pipeline Configuration
142 //===----------------------------------------------------------------------===//
144 bool X86TargetMachine::addInstSelector(PassManagerBase &PM,
145 CodeGenOpt::Level OptLevel) {
146 // Install an instruction selector.
147 PM.add(createX86ISelDag(*this, OptLevel));
149 // If we're using Fast-ISel, clean up the mess.
150 if (EnableFastISel)
151 PM.add(createDeadMachineInstructionElimPass());
153 // Install a pass to insert x87 FP_REG_KILL instructions, as needed.
154 PM.add(createX87FPRegKillInserterPass());
156 return false;
159 bool X86TargetMachine::addPreRegAlloc(PassManagerBase &PM,
160 CodeGenOpt::Level OptLevel) {
161 // Calculate and set max stack object alignment early, so we can decide
162 // whether we will need stack realignment (and thus FP).
163 PM.add(createX86MaxStackAlignmentCalculatorPass());
164 return false; // -print-machineinstr shouldn't print after this.
167 bool X86TargetMachine::addPostRegAlloc(PassManagerBase &PM,
168 CodeGenOpt::Level OptLevel) {
169 PM.add(createX86FloatingPointStackifierPass());
170 return true; // -print-machineinstr should print after this.
173 bool X86TargetMachine::addCodeEmitter(PassManagerBase &PM,
174 CodeGenOpt::Level OptLevel,
175 MachineCodeEmitter &MCE) {
176 // FIXME: Move this to TargetJITInfo!
177 // On Darwin, do not override 64-bit setting made in X86TargetMachine().
178 if (DefRelocModel == Reloc::Default &&
179 (!Subtarget.isTargetDarwin() || !Subtarget.is64Bit())) {
180 setRelocationModel(Reloc::Static);
181 Subtarget.setPICStyle(PICStyles::None);
184 // 64-bit JIT places everything in the same buffer except external functions.
185 // On Darwin, use small code model but hack the call instruction for
186 // externals. Elsewhere, do not assume globals are in the lower 4G.
187 if (Subtarget.is64Bit()) {
188 if (Subtarget.isTargetDarwin())
189 setCodeModel(CodeModel::Small);
190 else
191 setCodeModel(CodeModel::Large);
194 PM.add(createX86CodeEmitterPass(*this, MCE));
196 return false;
199 bool X86TargetMachine::addCodeEmitter(PassManagerBase &PM,
200 CodeGenOpt::Level OptLevel,
201 JITCodeEmitter &JCE) {
202 // FIXME: Move this to TargetJITInfo!
203 // On Darwin, do not override 64-bit setting made in X86TargetMachine().
204 if (DefRelocModel == Reloc::Default &&
205 (!Subtarget.isTargetDarwin() || !Subtarget.is64Bit())) {
206 setRelocationModel(Reloc::Static);
207 Subtarget.setPICStyle(PICStyles::None);
210 // 64-bit JIT places everything in the same buffer except external functions.
211 // On Darwin, use small code model but hack the call instruction for
212 // externals. Elsewhere, do not assume globals are in the lower 4G.
213 if (Subtarget.is64Bit()) {
214 if (Subtarget.isTargetDarwin())
215 setCodeModel(CodeModel::Small);
216 else
217 setCodeModel(CodeModel::Large);
220 PM.add(createX86JITCodeEmitterPass(*this, JCE));
222 return false;
225 bool X86TargetMachine::addCodeEmitter(PassManagerBase &PM,
226 CodeGenOpt::Level OptLevel,
227 ObjectCodeEmitter &OCE) {
228 PM.add(createX86ObjectCodeEmitterPass(*this, OCE));
229 return false;
232 bool X86TargetMachine::addSimpleCodeEmitter(PassManagerBase &PM,
233 CodeGenOpt::Level OptLevel,
234 MachineCodeEmitter &MCE) {
235 PM.add(createX86CodeEmitterPass(*this, MCE));
236 return false;
239 bool X86TargetMachine::addSimpleCodeEmitter(PassManagerBase &PM,
240 CodeGenOpt::Level OptLevel,
241 JITCodeEmitter &JCE) {
242 PM.add(createX86JITCodeEmitterPass(*this, JCE));
243 return false;
246 bool X86TargetMachine::addSimpleCodeEmitter(PassManagerBase &PM,
247 CodeGenOpt::Level OptLevel,
248 ObjectCodeEmitter &OCE) {
249 PM.add(createX86ObjectCodeEmitterPass(*this, OCE));
250 return false;