lib/Target/XCore/XCoreRegisterInfo.h

   1 //===- XCoreRegisterInfo.h - XCore Register Information Impl ----*- C++ -*-===//
   2 //
   3 //                     The LLVM Compiler Infrastructure
   4 //
   5 // This file is distributed under the University of Illinois Open Source
   6 // License. See LICENSE.TXT for details.
   7 //
   8 //===----------------------------------------------------------------------===//
   9 //
  10 // This file contains the XCore implementation of the MRegisterInfo class.
  11 //
  12 //===----------------------------------------------------------------------===//
  13
  14 #ifndef XCOREREGISTERINFO_H
  15 #define XCOREREGISTERINFO_H
  16
  17 #include "llvm/Target/TargetRegisterInfo.h"
  18 #include "XCoreGenRegisterInfo.h.inc"
  19
  20 namespace llvm {
  21
  22 class TargetInstrInfo;
  23
  24 struct XCoreRegisterInfo : public XCoreGenRegisterInfo {
  25 private:
  26   const TargetInstrInfo &TII;
  27
  28   void loadConstant(MachineBasicBlock &MBB,
  29                   MachineBasicBlock::iterator I,
  30                   unsigned DstReg, int64_t Value, DebugLoc dl) const;
  31
  32   void storeToStack(MachineBasicBlock &MBB,
  33                   MachineBasicBlock::iterator I,
  34                   unsigned SrcReg, int Offset, DebugLoc dl) const;
  35
  36   void loadFromStack(MachineBasicBlock &MBB,
  37                   MachineBasicBlock::iterator I,
  38                   unsigned DstReg, int Offset, DebugLoc dl) const;
  39
  40 public:
  41   XCoreRegisterInfo(const TargetInstrInfo &tii);
  42
  43   /// Code Generation virtual methods...
  44
  45   const unsigned *getCalleeSavedRegs(const MachineFunction *MF = 0) const;
  46
  47   const TargetRegisterClass* const* getCalleeSavedRegClasses(
  48                                      const MachineFunction *MF = 0) const;
  49
  50   BitVector getReservedRegs(const MachineFunction &MF) const;
  51
  52   bool requiresRegisterScavenging(const MachineFunction &MF) const;
  53
  54   bool hasFP(const MachineFunction &MF) const;
  55
  56   void eliminateCallFramePseudoInstr(MachineFunction &MF,
  57                                      MachineBasicBlock &MBB,
  58                                      MachineBasicBlock::iterator I) const;
  59
  60   void eliminateFrameIndex(MachineBasicBlock::iterator II,
  61                            int SPAdj, RegScavenger *RS = NULL) const;
  62
  63   void processFunctionBeforeCalleeSavedScan(MachineFunction &MF,
  64                                                 RegScavenger *RS = NULL) const;
  65
  66   void processFunctionBeforeFrameFinalized(MachineFunction &MF) const;
  67
  68   void emitPrologue(MachineFunction &MF) const;
  69   void emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const;
  70
  71   // Debug information queries.
  72   unsigned getRARegister() const;
  73   unsigned getFrameRegister(MachineFunction &MF) const;
  74   void getInitialFrameState(std::vector<MachineMove> &Moves) const;
  75
  76   //! Return the array of argument passing registers
  77   /*!
  78     \note The size of this array is returned by getArgRegsSize().
  79     */
  80   static const unsigned *getArgRegs(const MachineFunction *MF = 0);
  81
  82   //! Return the size of the argument passing register array
  83   static unsigned getNumArgRegs(const MachineFunction *MF = 0);
  84
  85   //! Return whether to emit frame moves
  86   static bool needsFrameMoves(const MachineFunction &MF);
  87
  88   //! Get DWARF debugging register number
  89   int getDwarfRegNum(unsigned RegNum, bool isEH) const;
  90 };
  91
  92 } // end namespace llvm
  93
  94 #endif