1 ; RUN: llc < %s -march=arm -mattr=+neon > %t
2 ; RUN: grep {vpmin\\.s8} %t | count 1
3 ; RUN: grep {vpmin\\.s16} %t | count 1
4 ; RUN: grep {vpmin\\.s32} %t | count 1
5 ; RUN: grep {vpmin\\.u8} %t | count 1
6 ; RUN: grep {vpmin\\.u16} %t | count 1
7 ; RUN: grep {vpmin\\.u32} %t | count 1
8 ; RUN: grep {vpmin\\.f32} %t | count 1
10 define <8 x i8> @vpmins8(<8 x i8>* %A, <8 x i8>* %B) nounwind {
11 %tmp1 = load <8 x i8>* %A
12 %tmp2 = load <8 x i8>* %B
13 %tmp3 = call <8 x i8> @llvm.arm.neon.vpmins.v8i8(<8 x i8> %tmp1, <8 x i8> %tmp2)
17 define <4 x i16> @vpmins16(<4 x i16>* %A, <4 x i16>* %B) nounwind {
18 %tmp1 = load <4 x i16>* %A
19 %tmp2 = load <4 x i16>* %B
20 %tmp3 = call <4 x i16> @llvm.arm.neon.vpmins.v4i16(<4 x i16> %tmp1, <4 x i16> %tmp2)
24 define <2 x i32> @vpmins32(<2 x i32>* %A, <2 x i32>* %B) nounwind {
25 %tmp1 = load <2 x i32>* %A
26 %tmp2 = load <2 x i32>* %B
27 %tmp3 = call <2 x i32> @llvm.arm.neon.vpmins.v2i32(<2 x i32> %tmp1, <2 x i32> %tmp2)
31 define <8 x i8> @vpminu8(<8 x i8>* %A, <8 x i8>* %B) nounwind {
32 %tmp1 = load <8 x i8>* %A
33 %tmp2 = load <8 x i8>* %B
34 %tmp3 = call <8 x i8> @llvm.arm.neon.vpminu.v8i8(<8 x i8> %tmp1, <8 x i8> %tmp2)
38 define <4 x i16> @vpminu16(<4 x i16>* %A, <4 x i16>* %B) nounwind {
39 %tmp1 = load <4 x i16>* %A
40 %tmp2 = load <4 x i16>* %B
41 %tmp3 = call <4 x i16> @llvm.arm.neon.vpminu.v4i16(<4 x i16> %tmp1, <4 x i16> %tmp2)
45 define <2 x i32> @vpminu32(<2 x i32>* %A, <2 x i32>* %B) nounwind {
46 %tmp1 = load <2 x i32>* %A
47 %tmp2 = load <2 x i32>* %B
48 %tmp3 = call <2 x i32> @llvm.arm.neon.vpminu.v2i32(<2 x i32> %tmp1, <2 x i32> %tmp2)
52 define <2 x float> @vpminf32(<2 x float>* %A, <2 x float>* %B) nounwind {
53 %tmp1 = load <2 x float>* %A
54 %tmp2 = load <2 x float>* %B
55 %tmp3 = call <2 x float> @llvm.arm.neon.vpmins.v2f32(<2 x float> %tmp1, <2 x float> %tmp2)
59 declare <8 x i8> @llvm.arm.neon.vpmins.v8i8(<8 x i8>, <8 x i8>) nounwind readnone
60 declare <4 x i16> @llvm.arm.neon.vpmins.v4i16(<4 x i16>, <4 x i16>) nounwind readnone
61 declare <2 x i32> @llvm.arm.neon.vpmins.v2i32(<2 x i32>, <2 x i32>) nounwind readnone
63 declare <8 x i8> @llvm.arm.neon.vpminu.v8i8(<8 x i8>, <8 x i8>) nounwind readnone
64 declare <4 x i16> @llvm.arm.neon.vpminu.v4i16(<4 x i16>, <4 x i16>) nounwind readnone
65 declare <2 x i32> @llvm.arm.neon.vpminu.v2i32(<2 x i32>, <2 x i32>) nounwind readnone
67 declare <2 x float> @llvm.arm.neon.vpmins.v2f32(<2 x float>, <2 x float>) nounwind readnone