Fix part 1 of pr4682. PICADD is a 16-bit instruction even in thumb2 mode.
[llvm/avr.git] / lib / Target / Mips / AsmPrinter / MipsAsmPrinter.cpp
blob7666eaba51b12b5a612cb208a3248f2366b8e5c0
1 //===-- MipsAsmPrinter.cpp - Mips LLVM assembly writer --------------------===//
2 //
3 // The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // This file contains a printer that converts from our internal representation
11 // of machine-dependent LLVM code to GAS-format MIPS assembly language.
13 //===----------------------------------------------------------------------===//
15 #define DEBUG_TYPE "mips-asm-printer"
17 #include "Mips.h"
18 #include "MipsSubtarget.h"
19 #include "MipsInstrInfo.h"
20 #include "MipsTargetMachine.h"
21 #include "MipsMachineFunction.h"
22 #include "llvm/Constants.h"
23 #include "llvm/DerivedTypes.h"
24 #include "llvm/Module.h"
25 #include "llvm/Metadata.h"
26 #include "llvm/CodeGen/AsmPrinter.h"
27 #include "llvm/CodeGen/DwarfWriter.h"
28 #include "llvm/CodeGen/MachineFunctionPass.h"
29 #include "llvm/CodeGen/MachineConstantPool.h"
30 #include "llvm/CodeGen/MachineFrameInfo.h"
31 #include "llvm/CodeGen/MachineInstr.h"
32 #include "llvm/Target/TargetAsmInfo.h"
33 #include "llvm/Target/TargetData.h"
34 #include "llvm/Target/TargetLoweringObjectFile.h"
35 #include "llvm/Target/TargetMachine.h"
36 #include "llvm/Target/TargetOptions.h"
37 #include "llvm/Target/TargetRegistry.h"
38 #include "llvm/Support/ErrorHandling.h"
39 #include "llvm/Support/Mangler.h"
40 #include "llvm/ADT/Statistic.h"
41 #include "llvm/ADT/StringExtras.h"
42 #include "llvm/Support/Debug.h"
43 #include "llvm/Support/CommandLine.h"
44 #include "llvm/Support/FormattedStream.h"
45 #include "llvm/Support/MathExtras.h"
46 #include <cctype>
48 using namespace llvm;
50 STATISTIC(EmittedInsts, "Number of machine instrs printed");
52 namespace {
53 class VISIBILITY_HIDDEN MipsAsmPrinter : public AsmPrinter {
54 const MipsSubtarget *Subtarget;
55 public:
56 explicit MipsAsmPrinter(formatted_raw_ostream &O, TargetMachine &TM,
57 const TargetAsmInfo *T, bool V)
58 : AsmPrinter(O, TM, T, V) {
59 Subtarget = &TM.getSubtarget<MipsSubtarget>();
62 virtual const char *getPassName() const {
63 return "Mips Assembly Printer";
66 bool PrintAsmOperand(const MachineInstr *MI, unsigned OpNo,
67 unsigned AsmVariant, const char *ExtraCode);
68 void printOperand(const MachineInstr *MI, int opNum);
69 void printUnsignedImm(const MachineInstr *MI, int opNum);
70 void printMemOperand(const MachineInstr *MI, int opNum,
71 const char *Modifier = 0);
72 void printFCCOperand(const MachineInstr *MI, int opNum,
73 const char *Modifier = 0);
74 void PrintGlobalVariable(const GlobalVariable *GVar);
75 void printSavedRegsBitmask(MachineFunction &MF);
76 void printHex32(unsigned int Value);
78 const char *emitCurrentABIString(void);
79 void emitFunctionStart(MachineFunction &MF);
80 void emitFunctionEnd(MachineFunction &MF);
81 void emitFrameDirective(MachineFunction &MF);
83 bool printInstruction(const MachineInstr *MI); // autogenerated.
84 bool runOnMachineFunction(MachineFunction &F);
85 bool doInitialization(Module &M);
87 } // end of anonymous namespace
89 #include "MipsGenAsmWriter.inc"
91 //===----------------------------------------------------------------------===//
93 // Mips Asm Directives
95 // -- Frame directive "frame Stackpointer, Stacksize, RARegister"
96 // Describe the stack frame.
98 // -- Mask directives "(f)mask bitmask, offset"
99 // Tells the assembler which registers are saved and where.
100 // bitmask - contain a little endian bitset indicating which registers are
101 // saved on function prologue (e.g. with a 0x80000000 mask, the
102 // assembler knows the register 31 (RA) is saved at prologue.
103 // offset - the position before stack pointer subtraction indicating where
104 // the first saved register on prologue is located. (e.g. with a
106 // Consider the following function prologue:
108 // .frame $fp,48,$ra
109 // .mask 0xc0000000,-8
110 // addiu $sp, $sp, -48
111 // sw $ra, 40($sp)
112 // sw $fp, 36($sp)
114 // With a 0xc0000000 mask, the assembler knows the register 31 (RA) and
115 // 30 (FP) are saved at prologue. As the save order on prologue is from
116 // left to right, RA is saved first. A -8 offset means that after the
117 // stack pointer subtration, the first register in the mask (RA) will be
118 // saved at address 48-8=40.
120 //===----------------------------------------------------------------------===//
122 //===----------------------------------------------------------------------===//
123 // Mask directives
124 //===----------------------------------------------------------------------===//
126 // Create a bitmask with all callee saved registers for CPU or Floating Point
127 // registers. For CPU registers consider RA, GP and FP for saving if necessary.
128 void MipsAsmPrinter::
129 printSavedRegsBitmask(MachineFunction &MF)
131 const TargetRegisterInfo &RI = *TM.getRegisterInfo();
132 MipsFunctionInfo *MipsFI = MF.getInfo<MipsFunctionInfo>();
134 // CPU and FPU Saved Registers Bitmasks
135 unsigned int CPUBitmask = 0;
136 unsigned int FPUBitmask = 0;
138 // Set the CPU and FPU Bitmasks
139 MachineFrameInfo *MFI = MF.getFrameInfo();
140 const std::vector<CalleeSavedInfo> &CSI = MFI->getCalleeSavedInfo();
141 for (unsigned i = 0, e = CSI.size(); i != e; ++i) {
142 unsigned RegNum = MipsRegisterInfo::getRegisterNumbering(CSI[i].getReg());
143 if (CSI[i].getRegClass() == Mips::CPURegsRegisterClass)
144 CPUBitmask |= (1 << RegNum);
145 else
146 FPUBitmask |= (1 << RegNum);
149 // Return Address and Frame registers must also be set in CPUBitmask.
150 if (RI.hasFP(MF))
151 CPUBitmask |= (1 << MipsRegisterInfo::
152 getRegisterNumbering(RI.getFrameRegister(MF)));
154 if (MF.getFrameInfo()->hasCalls())
155 CPUBitmask |= (1 << MipsRegisterInfo::
156 getRegisterNumbering(RI.getRARegister()));
158 // Print CPUBitmask
159 O << "\t.mask \t"; printHex32(CPUBitmask); O << ','
160 << MipsFI->getCPUTopSavedRegOff() << '\n';
162 // Print FPUBitmask
163 O << "\t.fmask\t"; printHex32(FPUBitmask); O << ","
164 << MipsFI->getFPUTopSavedRegOff() << '\n';
167 // Print a 32 bit hex number with all numbers.
168 void MipsAsmPrinter::
169 printHex32(unsigned int Value)
171 O << "0x";
172 for (int i = 7; i >= 0; i--)
173 O << utohexstr( (Value & (0xF << (i*4))) >> (i*4) );
176 //===----------------------------------------------------------------------===//
177 // Frame and Set directives
178 //===----------------------------------------------------------------------===//
180 /// Frame Directive
181 void MipsAsmPrinter::emitFrameDirective(MachineFunction &MF) {
182 const TargetRegisterInfo &RI = *TM.getRegisterInfo();
184 unsigned stackReg = RI.getFrameRegister(MF);
185 unsigned returnReg = RI.getRARegister();
186 unsigned stackSize = MF.getFrameInfo()->getStackSize();
189 O << "\t.frame\t" << '$' << LowercaseString(RI.get(stackReg).AsmName)
190 << ',' << stackSize << ','
191 << '$' << LowercaseString(RI.get(returnReg).AsmName)
192 << '\n';
195 /// Emit Set directives.
196 const char *MipsAsmPrinter::emitCurrentABIString() {
197 switch(Subtarget->getTargetABI()) {
198 case MipsSubtarget::O32: return "abi32";
199 case MipsSubtarget::O64: return "abiO64";
200 case MipsSubtarget::N32: return "abiN32";
201 case MipsSubtarget::N64: return "abi64";
202 case MipsSubtarget::EABI: return "eabi32"; // TODO: handle eabi64
203 default: break;
206 llvm_unreachable("Unknown Mips ABI");
207 return NULL;
210 /// Emit the directives used by GAS on the start of functions
211 void MipsAsmPrinter::emitFunctionStart(MachineFunction &MF) {
212 // Print out the label for the function.
213 const Function *F = MF.getFunction();
214 SwitchToSection(getObjFileLowering().SectionForGlobal(F, Mang, TM));
216 // 2 bits aligned
217 EmitAlignment(MF.getAlignment(), F);
219 O << "\t.globl\t" << CurrentFnName << '\n';
220 O << "\t.ent\t" << CurrentFnName << '\n';
222 printVisibility(CurrentFnName, F->getVisibility());
224 if ((TAI->hasDotTypeDotSizeDirective()) && Subtarget->isLinux())
225 O << "\t.type\t" << CurrentFnName << ", @function\n";
227 O << CurrentFnName << ":\n";
229 emitFrameDirective(MF);
230 printSavedRegsBitmask(MF);
232 O << '\n';
235 /// Emit the directives used by GAS on the end of functions
236 void MipsAsmPrinter::emitFunctionEnd(MachineFunction &MF) {
237 // There are instruction for this macros, but they must
238 // always be at the function end, and we can't emit and
239 // break with BB logic.
240 O << "\t.set\tmacro\n";
241 O << "\t.set\treorder\n";
243 O << "\t.end\t" << CurrentFnName << '\n';
244 if (TAI->hasDotTypeDotSizeDirective() && !Subtarget->isLinux())
245 O << "\t.size\t" << CurrentFnName << ", .-" << CurrentFnName << '\n';
248 /// runOnMachineFunction - This uses the printMachineInstruction()
249 /// method to print assembly for each instruction.
250 bool MipsAsmPrinter::runOnMachineFunction(MachineFunction &MF) {
251 this->MF = &MF;
253 SetupMachineFunction(MF);
255 // Print out constants referenced by the function
256 EmitConstantPool(MF.getConstantPool());
258 // Print out jump tables referenced by the function
259 EmitJumpTableInfo(MF.getJumpTableInfo(), MF);
261 O << "\n\n";
263 // Emit the function start directives
264 emitFunctionStart(MF);
266 // Print out code for the function.
267 for (MachineFunction::const_iterator I = MF.begin(), E = MF.end();
268 I != E; ++I) {
270 // Print a label for the basic block.
271 if (I != MF.begin()) {
272 printBasicBlockLabel(I, true, true);
273 O << '\n';
276 for (MachineBasicBlock::const_iterator II = I->begin(), E = I->end();
277 II != E; ++II) {
278 // Print the assembly for the instruction.
279 printInstruction(II);
280 ++EmittedInsts;
283 // Each Basic Block is separated by a newline
284 O << '\n';
287 // Emit function end directives
288 emitFunctionEnd(MF);
290 // We didn't modify anything.
291 return false;
294 // Print out an operand for an inline asm expression.
295 bool MipsAsmPrinter::PrintAsmOperand(const MachineInstr *MI, unsigned OpNo,
296 unsigned AsmVariant,const char *ExtraCode){
297 // Does this asm operand have a single letter operand modifier?
298 if (ExtraCode && ExtraCode[0])
299 return true; // Unknown modifier.
301 printOperand(MI, OpNo);
302 return false;
305 void MipsAsmPrinter::printOperand(const MachineInstr *MI, int opNum) {
306 const MachineOperand &MO = MI->getOperand(opNum);
307 const TargetRegisterInfo &RI = *TM.getRegisterInfo();
308 bool closeP = false;
309 bool isPIC = (TM.getRelocationModel() == Reloc::PIC_);
310 bool isCodeLarge = (TM.getCodeModel() == CodeModel::Large);
312 // %hi and %lo used on mips gas to load global addresses on
313 // static code. %got is used to load global addresses when
314 // using PIC_. %call16 is used to load direct call targets
315 // on PIC_ and small code size. %call_lo and %call_hi load
316 // direct call targets on PIC_ and large code size.
317 if (MI->getOpcode() == Mips::LUi && !MO.isReg() && !MO.isImm()) {
318 if ((isPIC) && (isCodeLarge))
319 O << "%call_hi(";
320 else
321 O << "%hi(";
322 closeP = true;
323 } else if ((MI->getOpcode() == Mips::ADDiu) && !MO.isReg() && !MO.isImm()) {
324 const MachineOperand &firstMO = MI->getOperand(opNum-1);
325 if (firstMO.getReg() == Mips::GP)
326 O << "%gp_rel(";
327 else
328 O << "%lo(";
329 closeP = true;
330 } else if ((isPIC) && (MI->getOpcode() == Mips::LW) &&
331 (!MO.isReg()) && (!MO.isImm())) {
332 const MachineOperand &firstMO = MI->getOperand(opNum-1);
333 const MachineOperand &lastMO = MI->getOperand(opNum+1);
334 if ((firstMO.isReg()) && (lastMO.isReg())) {
335 if ((firstMO.getReg() == Mips::T9) && (lastMO.getReg() == Mips::GP)
336 && (!isCodeLarge))
337 O << "%call16(";
338 else if ((firstMO.getReg() != Mips::T9) && (lastMO.getReg() == Mips::GP))
339 O << "%got(";
340 else if ((firstMO.getReg() == Mips::T9) && (lastMO.getReg() != Mips::GP)
341 && (isCodeLarge))
342 O << "%call_lo(";
343 closeP = true;
347 switch (MO.getType())
349 case MachineOperand::MO_Register:
350 if (TargetRegisterInfo::isPhysicalRegister(MO.getReg()))
351 O << '$' << LowercaseString (RI.get(MO.getReg()).AsmName);
352 else
353 O << '$' << MO.getReg();
354 break;
356 case MachineOperand::MO_Immediate:
357 O << (short int)MO.getImm();
358 break;
360 case MachineOperand::MO_MachineBasicBlock:
361 printBasicBlockLabel(MO.getMBB());
362 return;
364 case MachineOperand::MO_GlobalAddress:
365 O << Mang->getMangledName(MO.getGlobal());
366 break;
368 case MachineOperand::MO_ExternalSymbol:
369 O << MO.getSymbolName();
370 break;
372 case MachineOperand::MO_JumpTableIndex:
373 O << TAI->getPrivateGlobalPrefix() << "JTI" << getFunctionNumber()
374 << '_' << MO.getIndex();
375 break;
377 case MachineOperand::MO_ConstantPoolIndex:
378 O << TAI->getPrivateGlobalPrefix() << "CPI"
379 << getFunctionNumber() << "_" << MO.getIndex();
380 break;
382 default:
383 llvm_unreachable("<unknown operand type>");
386 if (closeP) O << ")";
389 void MipsAsmPrinter::printUnsignedImm(const MachineInstr *MI, int opNum) {
390 const MachineOperand &MO = MI->getOperand(opNum);
391 if (MO.getType() == MachineOperand::MO_Immediate)
392 O << (unsigned short int)MO.getImm();
393 else
394 printOperand(MI, opNum);
397 void MipsAsmPrinter::
398 printMemOperand(const MachineInstr *MI, int opNum, const char *Modifier) {
399 // when using stack locations for not load/store instructions
400 // print the same way as all normal 3 operand instructions.
401 if (Modifier && !strcmp(Modifier, "stackloc")) {
402 printOperand(MI, opNum+1);
403 O << ", ";
404 printOperand(MI, opNum);
405 return;
408 // Load/Store memory operands -- imm($reg)
409 // If PIC target the target is loaded as the
410 // pattern lw $25,%call16($28)
411 printOperand(MI, opNum);
412 O << "(";
413 printOperand(MI, opNum+1);
414 O << ")";
417 void MipsAsmPrinter::
418 printFCCOperand(const MachineInstr *MI, int opNum, const char *Modifier) {
419 const MachineOperand& MO = MI->getOperand(opNum);
420 O << Mips::MipsFCCToString((Mips::CondCode)MO.getImm());
423 bool MipsAsmPrinter::doInitialization(Module &M) {
424 // FIXME: Use SwitchToSection.
426 // Tell the assembler which ABI we are using
427 O << "\t.section .mdebug." << emitCurrentABIString() << '\n';
429 // TODO: handle O64 ABI
430 if (Subtarget->isABI_EABI())
431 O << "\t.section .gcc_compiled_long" <<
432 (Subtarget->isGP32bit() ? "32" : "64") << '\n';
434 // return to previous section
435 O << "\t.previous" << '\n';
437 return AsmPrinter::doInitialization(M);
440 void MipsAsmPrinter::PrintGlobalVariable(const GlobalVariable *GVar) {
441 const TargetData *TD = TM.getTargetData();
443 if (!GVar->hasInitializer())
444 return; // External global require no code
446 // Check to see if this is a special global used by LLVM, if so, emit it.
447 if (EmitSpecialLLVMGlobal(GVar))
448 return;
450 O << "\n\n";
451 std::string name = Mang->getMangledName(GVar);
452 Constant *C = GVar->getInitializer();
453 if (isa<MDNode>(C) || isa<MDString>(C))
454 return;
455 const Type *CTy = C->getType();
456 unsigned Size = TD->getTypeAllocSize(CTy);
457 const ConstantArray *CVA = dyn_cast<ConstantArray>(C);
458 bool printSizeAndType = true;
460 // A data structure or array is aligned in memory to the largest
461 // alignment boundary required by any data type inside it (this matches
462 // the Preferred Type Alignment). For integral types, the alignment is
463 // the type size.
464 unsigned Align;
465 if (CTy->getTypeID() == Type::IntegerTyID ||
466 CTy->getTypeID() == Type::VoidTyID) {
467 assert(!(Size & (Size-1)) && "Alignment is not a power of two!");
468 Align = Log2_32(Size);
469 } else
470 Align = TD->getPreferredTypeAlignmentShift(CTy);
472 printVisibility(name, GVar->getVisibility());
474 SwitchToSection(getObjFileLowering().SectionForGlobal(GVar, Mang, TM));
476 if (C->isNullValue() && !GVar->hasSection()) {
477 if (!GVar->isThreadLocal() &&
478 (GVar->hasLocalLinkage() || GVar->isWeakForLinker())) {
479 if (Size == 0) Size = 1; // .comm Foo, 0 is undefined, avoid it.
481 if (GVar->hasLocalLinkage())
482 O << "\t.local\t" << name << '\n';
484 O << TAI->getCOMMDirective() << name << ',' << Size;
485 if (TAI->getCOMMDirectiveTakesAlignment())
486 O << ',' << (1 << Align);
488 O << '\n';
489 return;
492 switch (GVar->getLinkage()) {
493 case GlobalValue::LinkOnceAnyLinkage:
494 case GlobalValue::LinkOnceODRLinkage:
495 case GlobalValue::CommonLinkage:
496 case GlobalValue::WeakAnyLinkage:
497 case GlobalValue::WeakODRLinkage:
498 // FIXME: Verify correct for weak.
499 // Nonnull linkonce -> weak
500 O << "\t.weak " << name << '\n';
501 break;
502 case GlobalValue::AppendingLinkage:
503 // FIXME: appending linkage variables should go into a section of their name
504 // or something. For now, just emit them as external.
505 case GlobalValue::ExternalLinkage:
506 // If external or appending, declare as a global symbol
507 O << TAI->getGlobalDirective() << name << '\n';
508 // Fall Through
509 case GlobalValue::PrivateLinkage:
510 case GlobalValue::LinkerPrivateLinkage:
511 case GlobalValue::InternalLinkage:
512 if (CVA && CVA->isCString())
513 printSizeAndType = false;
514 break;
515 case GlobalValue::GhostLinkage:
516 llvm_unreachable("Should not have any unmaterialized functions!");
517 case GlobalValue::DLLImportLinkage:
518 llvm_unreachable("DLLImport linkage is not supported by this target!");
519 case GlobalValue::DLLExportLinkage:
520 llvm_unreachable("DLLExport linkage is not supported by this target!");
521 default:
522 llvm_unreachable("Unknown linkage type!");
525 EmitAlignment(Align, GVar);
527 if (TAI->hasDotTypeDotSizeDirective() && printSizeAndType) {
528 O << "\t.type " << name << ",@object\n";
529 O << "\t.size " << name << ',' << Size << '\n';
532 O << name << ":\n";
533 EmitGlobalConstant(C);
537 // Force static initialization.
538 extern "C" void LLVMInitializeMipsAsmPrinter() {
539 RegisterAsmPrinter<MipsAsmPrinter> X(TheMipsTarget);
540 RegisterAsmPrinter<MipsAsmPrinter> Y(TheMipselTarget);