Fix part 1 of pr4682. PICADD is a 16-bit instruction even in thumb2 mode.
[llvm/avr.git] / lib / Target / Mips / MipsSubtarget.cpp
bloba85028cb96fce762627a7b58133348ab775e85e6
1 //===- MipsSubtarget.cpp - Mips Subtarget Information -----------*- C++ -*-===//
2 //
3 // The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // This file implements the Mips specific subclass of TargetSubtarget.
12 //===----------------------------------------------------------------------===//
14 #include "MipsSubtarget.h"
15 #include "Mips.h"
16 #include "MipsGenSubtarget.inc"
17 #include "llvm/Support/CommandLine.h"
18 using namespace llvm;
20 MipsSubtarget::MipsSubtarget(const std::string &TT, const std::string &FS,
21 bool little) :
22 MipsArchVersion(Mips1), MipsABI(O32), IsLittle(little), IsSingleFloat(false),
23 IsFP64bit(false), IsGP64bit(false), HasVFPU(false), IsLinux(true),
24 HasSEInReg(false), HasCondMov(false), HasMulDivAdd(false), HasMinMax(false),
25 HasSwap(false), HasBitCount(false)
27 std::string CPU = "mips1";
28 MipsArchVersion = Mips1;
30 // Parse features string.
31 ParseSubtargetFeatures(FS, CPU);
33 // Is the target system Linux ?
34 if (TT.find("linux") == std::string::npos)
35 IsLinux = false;
37 // When only the target triple is specified and is
38 // a allegrex target, set the features. We also match
39 // big and little endian allegrex cores (dont really
40 // know if a big one exists)
41 if (TT.find("mipsallegrex") != std::string::npos ||
42 TT.find("psp") != std::string::npos) {
43 MipsABI = EABI;
44 IsSingleFloat = true;
45 MipsArchVersion = Mips2;
46 HasVFPU = true; // Enables Allegrex Vector FPU (not supported yet)
47 HasSEInReg = true;
48 HasBitCount = true;
49 HasSwap = true;
50 HasCondMov = true;