lib/Target/Mips/MipsSubtarget.h

   1 //=====-- MipsSubtarget.h - Define Subtarget for the Mips -----*- C++ -*--====//
   2 //
   3 //                     The LLVM Compiler Infrastructure
   4 //
   5 // This file is distributed under the University of Illinois Open Source
   6 // License. See LICENSE.TXT for details.
   7 //
   8 //===----------------------------------------------------------------------===//
   9 //
  10 // This file declares the Mips specific subclass of TargetSubtarget.
  11 //
  12 //===----------------------------------------------------------------------===//
  13
  14 #ifndef MIPSSUBTARGET_H
  15 #define MIPSSUBTARGET_H
  16
  17 #include "llvm/Target/TargetSubtarget.h"
  18 #include "llvm/Target/TargetMachine.h"
  19
  20 #include <string>
  21
  22 namespace llvm {
  23
  24 class MipsSubtarget : public TargetSubtarget {
  25
  26 public:
  27   enum MipsABIEnum {
  28     O32, O64, N32, N64, EABI
  29   };
  30
  31 protected:
  32
  33   enum MipsArchEnum {
  34     Mips1, Mips2, Mips3, Mips4, Mips32, Mips32r2, Mips64, Mips64r2
  35   };
  36
  37   // Mips architecture version
  38   MipsArchEnum MipsArchVersion;
  39
  40   // Mips supported ABIs
  41   MipsABIEnum MipsABI;
  42
  43   // IsLittle - The target is Little Endian
  44   bool IsLittle;
  45
  46   // IsSingleFloat - The target only supports single precision float
  47   // point operations. This enable the target to use all 32 32-bit
  48   // floating point registers instead of only using even ones.
  49   bool IsSingleFloat;
  50
  51   // IsFP64bit - The target processor has 64-bit floating point registers.
  52   bool IsFP64bit;
  53
  54   // IsFP64bit - General-purpose registers are 64 bits wide
  55   bool IsGP64bit;
  56
  57   // HasVFPU - Processor has a vector floating point unit.
  58   bool HasVFPU;
  59
  60   // isLinux - Target system is Linux. Is false we consider ELFOS for now.
  61   bool IsLinux;
  62
  63   /// Features related to the presence of specific instructions.
  64
  65   // HasSEInReg - SEB and SEH (signext in register) instructions.
  66   bool HasSEInReg;
  67
  68   // HasCondMov - Conditional mov (MOVZ, MOVN) instructions.
  69   bool HasCondMov;
  70
  71   // HasMulDivAdd - Multiply add and sub (MADD, MADDu, MSUB, MSUBu)
  72   // instructions.
  73   bool HasMulDivAdd;
  74
  75   // HasMinMax - MIN and MAX instructions.
  76   bool HasMinMax;
  77
  78   // HasSwap - Byte and half swap instructions.
  79   bool HasSwap;
  80
  81   // HasBitCount - Count leading '1' and '0' bits.
  82   bool HasBitCount;
  83
  84   InstrItineraryData InstrItins;
  85
  86 public:
  87
  88   /// Only O32 and EABI supported right now.
  89   bool isABI_EABI() const { return MipsABI == EABI; }
  90   bool isABI_O32() const { return MipsABI == O32; }
  91   unsigned getTargetABI() const { return MipsABI; }
  92
  93   /// This constructor initializes the data members to match that
  94   /// of the specified triple.
  95   MipsSubtarget(const std::string &TT, const std::string &FS, bool little);
  96
  97   /// ParseSubtargetFeatures - Parses features string setting specified
  98   /// subtarget options.  Definition of function is auto generated by tblgen.
  99   std::string ParseSubtargetFeatures(const std::string &FS,
 100                                      const std::string &CPU);
 101
 102   bool isMips1() const { return MipsArchVersion == Mips1; }
 103
 104   bool isLittle() const { return IsLittle; }
 105   bool isFP64bit() const { return IsFP64bit; };
 106   bool isGP64bit() const { return IsGP64bit; };
 107   bool isGP32bit() const { return !IsGP64bit; };
 108   bool isSingleFloat() const { return IsSingleFloat; };
 109   bool isNotSingleFloat() const { return !IsSingleFloat; };
 110   bool hasVFPU() const { return HasVFPU; };
 111   bool isLinux() const { return IsLinux; };
 112
 113   /// Features related to the presence of specific instructions.
 114   bool hasSEInReg()   const { return HasSEInReg; };
 115   bool hasCondMov()   const { return HasCondMov; };
 116   bool hasMulDivAdd() const { return HasMulDivAdd; };
 117   bool hasMinMax()    const { return HasMinMax; };
 118   bool hasSwap()      const { return HasSwap; };
 119   bool hasBitCount()  const { return HasBitCount; };
 120 };
 121 } // End llvm namespace
 122
 123 #endif