Fix part 1 of pr4682. PICADD is a 16-bit instruction even in thumb2 mode.
[llvm/avr.git] / lib / Target / SystemZ / SystemZInstrBuilder.h
blob03f708feba19ef2f34eb06906afccbbee7d086a8
1 //===- SystemZInstrBuilder.h - Functions to aid building insts -*- C++ -*-===//
2 //
3 // The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // This file exposes functions that may be used with BuildMI from the
11 // MachineInstrBuilder.h file to handle SystemZ'isms in a clean way.
13 // The BuildMem function may be used with the BuildMI function to add entire
14 // memory references in a single, typed, function call.
16 // For reference, the order of operands for memory references is:
17 // (Operand), Base, Displacement, Index.
19 //===----------------------------------------------------------------------===//
21 #ifndef SYSTEMZINSTRBUILDER_H
22 #define SYSTEMZINSTRBUILDER_H
24 #include "llvm/CodeGen/MachineFrameInfo.h"
25 #include "llvm/CodeGen/MachineInstrBuilder.h"
26 #include "llvm/CodeGen/PseudoSourceValue.h"
28 namespace llvm {
30 /// SystemZAddressMode - This struct holds a generalized full x86 address mode.
31 /// The base register can be a frame index, which will eventually be replaced
32 /// with R15 or R11 and Disp being offsetted accordingly.
33 struct SystemZAddressMode {
34 enum {
35 RegBase,
36 FrameIndexBase
37 } BaseType;
39 union {
40 unsigned Reg;
41 int FrameIndex;
42 } Base;
44 unsigned IndexReg;
45 int32_t Disp;
46 GlobalValue *GV;
48 SystemZAddressMode() : BaseType(RegBase), IndexReg(0), Disp(0) {
49 Base.Reg = 0;
53 /// addDirectMem - This function is used to add a direct memory reference to the
54 /// current instruction -- that is, a dereference of an address in a register,
55 /// with no index or displacement.
56 ///
57 static inline const MachineInstrBuilder &
58 addDirectMem(const MachineInstrBuilder &MIB, unsigned Reg) {
59 // Because memory references are always represented with 3
60 // values, this adds: Reg, [0, NoReg] to the instruction.
61 return MIB.addReg(Reg).addImm(0).addReg(0);
64 static inline const MachineInstrBuilder &
65 addOffset(const MachineInstrBuilder &MIB, int Offset) {
66 return MIB.addImm(Offset).addReg(0);
69 /// addRegOffset - This function is used to add a memory reference of the form
70 /// [Reg + Offset], i.e., one with no or index, but with a
71 /// displacement. An example is: 10(%r15).
72 ///
73 static inline const MachineInstrBuilder &
74 addRegOffset(const MachineInstrBuilder &MIB,
75 unsigned Reg, bool isKill, int Offset) {
76 return addOffset(MIB.addReg(Reg, getKillRegState(isKill)), Offset);
79 /// addRegReg - This function is used to add a memory reference of the form:
80 /// [Reg + Reg].
81 static inline const MachineInstrBuilder &
82 addRegReg(const MachineInstrBuilder &MIB,
83 unsigned Reg1, bool isKill1, unsigned Reg2, bool isKill2) {
84 return MIB.addReg(Reg1, getKillRegState(isKill1)).addImm(0)
85 .addReg(Reg2, getKillRegState(isKill2));
88 static inline const MachineInstrBuilder &
89 addFullAddress(const MachineInstrBuilder &MIB, const SystemZAddressMode &AM) {
90 if (AM.BaseType == SystemZAddressMode::RegBase)
91 MIB.addReg(AM.Base.Reg);
92 else if (AM.BaseType == SystemZAddressMode::FrameIndexBase)
93 MIB.addFrameIndex(AM.Base.FrameIndex);
94 else
95 assert(0);
97 return MIB.addImm(AM.Disp).addReg(AM.IndexReg);
100 /// addFrameReference - This function is used to add a reference to the base of
101 /// an abstract object on the stack frame of the current function. This
102 /// reference has base register as the FrameIndex offset until it is resolved.
103 /// This allows a constant offset to be specified as well...
105 static inline const MachineInstrBuilder &
106 addFrameReference(const MachineInstrBuilder &MIB, int FI, int Offset = 0) {
107 MachineInstr *MI = MIB;
108 MachineFunction &MF = *MI->getParent()->getParent();
109 MachineFrameInfo &MFI = *MF.getFrameInfo();
110 const TargetInstrDesc &TID = MI->getDesc();
111 unsigned Flags = 0;
112 if (TID.mayLoad())
113 Flags |= MachineMemOperand::MOLoad;
114 if (TID.mayStore())
115 Flags |= MachineMemOperand::MOStore;
116 MachineMemOperand MMO(PseudoSourceValue::getFixedStack(FI),
117 Flags,
118 MFI.getObjectOffset(FI) + Offset,
119 MFI.getObjectSize(FI),
120 MFI.getObjectAlignment(FI));
121 return addOffset(MIB.addFrameIndex(FI), Offset)
122 .addMemOperand(MMO);
125 } // End llvm namespace
127 #endif