Fix part 1 of pr4682. PICADD is a 16-bit instruction even in thumb2 mode.
[llvm/avr.git] / lib / Target / X86 / AsmPrinter / X86IntelAsmPrinter.h
blob8f12381ceb4d736ea291011f7007f12a488d1e75
1 //===-- X86IntelAsmPrinter.h - Convert X86 LLVM code to Intel assembly ----===//
2 //
3 // The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // Intel assembly code printer class.
12 //===----------------------------------------------------------------------===//
14 #ifndef X86INTELASMPRINTER_H
15 #define X86INTELASMPRINTER_H
17 #include "../X86.h"
18 #include "../X86MachineFunctionInfo.h"
19 #include "../X86TargetMachine.h"
20 #include "llvm/CodeGen/AsmPrinter.h"
21 #include "llvm/ADT/StringSet.h"
22 #include "llvm/Support/Compiler.h"
23 #include "llvm/Support/FormattedStream.h"
25 namespace llvm {
27 struct VISIBILITY_HIDDEN X86IntelAsmPrinter : public AsmPrinter {
28 explicit X86IntelAsmPrinter(formatted_raw_ostream &O, TargetMachine &TM,
29 const TargetAsmInfo *T, bool V)
30 : AsmPrinter(O, TM, T, V) {}
32 virtual const char *getPassName() const {
33 return "X86 Intel-Style Assembly Printer";
36 /// printInstruction - This method is automatically generated by tablegen
37 /// from the instruction set description. This method returns true if the
38 /// machine instruction was sufficiently described to print it, otherwise it
39 /// returns false.
40 bool printInstruction(const MachineInstr *MI);
42 // This method is used by the tablegen'erated instruction printer.
43 void printOperand(const MachineInstr *MI, unsigned OpNo,
44 const char *Modifier = 0) {
45 const MachineOperand &MO = MI->getOperand(OpNo);
46 if (MO.isReg()) {
47 assert(TargetRegisterInfo::isPhysicalRegister(MO.getReg()) &&
48 "Not physreg??");
49 O << TM.getRegisterInfo()->get(MO.getReg()).Name; // Capitalized names
50 } else {
51 printOp(MO, Modifier);
55 void print_pcrel_imm(const MachineInstr *MI, unsigned OpNo);
58 void printi8mem(const MachineInstr *MI, unsigned OpNo) {
59 O << "BYTE PTR ";
60 printMemReference(MI, OpNo);
62 void printi16mem(const MachineInstr *MI, unsigned OpNo) {
63 O << "WORD PTR ";
64 printMemReference(MI, OpNo);
66 void printi32mem(const MachineInstr *MI, unsigned OpNo) {
67 O << "DWORD PTR ";
68 printMemReference(MI, OpNo);
70 void printi64mem(const MachineInstr *MI, unsigned OpNo) {
71 O << "QWORD PTR ";
72 printMemReference(MI, OpNo);
74 void printi128mem(const MachineInstr *MI, unsigned OpNo) {
75 O << "XMMWORD PTR ";
76 printMemReference(MI, OpNo);
78 void printi256mem(const MachineInstr *MI, unsigned OpNo) {
79 O << "YMMWORD PTR ";
80 printMemReference(MI, OpNo);
82 void printf32mem(const MachineInstr *MI, unsigned OpNo) {
83 O << "DWORD PTR ";
84 printMemReference(MI, OpNo);
86 void printf64mem(const MachineInstr *MI, unsigned OpNo) {
87 O << "QWORD PTR ";
88 printMemReference(MI, OpNo);
90 void printf80mem(const MachineInstr *MI, unsigned OpNo) {
91 O << "XWORD PTR ";
92 printMemReference(MI, OpNo);
94 void printf128mem(const MachineInstr *MI, unsigned OpNo) {
95 O << "XMMWORD PTR ";
96 printMemReference(MI, OpNo);
98 void printf256mem(const MachineInstr *MI, unsigned OpNo) {
99 O << "YMMWORD PTR ";
100 printMemReference(MI, OpNo);
102 void printlea32mem(const MachineInstr *MI, unsigned OpNo) {
103 O << "DWORD PTR ";
104 printLeaMemReference(MI, OpNo);
106 void printlea64mem(const MachineInstr *MI, unsigned OpNo) {
107 O << "QWORD PTR ";
108 printLeaMemReference(MI, OpNo);
110 void printlea64_32mem(const MachineInstr *MI, unsigned OpNo) {
111 O << "QWORD PTR ";
112 printLeaMemReference(MI, OpNo, "subreg64");
115 bool printAsmMRegister(const MachineOperand &MO, const char Mode);
116 bool PrintAsmOperand(const MachineInstr *MI, unsigned OpNo,
117 unsigned AsmVariant, const char *ExtraCode);
118 bool PrintAsmMemoryOperand(const MachineInstr *MI, unsigned OpNo,
119 unsigned AsmVariant, const char *ExtraCode);
120 void printMachineInstruction(const MachineInstr *MI);
121 void printOp(const MachineOperand &MO, const char *Modifier = 0);
122 void printSSECC(const MachineInstr *MI, unsigned Op);
123 void printMemReference(const MachineInstr *MI, unsigned Op,
124 const char *Modifier=NULL);
125 void printLeaMemReference(const MachineInstr *MI, unsigned Op,
126 const char *Modifier=NULL);
127 void printPICJumpTableSetLabel(unsigned uid,
128 const MachineBasicBlock *MBB) const;
129 void printPICJumpTableSetLabel(unsigned uid, unsigned uid2,
130 const MachineBasicBlock *MBB) const {
131 AsmPrinter::printPICJumpTableSetLabel(uid, uid2, MBB);
133 void printPICLabel(const MachineInstr *MI, unsigned Op);
134 bool runOnMachineFunction(MachineFunction &F);
135 bool doInitialization(Module &M);
136 bool doFinalization(Module &M);
138 void PrintGlobalVariable(const GlobalVariable *GV);
140 // We have to propagate some information about MachineFunction to
141 // AsmPrinter. It's ok, when we're printing the function, since we have
142 // access to MachineFunction and can get the appropriate MachineFunctionInfo.
143 // Unfortunately, this is not possible when we're printing reference to
144 // Function (e.g. calling it and so on). Even more, there is no way to get the
145 // corresponding MachineFunctions: it can even be not created at all. That's
146 // why we should use additional structure, when we're collecting all necessary
147 // information.
149 // This structure is using e.g. for name decoration for stdcall & fastcall'ed
150 // function, since we have to use arguments' size for decoration.
151 typedef std::map<const Function*, X86MachineFunctionInfo> FMFInfoMap;
152 FMFInfoMap FunctionInfoMap;
154 void decorateName(std::string& Name, const GlobalValue* GV);
156 virtual void EmitString(const ConstantArray *CVA) const;
158 // Necessary for dllexport support
159 StringSet<> DLLExportedFns, DLLExportedGVs;
162 } // end namespace llvm
164 #endif