1 ; RUN: llvm-as < %s | llc -march=arm -mattr=+neon > %t
2 ; RUN: grep {vaddhn\\.i16} %t | count 1
3 ; RUN: grep {vaddhn\\.i32} %t | count 1
4 ; RUN: grep {vaddhn\\.i64} %t | count 1
6 define <8 x i8> @vaddhni16(<8 x i16>* %A, <8 x i16>* %B) nounwind {
7 %tmp1 = load <8 x i16>* %A
8 %tmp2 = load <8 x i16>* %B
9 %tmp3 = call <8 x i8> @llvm.arm.neon.vaddhn.v8i8(<8 x i16> %tmp1, <8 x i16> %tmp2)
13 define <4 x i16> @vaddhni32(<4 x i32>* %A, <4 x i32>* %B) nounwind {
14 %tmp1 = load <4 x i32>* %A
15 %tmp2 = load <4 x i32>* %B
16 %tmp3 = call <4 x i16> @llvm.arm.neon.vaddhn.v4i16(<4 x i32> %tmp1, <4 x i32> %tmp2)
20 define <2 x i32> @vaddhni64(<2 x i64>* %A, <2 x i64>* %B) nounwind {
21 %tmp1 = load <2 x i64>* %A
22 %tmp2 = load <2 x i64>* %B
23 %tmp3 = call <2 x i32> @llvm.arm.neon.vaddhn.v2i32(<2 x i64> %tmp1, <2 x i64> %tmp2)
27 declare <8 x i8> @llvm.arm.neon.vaddhn.v8i8(<8 x i16>, <8 x i16>) nounwind readnone
28 declare <4 x i16> @llvm.arm.neon.vaddhn.v4i16(<4 x i32>, <4 x i32>) nounwind readnone
29 declare <2 x i32> @llvm.arm.neon.vaddhn.v2i32(<2 x i64>, <2 x i64>) nounwind readnone