1 ; New testcase, this contains a bunch of simple instructions that should be
2 ; handled by a code generator.
4 ; RUN: llvm-as < %s | llc
6 define i32 @add(i32 %A, i32 %B) {
7 %R = add i32 %A, %B ; <i32> [#uses=1]
11 define i32 @sub(i32 %A, i32 %B) {
12 %R = sub i32 %A, %B ; <i32> [#uses=1]
16 define i32 @mul(i32 %A, i32 %B) {
17 %R = mul i32 %A, %B ; <i32> [#uses=1]
21 define i32 @sdiv(i32 %A, i32 %B) {
22 %R = sdiv i32 %A, %B ; <i32> [#uses=1]
26 define i32 @udiv(i32 %A, i32 %B) {
27 %R = udiv i32 %A, %B ; <i32> [#uses=1]
31 define i32 @srem(i32 %A, i32 %B) {
32 %R = srem i32 %A, %B ; <i32> [#uses=1]
36 define i32 @urem(i32 %A, i32 %B) {
37 %R = urem i32 %A, %B ; <i32> [#uses=1]
41 define i32 @and(i32 %A, i32 %B) {
42 %R = and i32 %A, %B ; <i32> [#uses=1]
46 define i32 @or(i32 %A, i32 %B) {
47 %R = or i32 %A, %B ; <i32> [#uses=1]
51 define i32 @xor(i32 %A, i32 %B) {
52 %R = xor i32 %A, %B ; <i32> [#uses=1]