lib/Target/Mips/MipsISelDAGToDAG.cpp

   1 //===-- MipsISelDAGToDAG.cpp - A dag to dag inst selector for Mips --------===//
   2 //
   3 //                     The LLVM Compiler Infrastructure
   4 //
   5 // This file is distributed under the University of Illinois Open Source
   6 // License. See LICENSE.TXT for details.
   7 //
   8 //===----------------------------------------------------------------------===//
   9 //
  10 // This file defines an instruction selector for the MIPS target.
  11 //
  12 //===----------------------------------------------------------------------===//
  13
  14 #define DEBUG_TYPE "mips-isel"
  15 #include "Mips.h"
  16 #include "MipsISelLowering.h"
  17 #include "MipsMachineFunction.h"
  18 #include "MipsRegisterInfo.h"
  19 #include "MipsSubtarget.h"
  20 #include "MipsTargetMachine.h"
  21 #include "llvm/GlobalValue.h"
  22 #include "llvm/Instructions.h"
  23 #include "llvm/Intrinsics.h"
  24 #include "llvm/Support/CFG.h"
  25 #include "llvm/Type.h"
  26 #include "llvm/CodeGen/MachineConstantPool.h"
  27 #include "llvm/CodeGen/MachineFunction.h"
  28 #include "llvm/CodeGen/MachineFrameInfo.h"
  29 #include "llvm/CodeGen/MachineInstrBuilder.h"
  30 #include "llvm/CodeGen/MachineRegisterInfo.h"
  31 #include "llvm/CodeGen/SelectionDAGISel.h"
  32 #include "llvm/Target/TargetMachine.h"
  33 #include "llvm/Support/Compiler.h"
  34 #include "llvm/Support/Debug.h"
  35 #include "llvm/Support/ErrorHandling.h"
  36 #include "llvm/Support/raw_ostream.h"
  37 using namespace llvm;
  38
  39 //===----------------------------------------------------------------------===//
  40 // Instruction Selector Implementation
  41 //===----------------------------------------------------------------------===//
  42
  43 //===----------------------------------------------------------------------===//
  44 // MipsDAGToDAGISel - MIPS specific code to select MIPS machine
  45 // instructions for SelectionDAG operations.
  46 //===----------------------------------------------------------------------===//
  47 namespace {
  48
  49 class VISIBILITY_HIDDEN MipsDAGToDAGISel : public SelectionDAGISel {
  50
  51   /// TM - Keep a reference to MipsTargetMachine.
  52   MipsTargetMachine &TM;
  53
  54   /// Subtarget - Keep a pointer to the MipsSubtarget around so that we can
  55   /// make the right decision when generating code for different targets.
  56   const MipsSubtarget &Subtarget;
  57
  58 public:
  59   explicit MipsDAGToDAGISel(MipsTargetMachine &tm) :
  60   SelectionDAGISel(tm),
  61   TM(tm), Subtarget(tm.getSubtarget<MipsSubtarget>()) {}
  62
  63   virtual void InstructionSelect();
  64
  65   // Pass Name
  66   virtual const char *getPassName() const {
  67     return "MIPS DAG->DAG Pattern Instruction Selection";
  68   }
  69
  70
  71 private:
  72   // Include the pieces autogenerated from the target description.
  73   #include "MipsGenDAGISel.inc"
  74
  75   /// getTargetMachine - Return a reference to the TargetMachine, casted
  76   /// to the target-specific type.
  77   const MipsTargetMachine &getTargetMachine() {
  78     return static_cast<const MipsTargetMachine &>(TM);
  79   }
  80
  81   /// getInstrInfo - Return a reference to the TargetInstrInfo, casted
  82   /// to the target-specific type.
  83   const MipsInstrInfo *getInstrInfo() {
  84     return getTargetMachine().getInstrInfo();
  85   }
  86
  87   SDNode *getGlobalBaseReg();
  88   SDNode *Select(SDValue N);
  89
  90   // Complex Pattern.
  91   bool SelectAddr(SDValue Op, SDValue N,
  92                   SDValue &Base, SDValue &Offset);
  93
  94
  95   // getI32Imm - Return a target constant with the specified
  96   // value, of type i32.
  97   inline SDValue getI32Imm(unsigned Imm) {
  98     return CurDAG->getTargetConstant(Imm, MVT::i32);
  99   }
 100
 101
 102   #ifndef NDEBUG
 103   unsigned Indent;
 104   #endif
 105 };
 106
 107 }
 108
 109 /// InstructionSelect - This callback is invoked by
 110 /// SelectionDAGISel when it has created a SelectionDAG for us to codegen.
 111 void MipsDAGToDAGISel::InstructionSelect() {
 112   DEBUG(BB->dump());
 113   // Codegen the basic block.
 114   DEBUG(errs() << "===== Instruction selection begins:\n");
 115   DEBUG(Indent = 0);
 116
 117   // Select target instructions for the DAG.
 118   SelectRoot(*CurDAG);
 119
 120   DEBUG(errs() << "===== Instruction selection ends:\n");
 121
 122   CurDAG->RemoveDeadNodes();
 123 }
 124
 125 /// getGlobalBaseReg - Output the instructions required to put the
 126 /// GOT address into a register.
 127 SDNode *MipsDAGToDAGISel::getGlobalBaseReg() {
 128   unsigned GlobalBaseReg = getInstrInfo()->getGlobalBaseReg(MF);
 129   return CurDAG->getRegister(GlobalBaseReg, TLI.getPointerTy()).getNode();
 130 }
 131
 132 /// ComplexPattern used on MipsInstrInfo
 133 /// Used on Mips Load/Store instructions
 134 bool MipsDAGToDAGISel::
 135 SelectAddr(SDValue Op, SDValue Addr, SDValue &Offset, SDValue &Base)
 136 {
 137   // if Address is FI, get the TargetFrameIndex.
 138   if (FrameIndexSDNode *FIN = dyn_cast<FrameIndexSDNode>(Addr)) {
 139     Base   = CurDAG->getTargetFrameIndex(FIN->getIndex(), MVT::i32);
 140     Offset = CurDAG->getTargetConstant(0, MVT::i32);
 141     return true;
 142   }
 143
 144   // on PIC code Load GA
 145   if (TM.getRelocationModel() == Reloc::PIC_) {
 146     if ((Addr.getOpcode() == ISD::TargetGlobalAddress) ||
 147         (Addr.getOpcode() == ISD::TargetJumpTable)){
 148       Base   = CurDAG->getRegister(Mips::GP, MVT::i32);
 149       Offset = Addr;
 150       return true;
 151     }
 152   } else {
 153     if ((Addr.getOpcode() == ISD::TargetExternalSymbol ||
 154         Addr.getOpcode() == ISD::TargetGlobalAddress))
 155       return false;
 156   }
 157
 158   // Operand is a result from an ADD.
 159   if (Addr.getOpcode() == ISD::ADD) {
 160     if (ConstantSDNode *CN = dyn_cast<ConstantSDNode>(Addr.getOperand(1))) {
 161       if (Predicate_immSExt16(CN)) {
 162
 163         // If the first operand is a FI, get the TargetFI Node
 164         if (FrameIndexSDNode *FIN = dyn_cast<FrameIndexSDNode>
 165                                     (Addr.getOperand(0))) {
 166           Base = CurDAG->getTargetFrameIndex(FIN->getIndex(), MVT::i32);
 167         } else {
 168           Base = Addr.getOperand(0);
 169         }
 170
 171         Offset = CurDAG->getTargetConstant(CN->getZExtValue(), MVT::i32);
 172         return true;
 173       }
 174     }
 175   }
 176
 177   Base   = Addr;
 178   Offset = CurDAG->getTargetConstant(0, MVT::i32);
 179   return true;
 180 }
 181
 182 /// Select instructions not customized! Used for
 183 /// expanded, promoted and normal instructions
 184 SDNode* MipsDAGToDAGISel::Select(SDValue N) {
 185   SDNode *Node = N.getNode();
 186   unsigned Opcode = Node->getOpcode();
 187   DebugLoc dl = Node->getDebugLoc();
 188
 189   // Dump information about the Node being selected
 190   DEBUG(errs().indent(Indent) << "Selecting: ";
 191         Node->dump(CurDAG);
 192         errs() << "\n");
 193   DEBUG(Indent += 2);
 194
 195   // If we have a custom node, we already have selected!
 196   if (Node->isMachineOpcode()) {
 197     DEBUG(errs().indent(Indent-2) << "== ";
 198           Node->dump(CurDAG);
 199           errs() << "\n");
 200     DEBUG(Indent -= 2);
 201     return NULL;
 202   }
 203
 204   ///
 205   // Instruction Selection not handled by the auto-generated
 206   // tablegen selection should be handled here.
 207   ///
 208   switch(Opcode) {
 209
 210     default: break;
 211
 212     case ISD::SUBE:
 213     case ISD::ADDE: {
 214       SDValue InFlag = Node->getOperand(2), CmpLHS;
 215       unsigned Opc = InFlag.getOpcode(); Opc=Opc;
 216       assert(((Opc == ISD::ADDC || Opc == ISD::ADDE) ||
 217               (Opc == ISD::SUBC || Opc == ISD::SUBE)) &&
 218              "(ADD|SUB)E flag operand must come from (ADD|SUB)C/E insn");
 219
 220       unsigned MOp;
 221       if (Opcode == ISD::ADDE) {
 222         CmpLHS = InFlag.getValue(0);
 223         MOp = Mips::ADDu;
 224       } else {
 225         CmpLHS = InFlag.getOperand(0);
 226         MOp = Mips::SUBu;
 227       }
 228
 229       SDValue Ops[] = { CmpLHS, InFlag.getOperand(1) };
 230
 231       SDValue LHS = Node->getOperand(0);
 232       SDValue RHS = Node->getOperand(1);
 233
 234       EVT VT = LHS.getValueType();
 235       SDNode *Carry = CurDAG->getTargetNode(Mips::SLTu, dl, VT, Ops, 2);
 236       SDNode *AddCarry = CurDAG->getTargetNode(Mips::ADDu, dl, VT,
 237                                                SDValue(Carry,0), RHS);
 238
 239       return CurDAG->SelectNodeTo(N.getNode(), MOp, VT, MVT::Flag,
 240                                   LHS, SDValue(AddCarry,0));
 241     }
 242
 243     /// Mul/Div with two results
 244     case ISD::SDIVREM:
 245     case ISD::UDIVREM:
 246     case ISD::SMUL_LOHI:
 247     case ISD::UMUL_LOHI: {
 248       SDValue Op1 = Node->getOperand(0);
 249       SDValue Op2 = Node->getOperand(1);
 250
 251       unsigned Op;
 252       if (Opcode == ISD::UMUL_LOHI || Opcode == ISD::SMUL_LOHI)
 253         Op = (Opcode == ISD::UMUL_LOHI ? Mips::MULTu : Mips::MULT);
 254       else
 255         Op = (Opcode == ISD::UDIVREM ? Mips::DIVu : Mips::DIV);
 256
 257       SDNode *Node = CurDAG->getTargetNode(Op, dl, MVT::Flag, Op1, Op2);
 258
 259       SDValue InFlag = SDValue(Node, 0);
 260       SDNode *Lo = CurDAG->getTargetNode(Mips::MFLO, dl, MVT::i32,
 261                                          MVT::Flag, InFlag);
 262       InFlag = SDValue(Lo,1);
 263       SDNode *Hi = CurDAG->getTargetNode(Mips::MFHI, dl, MVT::i32, InFlag);
 264
 265       if (!N.getValue(0).use_empty())
 266         ReplaceUses(N.getValue(0), SDValue(Lo,0));
 267
 268       if (!N.getValue(1).use_empty())
 269         ReplaceUses(N.getValue(1), SDValue(Hi,0));
 270
 271       return NULL;
 272     }
 273
 274     /// Special Muls
 275     case ISD::MUL:
 276     case ISD::MULHS:
 277     case ISD::MULHU: {
 278       SDValue MulOp1 = Node->getOperand(0);
 279       SDValue MulOp2 = Node->getOperand(1);
 280
 281       unsigned MulOp  = (Opcode == ISD::MULHU ? Mips::MULTu : Mips::MULT);
 282       SDNode *MulNode = CurDAG->getTargetNode(MulOp, dl,
 283                                               MVT::Flag, MulOp1, MulOp2);
 284
 285       SDValue InFlag = SDValue(MulNode, 0);
 286
 287       if (MulOp == ISD::MUL)
 288         return CurDAG->getTargetNode(Mips::MFLO, dl, MVT::i32, InFlag);
 289       else
 290         return CurDAG->getTargetNode(Mips::MFHI, dl, MVT::i32, InFlag);
 291     }
 292
 293     /// Div/Rem operations
 294     case ISD::SREM:
 295     case ISD::UREM:
 296     case ISD::SDIV:
 297     case ISD::UDIV: {
 298       SDValue Op1 = Node->getOperand(0);
 299       SDValue Op2 = Node->getOperand(1);
 300
 301       unsigned Op, MOp;
 302       if (Opcode == ISD::SDIV || Opcode == ISD::UDIV) {
 303         Op  = (Opcode == ISD::SDIV ? Mips::DIV : Mips::DIVu);
 304         MOp = Mips::MFLO;
 305       } else {
 306         Op  = (Opcode == ISD::SREM ? Mips::DIV : Mips::DIVu);
 307         MOp = Mips::MFHI;
 308       }
 309       SDNode *Node = CurDAG->getTargetNode(Op, dl, MVT::Flag, Op1, Op2);
 310
 311       SDValue InFlag = SDValue(Node, 0);
 312       return CurDAG->getTargetNode(MOp, dl, MVT::i32, InFlag);
 313     }
 314
 315     // Get target GOT address.
 316     case ISD::GLOBAL_OFFSET_TABLE:
 317       return getGlobalBaseReg();
 318
 319     /// Handle direct and indirect calls when using PIC. On PIC, when
 320     /// GOT is smaller than about 64k (small code) the GA target is
 321     /// loaded with only one instruction. Otherwise GA's target must
 322     /// be loaded with 3 instructions.
 323     case MipsISD::JmpLink: {
 324       if (TM.getRelocationModel() == Reloc::PIC_) {
 325         SDValue Chain  = Node->getOperand(0);
 326         SDValue Callee = Node->getOperand(1);
 327         SDValue T9Reg = CurDAG->getRegister(Mips::T9, MVT::i32);
 328         SDValue InFlag(0, 0);
 329
 330         if ( (isa<GlobalAddressSDNode>(Callee)) ||
 331              (isa<ExternalSymbolSDNode>(Callee)) )
 332         {
 333           /// Direct call for global addresses and external symbols
 334           SDValue GPReg = CurDAG->getRegister(Mips::GP, MVT::i32);
 335
 336           // Use load to get GOT target
 337           SDValue Ops[] = { Callee, GPReg, Chain };
 338           SDValue Load = SDValue(CurDAG->getTargetNode(Mips::LW, dl, MVT::i32,
 339                                      MVT::Other, Ops, 3), 0);
 340           Chain = Load.getValue(1);
 341
 342           // Call target must be on T9
 343           Chain = CurDAG->getCopyToReg(Chain, dl, T9Reg, Load, InFlag);
 344         } else
 345           /// Indirect call
 346           Chain = CurDAG->getCopyToReg(Chain, dl, T9Reg, Callee, InFlag);
 347
 348         // Emit Jump and Link Register
 349         SDNode *ResNode = CurDAG->getTargetNode(Mips::JALR, dl, MVT::Other,
 350                                   MVT::Flag, T9Reg, Chain);
 351         Chain  = SDValue(ResNode, 0);
 352         InFlag = SDValue(ResNode, 1);
 353         ReplaceUses(SDValue(Node, 0), Chain);
 354         ReplaceUses(SDValue(Node, 1), InFlag);
 355         return ResNode;
 356       }
 357     }
 358   }
 359
 360   // Select the default instruction
 361   SDNode *ResNode = SelectCode(N);
 362
 363   DEBUG(errs().indent(Indent-2) << "=> ");
 364   if (ResNode == NULL || ResNode == N.getNode())
 365     DEBUG(N.getNode()->dump(CurDAG));
 366   else
 367     DEBUG(ResNode->dump(CurDAG));
 368   DEBUG(errs() << "\n");
 369   DEBUG(Indent -= 2);
 370
 371   return ResNode;
 372 }
 373
 374 /// createMipsISelDag - This pass converts a legalized DAG into a
 375 /// MIPS-specific DAG, ready for instruction scheduling.
 376 FunctionPass *llvm::createMipsISelDag(MipsTargetMachine &TM) {
 377   return new MipsDAGToDAGISel(TM);
 378 }