1 ; This test makes sure that these instructions are properly eliminated.
3 ; RUN: opt < %s -instcombine -S | not grep sh
6 define i32 @test1(i32 %A) {
7 %B = shl i32 %A, 0 ; <i32> [#uses=1]
11 define i32 @test2(i8 %A) {
12 %shift.upgrd.1 = zext i8 %A to i32 ; <i32> [#uses=1]
13 %B = shl i32 0, %shift.upgrd.1 ; <i32> [#uses=1]
17 define i32 @test3(i32 %A) {
18 %B = ashr i32 %A, 0 ; <i32> [#uses=1]
22 define i32 @test4(i8 %A) {
23 %shift.upgrd.2 = zext i8 %A to i32 ; <i32> [#uses=1]
24 %B = ashr i32 0, %shift.upgrd.2 ; <i32> [#uses=1]
29 define i32 @test5(i32 %A) {
30 %B = lshr i32 %A, 32 ;; shift all bits out
34 define i32 @test5a(i32 %A) {
35 %B = shl i32 %A, 32 ;; shift all bits out
39 define i32 @test6(i32 %A) {
40 %B = shl i32 %A, 1 ;; convert to an mul instruction
45 define i32 @test7(i8 %A) {
46 %shift.upgrd.3 = zext i8 %A to i32
47 %B = ashr i32 -1, %shift.upgrd.3 ;; Always equal to -1
51 ;; (A << 5) << 3 === A << 8 == 0
52 define i8 @test8(i8 %A) {
53 %B = shl i8 %A, 5 ; <i8> [#uses=1]
54 %C = shl i8 %B, 3 ; <i8> [#uses=1]
58 ;; (A << 7) >> 7 === A & 1
59 define i8 @test9(i8 %A) {
60 %B = shl i8 %A, 7 ; <i8> [#uses=1]
61 %C = lshr i8 %B, 7 ; <i8> [#uses=1]
65 ;; (A >> 7) << 7 === A & 128
66 define i8 @test10(i8 %A) {
67 %B = lshr i8 %A, 7 ; <i8> [#uses=1]
68 %C = shl i8 %B, 7 ; <i8> [#uses=1]
72 ;; (A >> 3) << 4 === (A & 0x1F) << 1
73 define i8 @test11(i8 %A) {
74 %a = mul i8 %A, 3 ; <i8> [#uses=1]
75 %B = lshr i8 %a, 3 ; <i8> [#uses=1]
76 %C = shl i8 %B, 4 ; <i8> [#uses=1]
80 ;; (A >> 8) << 8 === A & -256
81 define i32 @test12(i32 %A) {
82 %B = ashr i32 %A, 8 ; <i32> [#uses=1]
83 %C = shl i32 %B, 8 ; <i32> [#uses=1]
87 ;; (A >> 3) << 4 === (A & -8) * 2
88 define i8 @test13(i8 %A) {
89 %a = mul i8 %A, 3 ; <i8> [#uses=1]
90 %B = ashr i8 %a, 3 ; <i8> [#uses=1]
91 %C = shl i8 %B, 4 ; <i8> [#uses=1]
95 ;; D = ((B | 1234) << 4) === ((B << 4)|(1234 << 4)
96 define i32 @test14(i32 %A) {
97 %B = lshr i32 %A, 4 ; <i32> [#uses=1]
98 %C = or i32 %B, 1234 ; <i32> [#uses=1]
99 %D = shl i32 %C, 4 ; <i32> [#uses=1]
103 ;; D = ((B | 1234) << 4) === ((B << 4)|(1234 << 4)
104 define i32 @test14a(i32 %A) {
105 %B = shl i32 %A, 4 ; <i32> [#uses=1]
106 %C = and i32 %B, 1234 ; <i32> [#uses=1]
107 %D = lshr i32 %C, 4 ; <i32> [#uses=1]
111 define i32 @test15(i1 %C) {
112 %A = select i1 %C, i32 3, i32 1 ; <i32> [#uses=1]
113 %V = shl i32 %A, 2 ; <i32> [#uses=1]
117 define i32 @test15a(i1 %C) {
118 %A = select i1 %C, i8 3, i8 1 ; <i8> [#uses=1]
119 %shift.upgrd.4 = zext i8 %A to i32 ; <i32> [#uses=1]
120 %V = shl i32 64, %shift.upgrd.4 ; <i32> [#uses=1]
124 define i1 @test16(i32 %X) {
125 %tmp.3 = ashr i32 %X, 4 ; <i32> [#uses=1]
126 %tmp.6 = and i32 %tmp.3, 1 ; <i32> [#uses=1]
127 %tmp.7 = icmp ne i32 %tmp.6, 0 ; <i1> [#uses=1]
131 define i1 @test17(i32 %A) {
132 %B = lshr i32 %A, 3 ; <i32> [#uses=1]
133 %C = icmp eq i32 %B, 1234 ; <i1> [#uses=1]
138 define i1 @test18(i8 %A) {
139 %B = lshr i8 %A, 7 ; <i8> [#uses=1]
141 %C = icmp eq i8 %B, 123 ; <i1> [#uses=1]
145 define i1 @test19(i32 %A) {
146 %B = ashr i32 %A, 2 ; <i32> [#uses=1]
148 %C = icmp eq i32 %B, 0 ; <i1> [#uses=1]
153 define i1 @test19a(i32 %A) {
154 %B = ashr i32 %A, 2 ; <i32> [#uses=1]
156 %C = icmp eq i32 %B, -1 ; <i1> [#uses=1]
160 define i1 @test20(i8 %A) {
161 %B = ashr i8 %A, 7 ; <i8> [#uses=1]
163 %C = icmp eq i8 %B, 123 ; <i1> [#uses=1]
167 define i1 @test21(i8 %A) {
168 %B = shl i8 %A, 4 ; <i8> [#uses=1]
169 %C = icmp eq i8 %B, -128 ; <i1> [#uses=1]
173 define i1 @test22(i8 %A) {
174 %B = shl i8 %A, 4 ; <i8> [#uses=1]
175 %C = icmp eq i8 %B, 0 ; <i1> [#uses=1]
179 define i8 @test23(i32 %A) {
181 %B = shl i32 %A, 24 ; <i32> [#uses=1]
182 %C = ashr i32 %B, 24 ; <i32> [#uses=1]
183 %D = trunc i32 %C to i8 ; <i8> [#uses=1]
187 define i8 @test24(i8 %X) {
188 %Y = and i8 %X, -5 ; <i8> [#uses=1]
189 %Z = shl i8 %Y, 5 ; <i8> [#uses=1]
190 %Q = ashr i8 %Z, 5 ; <i8> [#uses=1]
194 define i32 @test25(i32 %tmp.2, i32 %AA) {
195 %x = lshr i32 %AA, 17 ; <i32> [#uses=1]
196 %tmp.3 = lshr i32 %tmp.2, 17 ; <i32> [#uses=1]
197 %tmp.5 = add i32 %tmp.3, %x ; <i32> [#uses=1]
198 %tmp.6 = shl i32 %tmp.5, 17 ; <i32> [#uses=1]
202 ;; handle casts between shifts.
203 define i32 @test26(i32 %A) {
204 %B = lshr i32 %A, 1 ; <i32> [#uses=1]
205 %C = bitcast i32 %B to i32 ; <i32> [#uses=1]
206 %D = shl i32 %C, 1 ; <i32> [#uses=1]
211 define i1 @test27(i32 %x) nounwind {
213 %z = trunc i32 %y to i1