We're not going to spend 100% of time in interrupts, do we? :)
[llvm/msp430.git] / lib / CodeGen / VirtRegMap.h
blob2e9c899baabb45d20f06a6237e876ecc59113eb5
1 //===-- llvm/CodeGen/VirtRegMap.h - Virtual Register Map -*- C++ -*--------===//
2 //
3 // The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // This file implements a virtual register map. This maps virtual registers to
11 // physical registers and virtual registers to stack slots. It is created and
12 // updated by a register allocator and then used by a machine code rewriter that
13 // adds spill code and rewrites virtual into physical register references.
15 //===----------------------------------------------------------------------===//
17 #ifndef LLVM_CODEGEN_VIRTREGMAP_H
18 #define LLVM_CODEGEN_VIRTREGMAP_H
20 #include "llvm/CodeGen/MachineFunctionPass.h"
21 #include "llvm/Target/TargetRegisterInfo.h"
22 #include "llvm/ADT/BitVector.h"
23 #include "llvm/ADT/IndexedMap.h"
24 #include "llvm/ADT/SmallPtrSet.h"
25 #include "llvm/ADT/SmallVector.h"
26 #include "llvm/Support/Streams.h"
27 #include <map>
29 namespace llvm {
30 class MachineInstr;
31 class MachineFunction;
32 class TargetInstrInfo;
34 class VirtRegMap : public MachineFunctionPass {
35 public:
36 enum {
37 NO_PHYS_REG = 0,
38 NO_STACK_SLOT = (1L << 30)-1,
39 MAX_STACK_SLOT = (1L << 18)-1
42 enum ModRef { isRef = 1, isMod = 2, isModRef = 3 };
43 typedef std::multimap<MachineInstr*,
44 std::pair<unsigned, ModRef> > MI2VirtMapTy;
46 private:
47 const TargetInstrInfo *TII;
49 MachineFunction *MF;
50 /// Virt2PhysMap - This is a virtual to physical register
51 /// mapping. Each virtual register is required to have an entry in
52 /// it; even spilled virtual registers (the register mapped to a
53 /// spilled register is the temporary used to load it from the
54 /// stack).
55 IndexedMap<unsigned, VirtReg2IndexFunctor> Virt2PhysMap;
57 /// Virt2StackSlotMap - This is virtual register to stack slot
58 /// mapping. Each spilled virtual register has an entry in it
59 /// which corresponds to the stack slot this register is spilled
60 /// at.
61 IndexedMap<int, VirtReg2IndexFunctor> Virt2StackSlotMap;
63 /// Virt2ReMatIdMap - This is virtual register to rematerialization id
64 /// mapping. Each spilled virtual register that should be remat'd has an
65 /// entry in it which corresponds to the remat id.
66 IndexedMap<int, VirtReg2IndexFunctor> Virt2ReMatIdMap;
68 /// Virt2SplitMap - This is virtual register to splitted virtual register
69 /// mapping.
70 IndexedMap<unsigned, VirtReg2IndexFunctor> Virt2SplitMap;
72 /// Virt2SplitKillMap - This is splitted virtual register to its last use
73 /// (kill) index mapping.
74 IndexedMap<unsigned> Virt2SplitKillMap;
76 /// ReMatMap - This is virtual register to re-materialized instruction
77 /// mapping. Each virtual register whose definition is going to be
78 /// re-materialized has an entry in it.
79 IndexedMap<MachineInstr*, VirtReg2IndexFunctor> ReMatMap;
81 /// MI2VirtMap - This is MachineInstr to virtual register
82 /// mapping. In the case of memory spill code being folded into
83 /// instructions, we need to know which virtual register was
84 /// read/written by this instruction.
85 MI2VirtMapTy MI2VirtMap;
87 /// SpillPt2VirtMap - This records the virtual registers which should
88 /// be spilled right after the MachineInstr due to live interval
89 /// splitting.
90 std::map<MachineInstr*, std::vector<std::pair<unsigned,bool> > >
91 SpillPt2VirtMap;
93 /// RestorePt2VirtMap - This records the virtual registers which should
94 /// be restored right before the MachineInstr due to live interval
95 /// splitting.
96 std::map<MachineInstr*, std::vector<unsigned> > RestorePt2VirtMap;
98 /// EmergencySpillMap - This records the physical registers that should
99 /// be spilled / restored around the MachineInstr since the register
100 /// allocator has run out of registers.
101 std::map<MachineInstr*, std::vector<unsigned> > EmergencySpillMap;
103 /// EmergencySpillSlots - This records emergency spill slots used to
104 /// spill physical registers when the register allocator runs out of
105 /// registers. Ideally only one stack slot is used per function per
106 /// register class.
107 std::map<const TargetRegisterClass*, int> EmergencySpillSlots;
109 /// ReMatId - Instead of assigning a stack slot to a to be rematerialized
110 /// virtual register, an unique id is being assigned. This keeps track of
111 /// the highest id used so far. Note, this starts at (1<<18) to avoid
112 /// conflicts with stack slot numbers.
113 int ReMatId;
115 /// LowSpillSlot, HighSpillSlot - Lowest and highest spill slot indexes.
116 int LowSpillSlot, HighSpillSlot;
118 /// SpillSlotToUsesMap - Records uses for each register spill slot.
119 SmallVector<SmallPtrSet<MachineInstr*, 4>, 8> SpillSlotToUsesMap;
121 /// ImplicitDefed - One bit for each virtual register. If set it indicates
122 /// the register is implicitly defined.
123 BitVector ImplicitDefed;
125 VirtRegMap(const VirtRegMap&); // DO NOT IMPLEMENT
126 void operator=(const VirtRegMap&); // DO NOT IMPLEMENT
128 public:
129 static char ID;
130 VirtRegMap() : MachineFunctionPass(&ID), Virt2PhysMap(NO_PHYS_REG),
131 Virt2StackSlotMap(NO_STACK_SLOT),
132 Virt2ReMatIdMap(NO_STACK_SLOT), Virt2SplitMap(0),
133 Virt2SplitKillMap(0), ReMatMap(NULL),
134 ReMatId(MAX_STACK_SLOT+1),
135 LowSpillSlot(NO_STACK_SLOT), HighSpillSlot(NO_STACK_SLOT) { }
136 virtual bool runOnMachineFunction(MachineFunction &MF);
138 virtual void getAnalysisUsage(AnalysisUsage &AU) const {
139 AU.setPreservesAll();
140 MachineFunctionPass::getAnalysisUsage(AU);
143 void grow();
145 /// @brief returns true if the specified virtual register is
146 /// mapped to a physical register
147 bool hasPhys(unsigned virtReg) const {
148 return getPhys(virtReg) != NO_PHYS_REG;
151 /// @brief returns the physical register mapped to the specified
152 /// virtual register
153 unsigned getPhys(unsigned virtReg) const {
154 assert(TargetRegisterInfo::isVirtualRegister(virtReg));
155 return Virt2PhysMap[virtReg];
158 /// @brief creates a mapping for the specified virtual register to
159 /// the specified physical register
160 void assignVirt2Phys(unsigned virtReg, unsigned physReg) {
161 assert(TargetRegisterInfo::isVirtualRegister(virtReg) &&
162 TargetRegisterInfo::isPhysicalRegister(physReg));
163 assert(Virt2PhysMap[virtReg] == NO_PHYS_REG &&
164 "attempt to assign physical register to already mapped "
165 "virtual register");
166 Virt2PhysMap[virtReg] = physReg;
169 /// @brief clears the specified virtual register's, physical
170 /// register mapping
171 void clearVirt(unsigned virtReg) {
172 assert(TargetRegisterInfo::isVirtualRegister(virtReg));
173 assert(Virt2PhysMap[virtReg] != NO_PHYS_REG &&
174 "attempt to clear a not assigned virtual register");
175 Virt2PhysMap[virtReg] = NO_PHYS_REG;
178 /// @brief clears all virtual to physical register mappings
179 void clearAllVirt() {
180 Virt2PhysMap.clear();
181 grow();
184 /// @brief records virtReg is a split live interval from SReg.
185 void setIsSplitFromReg(unsigned virtReg, unsigned SReg) {
186 Virt2SplitMap[virtReg] = SReg;
189 /// @brief returns the live interval virtReg is split from.
190 unsigned getPreSplitReg(unsigned virtReg) {
191 return Virt2SplitMap[virtReg];
194 /// @brief returns true if the specified virtual register is not
195 /// mapped to a stack slot or rematerialized.
196 bool isAssignedReg(unsigned virtReg) const {
197 if (getStackSlot(virtReg) == NO_STACK_SLOT &&
198 getReMatId(virtReg) == NO_STACK_SLOT)
199 return true;
200 // Split register can be assigned a physical register as well as a
201 // stack slot or remat id.
202 return (Virt2SplitMap[virtReg] && Virt2PhysMap[virtReg] != NO_PHYS_REG);
205 /// @brief returns the stack slot mapped to the specified virtual
206 /// register
207 int getStackSlot(unsigned virtReg) const {
208 assert(TargetRegisterInfo::isVirtualRegister(virtReg));
209 return Virt2StackSlotMap[virtReg];
212 /// @brief returns the rematerialization id mapped to the specified virtual
213 /// register
214 int getReMatId(unsigned virtReg) const {
215 assert(TargetRegisterInfo::isVirtualRegister(virtReg));
216 return Virt2ReMatIdMap[virtReg];
219 /// @brief create a mapping for the specifed virtual register to
220 /// the next available stack slot
221 int assignVirt2StackSlot(unsigned virtReg);
222 /// @brief create a mapping for the specified virtual register to
223 /// the specified stack slot
224 void assignVirt2StackSlot(unsigned virtReg, int frameIndex);
226 /// @brief assign an unique re-materialization id to the specified
227 /// virtual register.
228 int assignVirtReMatId(unsigned virtReg);
229 /// @brief assign an unique re-materialization id to the specified
230 /// virtual register.
231 void assignVirtReMatId(unsigned virtReg, int id);
233 /// @brief returns true if the specified virtual register is being
234 /// re-materialized.
235 bool isReMaterialized(unsigned virtReg) const {
236 return ReMatMap[virtReg] != NULL;
239 /// @brief returns the original machine instruction being re-issued
240 /// to re-materialize the specified virtual register.
241 MachineInstr *getReMaterializedMI(unsigned virtReg) const {
242 return ReMatMap[virtReg];
245 /// @brief records the specified virtual register will be
246 /// re-materialized and the original instruction which will be re-issed
247 /// for this purpose. If parameter all is true, then all uses of the
248 /// registers are rematerialized and it's safe to delete the definition.
249 void setVirtIsReMaterialized(unsigned virtReg, MachineInstr *def) {
250 ReMatMap[virtReg] = def;
253 /// @brief record the last use (kill) of a split virtual register.
254 void addKillPoint(unsigned virtReg, unsigned index) {
255 Virt2SplitKillMap[virtReg] = index;
258 unsigned getKillPoint(unsigned virtReg) const {
259 return Virt2SplitKillMap[virtReg];
262 /// @brief remove the last use (kill) of a split virtual register.
263 void removeKillPoint(unsigned virtReg) {
264 Virt2SplitKillMap[virtReg] = 0;
267 /// @brief returns true if the specified MachineInstr is a spill point.
268 bool isSpillPt(MachineInstr *Pt) const {
269 return SpillPt2VirtMap.find(Pt) != SpillPt2VirtMap.end();
272 /// @brief returns the virtual registers that should be spilled due to
273 /// splitting right after the specified MachineInstr.
274 std::vector<std::pair<unsigned,bool> > &getSpillPtSpills(MachineInstr *Pt) {
275 return SpillPt2VirtMap[Pt];
278 /// @brief records the specified MachineInstr as a spill point for virtReg.
279 void addSpillPoint(unsigned virtReg, bool isKill, MachineInstr *Pt) {
280 if (SpillPt2VirtMap.find(Pt) != SpillPt2VirtMap.end())
281 SpillPt2VirtMap[Pt].push_back(std::make_pair(virtReg, isKill));
282 else {
283 std::vector<std::pair<unsigned,bool> > Virts;
284 Virts.push_back(std::make_pair(virtReg, isKill));
285 SpillPt2VirtMap.insert(std::make_pair(Pt, Virts));
289 /// @brief - transfer spill point information from one instruction to
290 /// another.
291 void transferSpillPts(MachineInstr *Old, MachineInstr *New) {
292 std::map<MachineInstr*,std::vector<std::pair<unsigned,bool> > >::iterator
293 I = SpillPt2VirtMap.find(Old);
294 if (I == SpillPt2VirtMap.end())
295 return;
296 while (!I->second.empty()) {
297 unsigned virtReg = I->second.back().first;
298 bool isKill = I->second.back().second;
299 I->second.pop_back();
300 addSpillPoint(virtReg, isKill, New);
302 SpillPt2VirtMap.erase(I);
305 /// @brief returns true if the specified MachineInstr is a restore point.
306 bool isRestorePt(MachineInstr *Pt) const {
307 return RestorePt2VirtMap.find(Pt) != RestorePt2VirtMap.end();
310 /// @brief returns the virtual registers that should be restoreed due to
311 /// splitting right after the specified MachineInstr.
312 std::vector<unsigned> &getRestorePtRestores(MachineInstr *Pt) {
313 return RestorePt2VirtMap[Pt];
316 /// @brief records the specified MachineInstr as a restore point for virtReg.
317 void addRestorePoint(unsigned virtReg, MachineInstr *Pt) {
318 if (RestorePt2VirtMap.find(Pt) != RestorePt2VirtMap.end())
319 RestorePt2VirtMap[Pt].push_back(virtReg);
320 else {
321 std::vector<unsigned> Virts;
322 Virts.push_back(virtReg);
323 RestorePt2VirtMap.insert(std::make_pair(Pt, Virts));
327 /// @brief - transfer restore point information from one instruction to
328 /// another.
329 void transferRestorePts(MachineInstr *Old, MachineInstr *New) {
330 std::map<MachineInstr*,std::vector<unsigned> >::iterator I =
331 RestorePt2VirtMap.find(Old);
332 if (I == RestorePt2VirtMap.end())
333 return;
334 while (!I->second.empty()) {
335 unsigned virtReg = I->second.back();
336 I->second.pop_back();
337 addRestorePoint(virtReg, New);
339 RestorePt2VirtMap.erase(I);
342 /// @brief records that the specified physical register must be spilled
343 /// around the specified machine instr.
344 void addEmergencySpill(unsigned PhysReg, MachineInstr *MI) {
345 if (EmergencySpillMap.find(MI) != EmergencySpillMap.end())
346 EmergencySpillMap[MI].push_back(PhysReg);
347 else {
348 std::vector<unsigned> PhysRegs;
349 PhysRegs.push_back(PhysReg);
350 EmergencySpillMap.insert(std::make_pair(MI, PhysRegs));
354 /// @brief returns true if one or more physical registers must be spilled
355 /// around the specified instruction.
356 bool hasEmergencySpills(MachineInstr *MI) const {
357 return EmergencySpillMap.find(MI) != EmergencySpillMap.end();
360 /// @brief returns the physical registers to be spilled and restored around
361 /// the instruction.
362 std::vector<unsigned> &getEmergencySpills(MachineInstr *MI) {
363 return EmergencySpillMap[MI];
366 /// @brief - transfer emergency spill information from one instruction to
367 /// another.
368 void transferEmergencySpills(MachineInstr *Old, MachineInstr *New) {
369 std::map<MachineInstr*,std::vector<unsigned> >::iterator I =
370 EmergencySpillMap.find(Old);
371 if (I == EmergencySpillMap.end())
372 return;
373 while (!I->second.empty()) {
374 unsigned virtReg = I->second.back();
375 I->second.pop_back();
376 addEmergencySpill(virtReg, New);
378 EmergencySpillMap.erase(I);
381 /// @brief return or get a emergency spill slot for the register class.
382 int getEmergencySpillSlot(const TargetRegisterClass *RC);
384 /// @brief Return lowest spill slot index.
385 int getLowSpillSlot() const {
386 return LowSpillSlot;
389 /// @brief Return highest spill slot index.
390 int getHighSpillSlot() const {
391 return HighSpillSlot;
394 /// @brief Records a spill slot use.
395 void addSpillSlotUse(int FrameIndex, MachineInstr *MI);
397 /// @brief Returns true if spill slot has been used.
398 bool isSpillSlotUsed(int FrameIndex) const {
399 assert(FrameIndex >= 0 && "Spill slot index should not be negative!");
400 return !SpillSlotToUsesMap[FrameIndex-LowSpillSlot].empty();
403 /// @brief Mark the specified register as being implicitly defined.
404 void setIsImplicitlyDefined(unsigned VirtReg) {
405 ImplicitDefed.set(VirtReg-TargetRegisterInfo::FirstVirtualRegister);
408 /// @brief Returns true if the virtual register is implicitly defined.
409 bool isImplicitlyDefined(unsigned VirtReg) const {
410 return ImplicitDefed[VirtReg-TargetRegisterInfo::FirstVirtualRegister];
413 /// @brief Updates information about the specified virtual register's value
414 /// folded into newMI machine instruction.
415 void virtFolded(unsigned VirtReg, MachineInstr *OldMI, MachineInstr *NewMI,
416 ModRef MRInfo);
418 /// @brief Updates information about the specified virtual register's value
419 /// folded into the specified machine instruction.
420 void virtFolded(unsigned VirtReg, MachineInstr *MI, ModRef MRInfo);
422 /// @brief returns the virtual registers' values folded in memory
423 /// operands of this instruction
424 std::pair<MI2VirtMapTy::const_iterator, MI2VirtMapTy::const_iterator>
425 getFoldedVirts(MachineInstr* MI) const {
426 return MI2VirtMap.equal_range(MI);
429 /// RemoveMachineInstrFromMaps - MI is being erased, remove it from the
430 /// the folded instruction map and spill point map.
431 void RemoveMachineInstrFromMaps(MachineInstr *MI);
433 void print(std::ostream &OS, const Module* M = 0) const;
434 void print(std::ostream *OS) const { if (OS) print(*OS); }
435 void dump() const;
438 inline std::ostream *operator<<(std::ostream *OS, const VirtRegMap &VRM) {
439 VRM.print(OS);
440 return OS;
442 inline std::ostream &operator<<(std::ostream &OS, const VirtRegMap &VRM) {
443 VRM.print(OS);
444 return OS;
446 } // End llvm namespace
448 #endif