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[llvm/msp430.git] / lib / Target / CellSPU / SPURegisterInfo.h
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1 //===- SPURegisterInfo.h - Cell SPU Register Information Impl ----*- C++ -*-==//
2 //
3 // The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // This file contains the Cell SPU implementation of the TargetRegisterInfo
11 // class.
13 //===----------------------------------------------------------------------===//
15 #ifndef SPU_REGISTERINFO_H
16 #define SPU_REGISTERINFO_H
18 #include "SPU.h"
19 #include "SPUGenRegisterInfo.h.inc"
21 namespace llvm {
22 class SPUSubtarget;
23 class TargetInstrInfo;
24 class Type;
26 class SPURegisterInfo : public SPUGenRegisterInfo {
27 private:
28 const SPUSubtarget &Subtarget;
29 const TargetInstrInfo &TII;
31 //! Predicate: Does the machine function use the link register?
32 bool usesLR(MachineFunction &MF) const;
34 public:
35 SPURegisterInfo(const SPUSubtarget &subtarget, const TargetInstrInfo &tii);
37 //! Translate a register's enum value to a register number
38 /*!
39 This method translates a register's enum value to it's regiser number,
40 e.g. SPU::R14 -> 14.
42 static unsigned getRegisterNumbering(unsigned RegEnum);
44 /// getPointerRegClass - Return the register class to use to hold pointers.
45 /// This is used for addressing modes.
46 virtual const TargetRegisterClass *getPointerRegClass() const;
48 //! Return the array of callee-saved registers
49 virtual const unsigned* getCalleeSavedRegs(const MachineFunction *MF) const;
51 //! Return the register class array of the callee-saved registers
52 virtual const TargetRegisterClass* const *
53 getCalleeSavedRegClasses(const MachineFunction *MF) const;
55 //! Return the reserved registers
56 BitVector getReservedRegs(const MachineFunction &MF) const;
58 //! Prediate: Target has dedicated frame pointer
59 bool hasFP(const MachineFunction &MF) const;
60 //! Eliminate the call frame setup pseudo-instructions
61 void eliminateCallFramePseudoInstr(MachineFunction &MF,
62 MachineBasicBlock &MBB,
63 MachineBasicBlock::iterator I) const;
64 //! Convert frame indicies into machine operands
65 void eliminateFrameIndex(MachineBasicBlock::iterator II, int,
66 RegScavenger *RS) const;
67 //! Determine the frame's layour
68 void determineFrameLayout(MachineFunction &MF) const;
70 void processFunctionBeforeCalleeSavedScan(MachineFunction &MF,
71 RegScavenger *RS = NULL) const;
72 //! Emit the function prologue
73 void emitPrologue(MachineFunction &MF) const;
74 //! Emit the function epilogue
75 void emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const;
76 //! Get return address register (LR, aka R0)
77 unsigned getRARegister() const;
78 //! Get the stack frame register (SP, aka R1)
79 unsigned getFrameRegister(MachineFunction &MF) const;
80 //! Perform target-specific stack frame setup.
81 void getInitialFrameState(std::vector<MachineMove> &Moves) const;
83 //------------------------------------------------------------------------
84 // New methods added:
85 //------------------------------------------------------------------------
87 //! Return the array of argument passing registers
88 /*!
89 \note The size of this array is returned by getArgRegsSize().
91 static const unsigned *getArgRegs();
93 //! Return the size of the argument passing register array
94 static unsigned getNumArgRegs();
96 //! Get DWARF debugging register number
97 int getDwarfRegNum(unsigned RegNum, bool isEH) const;
99 } // end namespace llvm
101 #endif