lib/Target/Mips/MipsISelDAGToDAG.cpp

   1 //===-- MipsISelDAGToDAG.cpp - A dag to dag inst selector for Mips --------===//
   2 //
   3 //                     The LLVM Compiler Infrastructure
   4 //
   5 // This file is distributed under the University of Illinois Open Source
   6 // License. See LICENSE.TXT for details.
   7 //
   8 //===----------------------------------------------------------------------===//
   9 //
  10 // This file defines an instruction selector for the MIPS target.
  11 //
  12 //===----------------------------------------------------------------------===//
  13
  14 #define DEBUG_TYPE "mips-isel"
  15 #include "Mips.h"
  16 #include "MipsISelLowering.h"
  17 #include "MipsMachineFunction.h"
  18 #include "MipsRegisterInfo.h"
  19 #include "MipsSubtarget.h"
  20 #include "MipsTargetMachine.h"
  21 #include "llvm/GlobalValue.h"
  22 #include "llvm/Instructions.h"
  23 #include "llvm/Intrinsics.h"
  24 #include "llvm/Support/CFG.h"
  25 #include "llvm/Type.h"
  26 #include "llvm/CodeGen/MachineConstantPool.h"
  27 #include "llvm/CodeGen/MachineFunction.h"
  28 #include "llvm/CodeGen/MachineFrameInfo.h"
  29 #include "llvm/CodeGen/MachineInstrBuilder.h"
  30 #include "llvm/CodeGen/MachineRegisterInfo.h"
  31 #include "llvm/CodeGen/SelectionDAGISel.h"
  32 #include "llvm/Target/TargetMachine.h"
  33 #include "llvm/Support/Compiler.h"
  34 #include "llvm/Support/Debug.h"
  35 using namespace llvm;
  36
  37 //===----------------------------------------------------------------------===//
  38 // Instruction Selector Implementation
  39 //===----------------------------------------------------------------------===//
  40
  41 //===----------------------------------------------------------------------===//
  42 // MipsDAGToDAGISel - MIPS specific code to select MIPS machine
  43 // instructions for SelectionDAG operations.
  44 //===----------------------------------------------------------------------===//
  45 namespace {
  46
  47 class VISIBILITY_HIDDEN MipsDAGToDAGISel : public SelectionDAGISel {
  48
  49   /// TM - Keep a reference to MipsTargetMachine.
  50   MipsTargetMachine &TM;
  51
  52   /// Subtarget - Keep a pointer to the MipsSubtarget around so that we can
  53   /// make the right decision when generating code for different targets.
  54   const MipsSubtarget &Subtarget;
  55
  56 public:
  57   explicit MipsDAGToDAGISel(MipsTargetMachine &tm) :
  58   SelectionDAGISel(tm),
  59   TM(tm), Subtarget(tm.getSubtarget<MipsSubtarget>()) {}
  60
  61   virtual void InstructionSelect();
  62
  63   // Pass Name
  64   virtual const char *getPassName() const {
  65     return "MIPS DAG->DAG Pattern Instruction Selection";
  66   }
  67
  68
  69 private:
  70   // Include the pieces autogenerated from the target description.
  71   #include "MipsGenDAGISel.inc"
  72
  73   SDValue getGlobalBaseReg();
  74   SDNode *Select(SDValue N);
  75
  76   // Complex Pattern.
  77   bool SelectAddr(SDValue Op, SDValue N,
  78                   SDValue &Base, SDValue &Offset);
  79
  80
  81   // getI32Imm - Return a target constant with the specified
  82   // value, of type i32.
  83   inline SDValue getI32Imm(unsigned Imm) {
  84     return CurDAG->getTargetConstant(Imm, MVT::i32);
  85   }
  86
  87
  88   #ifndef NDEBUG
  89   unsigned Indent;
  90   #endif
  91 };
  92
  93 }
  94
  95 /// InstructionSelect - This callback is invoked by
  96 /// SelectionDAGISel when it has created a SelectionDAG for us to codegen.
  97 void MipsDAGToDAGISel::
  98 InstructionSelect()
  99 {
 100   DEBUG(BB->dump());
 101   // Codegen the basic block.
 102   #ifndef NDEBUG
 103   DOUT << "===== Instruction selection begins:\n";
 104   Indent = 0;
 105   #endif
 106
 107   // Select target instructions for the DAG.
 108   SelectRoot(*CurDAG);
 109
 110   #ifndef NDEBUG
 111   DOUT << "===== Instruction selection ends:\n";
 112   #endif
 113
 114   CurDAG->RemoveDeadNodes();
 115 }
 116
 117 /// getGlobalBaseReg - Output the instructions required to put the
 118 /// GOT address into a register.
 119 SDValue MipsDAGToDAGISel::getGlobalBaseReg() {
 120   MachineFunction* MF = BB->getParent();
 121   unsigned GP = 0;
 122   for(MachineRegisterInfo::livein_iterator ii = MF->getRegInfo().livein_begin(),
 123         ee = MF->getRegInfo().livein_end(); ii != ee; ++ii)
 124     if (ii->first == Mips::GP) {
 125       GP = ii->second;
 126       break;
 127     }
 128   assert(GP && "GOT PTR not in liveins");
 129   // FIXME is there a sensible place to get debug info for this?
 130   return CurDAG->getCopyFromReg(CurDAG->getEntryNode(),
 131                                 DebugLoc::getUnknownLoc(), GP, MVT::i32);
 132 }
 133
 134 /// ComplexPattern used on MipsInstrInfo
 135 /// Used on Mips Load/Store instructions
 136 bool MipsDAGToDAGISel::
 137 SelectAddr(SDValue Op, SDValue Addr, SDValue &Offset, SDValue &Base)
 138 {
 139   // if Address is FI, get the TargetFrameIndex.
 140   if (FrameIndexSDNode *FIN = dyn_cast<FrameIndexSDNode>(Addr)) {
 141     Base   = CurDAG->getTargetFrameIndex(FIN->getIndex(), MVT::i32);
 142     Offset = CurDAG->getTargetConstant(0, MVT::i32);
 143     return true;
 144   }
 145
 146   // on PIC code Load GA
 147   if (TM.getRelocationModel() == Reloc::PIC_) {
 148     if ((Addr.getOpcode() == ISD::TargetGlobalAddress) ||
 149         (Addr.getOpcode() == ISD::TargetJumpTable)){
 150       Base   = CurDAG->getRegister(Mips::GP, MVT::i32);
 151       Offset = Addr;
 152       return true;
 153     }
 154   } else {
 155     if ((Addr.getOpcode() == ISD::TargetExternalSymbol ||
 156         Addr.getOpcode() == ISD::TargetGlobalAddress))
 157       return false;
 158   }
 159
 160   // Operand is a result from an ADD.
 161   if (Addr.getOpcode() == ISD::ADD) {
 162     if (ConstantSDNode *CN = dyn_cast<ConstantSDNode>(Addr.getOperand(1))) {
 163       if (Predicate_immSExt16(CN)) {
 164
 165         // If the first operand is a FI, get the TargetFI Node
 166         if (FrameIndexSDNode *FIN = dyn_cast<FrameIndexSDNode>
 167                                     (Addr.getOperand(0))) {
 168           Base = CurDAG->getTargetFrameIndex(FIN->getIndex(), MVT::i32);
 169         } else {
 170           Base = Addr.getOperand(0);
 171         }
 172
 173         Offset = CurDAG->getTargetConstant(CN->getZExtValue(), MVT::i32);
 174         return true;
 175       }
 176     }
 177   }
 178
 179   Base   = Addr;
 180   Offset = CurDAG->getTargetConstant(0, MVT::i32);
 181   return true;
 182 }
 183
 184 /// Select instructions not customized! Used for
 185 /// expanded, promoted and normal instructions
 186 SDNode* MipsDAGToDAGISel::
 187 Select(SDValue N)
 188 {
 189   SDNode *Node = N.getNode();
 190   unsigned Opcode = Node->getOpcode();
 191   DebugLoc dl = Node->getDebugLoc();
 192
 193   // Dump information about the Node being selected
 194   #ifndef NDEBUG
 195   DOUT << std::string(Indent, ' ') << "Selecting: ";
 196   DEBUG(Node->dump(CurDAG));
 197   DOUT << "\n";
 198   Indent += 2;
 199   #endif
 200
 201   // If we have a custom node, we already have selected!
 202   if (Node->isMachineOpcode()) {
 203     #ifndef NDEBUG
 204     DOUT << std::string(Indent-2, ' ') << "== ";
 205     DEBUG(Node->dump(CurDAG));
 206     DOUT << "\n";
 207     Indent -= 2;
 208     #endif
 209     return NULL;
 210   }
 211
 212   ///
 213   // Instruction Selection not handled by the auto-generated
 214   // tablegen selection should be handled here.
 215   ///
 216   switch(Opcode) {
 217
 218     default: break;
 219
 220     case ISD::SUBE:
 221     case ISD::ADDE: {
 222       SDValue InFlag = Node->getOperand(2), CmpLHS;
 223       unsigned Opc = InFlag.getOpcode(); Opc=Opc;
 224       assert(((Opc == ISD::ADDC || Opc == ISD::ADDE) ||
 225               (Opc == ISD::SUBC || Opc == ISD::SUBE)) &&
 226              "(ADD|SUB)E flag operand must come from (ADD|SUB)C/E insn");
 227
 228       unsigned MOp;
 229       if (Opcode == ISD::ADDE) {
 230         CmpLHS = InFlag.getValue(0);
 231         MOp = Mips::ADDu;
 232       } else {
 233         CmpLHS = InFlag.getOperand(0);
 234         MOp = Mips::SUBu;
 235       }
 236
 237       SDValue Ops[] = { CmpLHS, InFlag.getOperand(1) };
 238
 239       SDValue LHS = Node->getOperand(0);
 240       SDValue RHS = Node->getOperand(1);
 241
 242       MVT VT = LHS.getValueType();
 243       SDNode *Carry = CurDAG->getTargetNode(Mips::SLTu, dl, VT, Ops, 2);
 244       SDNode *AddCarry = CurDAG->getTargetNode(Mips::ADDu, dl, VT,
 245                                                SDValue(Carry,0), RHS);
 246
 247       return CurDAG->SelectNodeTo(N.getNode(), MOp, VT, MVT::Flag,
 248                                   LHS, SDValue(AddCarry,0));
 249     }
 250
 251     /// Mul/Div with two results
 252     case ISD::SDIVREM:
 253     case ISD::UDIVREM:
 254     case ISD::SMUL_LOHI:
 255     case ISD::UMUL_LOHI: {
 256       SDValue Op1 = Node->getOperand(0);
 257       SDValue Op2 = Node->getOperand(1);
 258
 259       unsigned Op;
 260       if (Opcode == ISD::UMUL_LOHI || Opcode == ISD::SMUL_LOHI)
 261         Op = (Opcode == ISD::UMUL_LOHI ? Mips::MULTu : Mips::MULT);
 262       else
 263         Op = (Opcode == ISD::UDIVREM ? Mips::DIVu : Mips::DIV);
 264
 265       SDNode *Node = CurDAG->getTargetNode(Op, dl, MVT::Flag, Op1, Op2);
 266
 267       SDValue InFlag = SDValue(Node, 0);
 268       SDNode *Lo = CurDAG->getTargetNode(Mips::MFLO, dl, MVT::i32,
 269                                          MVT::Flag, InFlag);
 270       InFlag = SDValue(Lo,1);
 271       SDNode *Hi = CurDAG->getTargetNode(Mips::MFHI, dl, MVT::i32, InFlag);
 272
 273       if (!N.getValue(0).use_empty())
 274         ReplaceUses(N.getValue(0), SDValue(Lo,0));
 275
 276       if (!N.getValue(1).use_empty())
 277         ReplaceUses(N.getValue(1), SDValue(Hi,0));
 278
 279       return NULL;
 280     }
 281
 282     /// Special Muls
 283     case ISD::MUL:
 284     case ISD::MULHS:
 285     case ISD::MULHU: {
 286       SDValue MulOp1 = Node->getOperand(0);
 287       SDValue MulOp2 = Node->getOperand(1);
 288
 289       unsigned MulOp  = (Opcode == ISD::MULHU ? Mips::MULTu : Mips::MULT);
 290       SDNode *MulNode = CurDAG->getTargetNode(MulOp, dl,
 291                                               MVT::Flag, MulOp1, MulOp2);
 292
 293       SDValue InFlag = SDValue(MulNode, 0);
 294
 295       if (MulOp == ISD::MUL)
 296         return CurDAG->getTargetNode(Mips::MFLO, dl, MVT::i32, InFlag);
 297       else
 298         return CurDAG->getTargetNode(Mips::MFHI, dl, MVT::i32, InFlag);
 299     }
 300
 301     /// Div/Rem operations
 302     case ISD::SREM:
 303     case ISD::UREM:
 304     case ISD::SDIV:
 305     case ISD::UDIV: {
 306       SDValue Op1 = Node->getOperand(0);
 307       SDValue Op2 = Node->getOperand(1);
 308
 309       unsigned Op, MOp;
 310       if (Opcode == ISD::SDIV || Opcode == ISD::UDIV) {
 311         Op  = (Opcode == ISD::SDIV ? Mips::DIV : Mips::DIVu);
 312         MOp = Mips::MFLO;
 313       } else {
 314         Op  = (Opcode == ISD::SREM ? Mips::DIV : Mips::DIVu);
 315         MOp = Mips::MFHI;
 316       }
 317       SDNode *Node = CurDAG->getTargetNode(Op, dl, MVT::Flag, Op1, Op2);
 318
 319       SDValue InFlag = SDValue(Node, 0);
 320       return CurDAG->getTargetNode(MOp, dl, MVT::i32, InFlag);
 321     }
 322
 323     // Get target GOT address.
 324     case ISD::GLOBAL_OFFSET_TABLE: {
 325       SDValue Result = getGlobalBaseReg();
 326       ReplaceUses(N, Result);
 327       return NULL;
 328     }
 329
 330     /// Handle direct and indirect calls when using PIC. On PIC, when
 331     /// GOT is smaller than about 64k (small code) the GA target is
 332     /// loaded with only one instruction. Otherwise GA's target must
 333     /// be loaded with 3 instructions.
 334     case MipsISD::JmpLink: {
 335       if (TM.getRelocationModel() == Reloc::PIC_) {
 336         //bool isCodeLarge = (TM.getCodeModel() == CodeModel::Large);
 337         SDValue Chain  = Node->getOperand(0);
 338         SDValue Callee = Node->getOperand(1);
 339         SDValue T9Reg = CurDAG->getRegister(Mips::T9, MVT::i32);
 340         SDValue InFlag(0, 0);
 341
 342         if ( (isa<GlobalAddressSDNode>(Callee)) ||
 343              (isa<ExternalSymbolSDNode>(Callee)) )
 344         {
 345           /// Direct call for global addresses and external symbols
 346           SDValue GPReg = CurDAG->getRegister(Mips::GP, MVT::i32);
 347
 348           // Use load to get GOT target
 349           SDValue Ops[] = { Callee, GPReg, Chain };
 350           SDValue Load = SDValue(CurDAG->getTargetNode(Mips::LW, dl, MVT::i32,
 351                                      MVT::Other, Ops, 3), 0);
 352           Chain = Load.getValue(1);
 353
 354           // Call target must be on T9
 355           Chain = CurDAG->getCopyToReg(Chain, dl, T9Reg, Load, InFlag);
 356         } else
 357           /// Indirect call
 358           Chain = CurDAG->getCopyToReg(Chain, dl, T9Reg, Callee, InFlag);
 359
 360         // Emit Jump and Link Register
 361         SDNode *ResNode = CurDAG->getTargetNode(Mips::JALR, dl, MVT::Other,
 362                                   MVT::Flag, T9Reg, Chain);
 363         Chain  = SDValue(ResNode, 0);
 364         InFlag = SDValue(ResNode, 1);
 365         ReplaceUses(SDValue(Node, 0), Chain);
 366         ReplaceUses(SDValue(Node, 1), InFlag);
 367         return ResNode;
 368       }
 369     }
 370   }
 371
 372   // Select the default instruction
 373   SDNode *ResNode = SelectCode(N);
 374
 375   #ifndef NDEBUG
 376   DOUT << std::string(Indent-2, ' ') << "=> ";
 377   if (ResNode == NULL || ResNode == N.getNode())
 378     DEBUG(N.getNode()->dump(CurDAG));
 379   else
 380     DEBUG(ResNode->dump(CurDAG));
 381   DOUT << "\n";
 382   Indent -= 2;
 383   #endif
 384
 385   return ResNode;
 386 }
 387
 388 /// createMipsISelDag - This pass converts a legalized DAG into a
 389 /// MIPS-specific DAG, ready for instruction scheduling.
 390 FunctionPass *llvm::createMipsISelDag(MipsTargetMachine &TM) {
 391   return new MipsDAGToDAGISel(TM);
 392 }