1 //===-- PIC16ISelLowering.h - PIC16 DAG Lowering Interface ------*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file defines the interfaces that PIC16 uses to lower LLVM code into a
13 //===----------------------------------------------------------------------===//
15 #ifndef PIC16ISELLOWERING_H
16 #define PIC16ISELLOWERING_H
19 #include "PIC16Subtarget.h"
20 #include "llvm/CodeGen/SelectionDAG.h"
21 #include "llvm/Target/TargetLowering.h"
27 // Start the numbering from where ISD NodeType finishes.
28 FIRST_NUMBER
= ISD::BUILTIN_OP_END
,
30 Lo
, // Low 8-bits of GlobalAddress.
31 Hi
, // High 8-bits of GlobalAddress.
33 PIC16LdArg
, // This is replica of PIC16Load but used to load function
34 // arguments and is being used for facilitating for some
35 // store removal optimizations.
41 MTLO
, // Move to low part of FSR
42 MTHI
, // Move to high part of FSR
43 MTPCLATH
, // Move to PCLATCH
44 PIC16Connect
, // General connector for PIC16 nodes
46 LSLF
, // PIC16 Logical shift left
47 LRLF
, // PIC16 Logical shift right
48 RLF
, // Rotate left through carry
49 RRF
, // Rotate right through carry
50 CALL
, // PIC16 Call instruction
51 CALLW
, // PIC16 CALLW instruction
52 SUBCC
, // Compare for equality or inequality.
53 SELECT_ICC
, // Psuedo to be caught in schedular and expanded to brcond.
54 BRCOND
, // Conditional branch.
58 // Keep track of different address spaces.
60 RAM_SPACE
= 0, // RAM address space
61 ROM_SPACE
= 1 // ROM address space number is 1
73 //===--------------------------------------------------------------------===//
74 // TargetLowering Implementation
75 //===--------------------------------------------------------------------===//
76 class PIC16TargetLowering
: public TargetLowering
{
78 explicit PIC16TargetLowering(PIC16TargetMachine
&TM
);
80 /// getTargetNodeName - This method returns the name of a target specific
82 virtual const char *getTargetNodeName(unsigned Opcode
) const;
83 /// getSetCCResultType - Return the ISD::SETCC ValueType
84 virtual MVT
getSetCCResultType(MVT ValType
) const;
85 SDValue
LowerFORMAL_ARGUMENTS(SDValue Op
, SelectionDAG
&DAG
);
86 SDValue
LowerShift(SDValue Op
, SelectionDAG
&DAG
);
87 SDValue
LowerADD(SDValue Op
, SelectionDAG
&DAG
);
88 SDValue
LowerSUB(SDValue Op
, SelectionDAG
&DAG
);
89 SDValue
LowerBinOp(SDValue Op
, SelectionDAG
&DAG
);
90 SDValue
LowerCALL(SDValue Op
, SelectionDAG
&DAG
);
91 SDValue
LowerRET(SDValue Op
, SelectionDAG
&DAG
);
94 LowerDirectCallReturn(SDValue Op
, SDValue Chain
, SDValue FrameAddress
,
95 SDValue InFlag
, SelectionDAG
&DAG
);
97 LowerIndirectCallReturn(SDValue Op
, SDValue Chain
, SDValue InFlag
,
98 SDValue DataAddr_Lo
, SDValue DataAddr_Hi
,
103 LowerDirectCallArguments(SDValue Op
, SDValue Chain
, SDValue FrameAddress
,
104 SDValue InFlag
, SelectionDAG
&DAG
);
107 LowerIndirectCallArguments(SDValue Op
, SDValue Chain
, SDValue InFlag
,
108 SDValue DataAddr_Lo
, SDValue DataAddr_Hi
,
111 SDValue
LowerBR_CC(SDValue Op
, SelectionDAG
&DAG
);
112 SDValue
LowerSELECT_CC(SDValue Op
, SelectionDAG
&DAG
);
113 SDValue
getPIC16Cmp(SDValue LHS
, SDValue RHS
, unsigned OrigCC
, SDValue
&CC
,
114 SelectionDAG
&DAG
, DebugLoc dl
);
115 virtual MachineBasicBlock
*EmitInstrWithCustomInserter(MachineInstr
*MI
,
116 MachineBasicBlock
*MBB
) const;
119 virtual SDValue
LowerOperation(SDValue Op
, SelectionDAG
&DAG
);
120 virtual void ReplaceNodeResults(SDNode
*N
,
121 SmallVectorImpl
<SDValue
> &Results
,
123 virtual void LowerOperationWrapper(SDNode
*N
,
124 SmallVectorImpl
<SDValue
> &Results
,
127 SDValue
ExpandStore(SDNode
*N
, SelectionDAG
&DAG
);
128 SDValue
ExpandLoad(SDNode
*N
, SelectionDAG
&DAG
);
129 SDValue
ExpandGlobalAddress(SDNode
*N
, SelectionDAG
&DAG
);
130 SDValue
ExpandExternalSymbol(SDNode
*N
, SelectionDAG
&DAG
);
131 SDValue
ExpandFrameIndex(SDNode
*N
, SelectionDAG
&DAG
);
133 SDValue
PerformDAGCombine(SDNode
*N
, DAGCombinerInfo
&DCI
) const;
134 SDValue
PerformPIC16LoadCombine(SDNode
*N
, DAGCombinerInfo
&DCI
) const;
135 SDValue
PerformStoreCombine(SDNode
*N
, DAGCombinerInfo
&DCI
) const;
137 // This function returns the Tmp Offset for FrameIndex. If any TmpOffset
138 // already exists for the FI then it returns the same else it creates the
139 // new offset and returns.
140 unsigned GetTmpOffsetForFI(unsigned FI
, unsigned slot_size
);
141 void ResetTmpOffsetMap() { FiTmpOffsetMap
.clear(); SetTmpSize(0); }
142 void InitReservedFrameCount(const Function
*F
);
144 // Return the size of Tmp variable
145 unsigned GetTmpSize() { return TmpSize
; }
146 void SetTmpSize(unsigned Size
) { TmpSize
= Size
; }
149 // If the Node is a BUILD_PAIR representing a direct Address,
150 // then this function will return true.
151 bool isDirectAddress(const SDValue
&Op
);
153 // If the Node is a DirectAddress in ROM_SPACE then this
154 // function will return true
155 bool isRomAddress(const SDValue
&Op
);
157 // Extract the Lo and Hi component of Op.
158 void GetExpandedParts(SDValue Op
, SelectionDAG
&DAG
, SDValue
&Lo
,
162 // Load pointer can be a direct or indirect address. In PIC16 direct
163 // addresses need Banksel and Indirect addresses need to be loaded to
164 // FSR first. Handle address specific cases here.
165 void LegalizeAddress(SDValue Ptr
, SelectionDAG
&DAG
, SDValue
&Chain
,
166 SDValue
&NewPtr
, unsigned &Offset
, DebugLoc dl
);
168 // FrameIndex should be broken down into ExternalSymbol and FrameOffset.
169 void LegalizeFrameIndex(SDValue Op
, SelectionDAG
&DAG
, SDValue
&ES
,
173 // CALL node should have all legal operands only. Legalize all non-legal
174 // operands of CALL node and then return the new call will all operands
176 SDValue
LegalizeCALL(SDValue Op
, SelectionDAG
&DAG
);
178 // For indirect calls data address of the callee frame need to be
179 // extracted. This function fills the arguments DataAddr_Lo and
180 // DataAddr_Hi with the address of the callee frame.
181 void GetDataAddress(DebugLoc dl
, SDValue Callee
, SDValue
&Chain
,
182 SDValue
&DataAddr_Lo
, SDValue
&DataAddr_Hi
,
185 // We can not have both operands of a binary operation in W.
186 // This function is used to put one operand on stack and generate a load.
187 SDValue
ConvertToMemOperand(SDValue Op
, SelectionDAG
&DAG
, DebugLoc dl
);
189 // This function checks if we need to put an operand of an operation on
190 // stack and generate a load or not.
191 bool NeedToConvertToMemOp(SDValue Op
, unsigned &MemOp
);
193 /// Subtarget - Keep a pointer to the PIC16Subtarget around so that we can
194 /// make the right decision when generating code for different targets.
195 const PIC16Subtarget
*Subtarget
;
198 // Extending the LIB Call framework of LLVM
199 // to hold the names of PIC16Libcalls.
200 const char *PIC16LibcallNames
[PIC16ISD::PIC16UnknownCall
];
202 // To set and retrieve the lib call names.
203 void setPIC16LibcallName(PIC16ISD::PIC16Libcall Call
, const char *Name
);
204 const char *getPIC16LibcallName(PIC16ISD::PIC16Libcall Call
);
206 // Make PIC16 Libcall.
207 SDValue
MakePIC16Libcall(PIC16ISD::PIC16Libcall Call
, MVT RetVT
,
208 const SDValue
*Ops
, unsigned NumOps
, bool isSigned
,
209 SelectionDAG
&DAG
, DebugLoc dl
);
211 // Check if operation has a direct load operand.
212 inline bool isDirectLoad(const SDValue Op
);
215 // The frameindexes generated for spill/reload are stack based.
216 // This maps maintain zero based indexes for these FIs.
217 std::map
<unsigned, unsigned> FiTmpOffsetMap
;
220 // These are the frames for return value and argument passing
221 // These FrameIndices will be expanded to foo.frame external symbol
222 // and all others will be expanded to foo.tmp external symbol.
223 unsigned ReservedFrameCount
;
227 #endif // PIC16ISELLOWERING_H