1 //===- PowerPCInstrFormats.td - PowerPC Instruction Formats --*- tablegen -*-=//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 //===----------------------------------------------------------------------===//
12 // PowerPC instruction formats
14 class I<bits<6> opcode, dag OOL, dag IOL, string asmstr, InstrItinClass itin>
18 bit PPC64 = 0; // Default value, override with isPPC64
20 let Namespace = "PPC";
21 let Inst{0-5} = opcode;
22 let OutOperandList = OOL;
23 let InOperandList = IOL;
24 let AsmString = asmstr;
27 /// These fields correspond to the fields in PPCInstrInfo.h. Any changes to
28 /// these must be reflected there! See comments there for what these are.
29 bits<1> PPC970_First = 0;
30 bits<1> PPC970_Single = 0;
31 bits<1> PPC970_Cracked = 0;
32 bits<3> PPC970_Unit = 0;
35 class PPC970_DGroup_First { bits<1> PPC970_First = 1; }
36 class PPC970_DGroup_Single { bits<1> PPC970_Single = 1; }
37 class PPC970_DGroup_Cracked { bits<1> PPC970_Cracked = 1; }
38 class PPC970_MicroCode;
40 class PPC970_Unit_Pseudo { bits<3> PPC970_Unit = 0; }
41 class PPC970_Unit_FXU { bits<3> PPC970_Unit = 1; }
42 class PPC970_Unit_LSU { bits<3> PPC970_Unit = 2; }
43 class PPC970_Unit_FPU { bits<3> PPC970_Unit = 3; }
44 class PPC970_Unit_CRU { bits<3> PPC970_Unit = 4; }
45 class PPC970_Unit_VALU { bits<3> PPC970_Unit = 5; }
46 class PPC970_Unit_VPERM { bits<3> PPC970_Unit = 6; }
47 class PPC970_Unit_BRU { bits<3> PPC970_Unit = 7; }
51 class IForm<bits<6> opcode, bit aa, bit lk, dag OOL, dag IOL, string asmstr,
52 InstrItinClass itin, list<dag> pattern>
53 : I<opcode, OOL, IOL, asmstr, itin> {
54 let Pattern = pattern;
63 class BForm<bits<6> opcode, bit aa, bit lk, dag OOL, dag IOL, string asmstr>
64 : I<opcode, OOL, IOL, asmstr, BrB> {
65 bits<7> BIBO; // 2 bits of BI and 5 bits of BO.
70 let BI{0-1} = BIBO{5-6};
71 let BI{2-4} = CR{0-2};
73 let Inst{6-10} = BIBO{4-0};
82 class DForm_base<bits<6> opcode, dag OOL, dag IOL, string asmstr,
83 InstrItinClass itin, list<dag> pattern>
84 : I<opcode, OOL, IOL, asmstr, itin> {
89 let Pattern = pattern;
96 class DForm_1<bits<6> opcode, dag OOL, dag IOL, string asmstr,
97 InstrItinClass itin, list<dag> pattern>
98 : I<opcode, OOL, IOL, asmstr, itin> {
103 let Pattern = pattern;
110 class DForm_2<bits<6> opcode, dag OOL, dag IOL, string asmstr,
111 InstrItinClass itin, list<dag> pattern>
112 : DForm_base<opcode, OOL, IOL, asmstr, itin, pattern>;
114 class DForm_2_r0<bits<6> opcode, dag OOL, dag IOL, string asmstr,
115 InstrItinClass itin, list<dag> pattern>
116 : I<opcode, OOL, IOL, asmstr, itin> {
120 let Pattern = pattern;
127 class DForm_4<bits<6> opcode, dag OOL, dag IOL, string asmstr,
128 InstrItinClass itin, list<dag> pattern>
129 : I<opcode, OOL, IOL, asmstr, itin> {
134 let Pattern = pattern;
141 class DForm_4_zero<bits<6> opcode, dag OOL, dag IOL, string asmstr,
142 InstrItinClass itin, list<dag> pattern>
143 : DForm_1<opcode, OOL, IOL, asmstr, itin, pattern> {
149 class DForm_5<bits<6> opcode, dag OOL, dag IOL, string asmstr,
151 : I<opcode, OOL, IOL, asmstr, itin> {
160 let Inst{11-15} = RA;
164 class DForm_5_ext<bits<6> opcode, dag OOL, dag IOL, string asmstr,
166 : DForm_5<opcode, OOL, IOL, asmstr, itin> {
170 class DForm_6<bits<6> opcode, dag OOL, dag IOL, string asmstr,
172 : DForm_5<opcode, OOL, IOL, asmstr, itin>;
174 class DForm_6_ext<bits<6> opcode, dag OOL, dag IOL, string asmstr,
176 : DForm_6<opcode, OOL, IOL, asmstr, itin> {
182 class DSForm_1<bits<6> opcode, bits<2> xo, dag OOL, dag IOL, string asmstr,
183 InstrItinClass itin, list<dag> pattern>
184 : I<opcode, OOL, IOL, asmstr, itin> {
189 let Pattern = pattern;
191 let Inst{6-10} = RST;
192 let Inst{11-15} = RA;
193 let Inst{16-29} = DS;
194 let Inst{30-31} = xo;
198 class XForm_base_r3xo<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr,
199 InstrItinClass itin, list<dag> pattern>
200 : I<opcode, OOL, IOL, asmstr, itin> {
205 let Pattern = pattern;
207 bit RC = 0; // set by isDOT
209 let Inst{6-10} = RST;
212 let Inst{21-30} = xo;
216 // This is the same as XForm_base_r3xo, but the first two operands are swapped
217 // when code is emitted.
218 class XForm_base_r3xo_swapped
219 <bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr,
221 : I<opcode, OOL, IOL, asmstr, itin> {
226 bit RC = 0; // set by isDOT
228 let Inst{6-10} = RST;
231 let Inst{21-30} = xo;
236 class XForm_1<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr,
237 InstrItinClass itin, list<dag> pattern>
238 : XForm_base_r3xo<opcode, xo, OOL, IOL, asmstr, itin, pattern>;
240 class XForm_6<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr,
241 InstrItinClass itin, list<dag> pattern>
242 : XForm_base_r3xo_swapped<opcode, xo, OOL, IOL, asmstr, itin> {
243 let Pattern = pattern;
246 class XForm_8<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr,
247 InstrItinClass itin, list<dag> pattern>
248 : XForm_base_r3xo<opcode, xo, OOL, IOL, asmstr, itin, pattern>;
250 class XForm_10<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr,
251 InstrItinClass itin, list<dag> pattern>
252 : XForm_base_r3xo_swapped<opcode, xo, OOL, IOL, asmstr, itin> {
253 let Pattern = pattern;
256 class XForm_11<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr,
257 InstrItinClass itin, list<dag> pattern>
258 : XForm_base_r3xo_swapped<opcode, xo, OOL, IOL, asmstr, itin> {
260 let Pattern = pattern;
263 class XForm_16<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr,
265 : I<opcode, OOL, IOL, asmstr, itin> {
274 let Inst{11-15} = RA;
275 let Inst{16-20} = RB;
276 let Inst{21-30} = xo;
280 class XForm_16_ext<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr,
282 : XForm_16<opcode, xo, OOL, IOL, asmstr, itin> {
286 class XForm_17<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr,
288 : I<opcode, OOL, IOL, asmstr, itin> {
295 let Inst{11-15} = FRA;
296 let Inst{16-20} = FRB;
297 let Inst{21-30} = xo;
301 class XForm_24<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr,
302 InstrItinClass itin, list<dag> pattern>
303 : I<opcode, OOL, IOL, asmstr, itin> {
304 let Pattern = pattern;
308 let Inst{21-30} = xo;
312 class XForm_24_sync<bits<6> opcode, bits<10> xo, dag OOL, dag IOL,
313 string asmstr, InstrItinClass itin, list<dag> pattern>
314 : I<opcode, OOL, IOL, asmstr, itin> {
315 let Pattern = pattern;
319 let Inst{21-30} = xo;
323 class XForm_25<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr,
324 InstrItinClass itin, list<dag> pattern>
325 : XForm_base_r3xo<opcode, xo, OOL, IOL, asmstr, itin, pattern> {
328 class XForm_26<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr,
329 InstrItinClass itin, list<dag> pattern>
330 : XForm_base_r3xo<opcode, xo, OOL, IOL, asmstr, itin, pattern> {
334 class XForm_28<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr,
335 InstrItinClass itin, list<dag> pattern>
336 : XForm_base_r3xo<opcode, xo, OOL, IOL, asmstr, itin, pattern> {
339 // This is used for MFFS, MTFSB0, MTFSB1. 42 is arbitrary; this series of
340 // numbers presumably relates to some document, but I haven't found it.
341 class XForm_42<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr,
342 InstrItinClass itin, list<dag> pattern>
343 : XForm_base_r3xo<opcode, xo, OOL, IOL, asmstr, itin, pattern> {
344 let Pattern = pattern;
346 bit RC = 0; // set by isDOT
348 let Inst{6-10} = RST;
350 let Inst{21-30} = xo;
353 class XForm_43<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr,
354 InstrItinClass itin, list<dag> pattern>
355 : XForm_base_r3xo<opcode, xo, OOL, IOL, asmstr, itin, pattern> {
356 let Pattern = pattern;
359 bit RC = 0; // set by isDOT
363 let Inst{21-30} = xo;
367 // DCB_Form - Form X instruction, used for dcb* instructions.
368 class DCB_Form<bits<10> xo, bits<5> immfield, dag OOL, dag IOL, string asmstr,
369 InstrItinClass itin, list<dag> pattern>
370 : I<31, OOL, IOL, asmstr, itin> {
374 let Pattern = pattern;
376 let Inst{6-10} = immfield;
379 let Inst{21-30} = xo;
384 // DSS_Form - Form X instruction, used for altivec dss* instructions.
385 class DSS_Form<bits<10> xo, dag OOL, dag IOL, string asmstr,
386 InstrItinClass itin, list<dag> pattern>
387 : I<31, OOL, IOL, asmstr, itin> {
393 let Pattern = pattern;
397 let Inst{9-10} = STRM;
400 let Inst{21-30} = xo;
405 class XLForm_1<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr,
406 InstrItinClass itin, list<dag> pattern>
407 : I<opcode, OOL, IOL, asmstr, itin> {
412 let Pattern = pattern;
414 let Inst{6-10} = CRD;
415 let Inst{11-15} = CRA;
416 let Inst{16-20} = CRB;
417 let Inst{21-30} = xo;
421 class XLForm_1_ext<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr,
422 InstrItinClass itin, list<dag> pattern>
423 : I<opcode, OOL, IOL, asmstr, itin> {
426 let Pattern = pattern;
428 let Inst{6-10} = CRD;
429 let Inst{11-15} = CRD;
430 let Inst{16-20} = CRD;
431 let Inst{21-30} = xo;
435 class XLForm_2<bits<6> opcode, bits<10> xo, bit lk, dag OOL, dag IOL, string asmstr,
436 InstrItinClass itin, list<dag> pattern>
437 : I<opcode, OOL, IOL, asmstr, itin> {
442 let Pattern = pattern;
445 let Inst{11-15} = BI;
447 let Inst{19-20} = BH;
448 let Inst{21-30} = xo;
452 class XLForm_2_br<bits<6> opcode, bits<10> xo, bit lk,
453 dag OOL, dag IOL, string asmstr, InstrItinClass itin, list<dag> pattern>
454 : XLForm_2<opcode, xo, lk, OOL, IOL, asmstr, itin, pattern> {
455 bits<7> BIBO; // 2 bits of BI and 5 bits of BO.
459 let BI{0-1} = BIBO{0-1};
465 class XLForm_2_ext<bits<6> opcode, bits<10> xo, bits<5> bo, bits<5> bi, bit lk,
466 dag OOL, dag IOL, string asmstr, InstrItinClass itin, list<dag> pattern>
467 : XLForm_2<opcode, xo, lk, OOL, IOL, asmstr, itin, pattern> {
473 class XLForm_3<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr,
475 : I<opcode, OOL, IOL, asmstr, itin> {
481 let Inst{11-13} = BFA;
484 let Inst{21-30} = xo;
489 class XFXForm_1<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr,
491 : I<opcode, OOL, IOL, asmstr, itin> {
496 let Inst{11} = SPR{4};
497 let Inst{12} = SPR{3};
498 let Inst{13} = SPR{2};
499 let Inst{14} = SPR{1};
500 let Inst{15} = SPR{0};
501 let Inst{16} = SPR{9};
502 let Inst{17} = SPR{8};
503 let Inst{18} = SPR{7};
504 let Inst{19} = SPR{6};
505 let Inst{20} = SPR{5};
506 let Inst{21-30} = xo;
510 class XFXForm_1_ext<bits<6> opcode, bits<10> xo, bits<10> spr,
511 dag OOL, dag IOL, string asmstr, InstrItinClass itin>
512 : XFXForm_1<opcode, xo, OOL, IOL, asmstr, itin> {
516 class XFXForm_3<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr,
518 : I<opcode, OOL, IOL, asmstr, itin> {
523 let Inst{21-30} = xo;
527 class XFXForm_5<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr,
529 : I<opcode, OOL, IOL, asmstr, itin> {
535 let Inst{12-19} = FXM;
537 let Inst{21-30} = xo;
541 class XFXForm_5a<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr,
543 : I<opcode, OOL, IOL, asmstr, itin> {
549 let Inst{12-19} = FXM;
551 let Inst{21-30} = xo;
555 class XFXForm_7<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr,
557 : XFXForm_1<opcode, xo, OOL, IOL, asmstr, itin>;
559 class XFXForm_7_ext<bits<6> opcode, bits<10> xo, bits<10> spr,
560 dag OOL, dag IOL, string asmstr, InstrItinClass itin>
561 : XFXForm_7<opcode, xo, OOL, IOL, asmstr, itin> {
566 // This is probably 1.7.9, but I don't have the reference that uses this
567 // numbering scheme...
568 class XFLForm<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr,
569 string cstr, InstrItinClass itin, list<dag>pattern>
570 : I<opcode, OOL, IOL, asmstr, itin> {
574 bit RC = 0; // set by isDOT
575 let Pattern = pattern;
576 let Constraints = cstr;
581 let Inst{16-20} = RT;
582 let Inst{21-30} = xo;
586 // 1.7.10 XS-Form - SRADI.
587 class XSForm_1<bits<6> opcode, bits<9> xo, dag OOL, dag IOL, string asmstr,
588 InstrItinClass itin, list<dag> pattern>
589 : I<opcode, OOL, IOL, asmstr, itin> {
594 bit RC = 0; // set by isDOT
595 let Pattern = pattern;
599 let Inst{16-20} = SH{4,3,2,1,0};
600 let Inst{21-29} = xo;
601 let Inst{30} = SH{5};
606 class XOForm_1<bits<6> opcode, bits<9> xo, bit oe, dag OOL, dag IOL, string asmstr,
607 InstrItinClass itin, list<dag> pattern>
608 : I<opcode, OOL, IOL, asmstr, itin> {
613 let Pattern = pattern;
615 bit RC = 0; // set by isDOT
618 let Inst{11-15} = RA;
619 let Inst{16-20} = RB;
621 let Inst{22-30} = xo;
625 class XOForm_3<bits<6> opcode, bits<9> xo, bit oe,
626 dag OOL, dag IOL, string asmstr, InstrItinClass itin, list<dag> pattern>
627 : XOForm_1<opcode, xo, oe, OOL, IOL, asmstr, itin, pattern> {
632 class AForm_1<bits<6> opcode, bits<5> xo, dag OOL, dag IOL, string asmstr,
633 InstrItinClass itin, list<dag> pattern>
634 : I<opcode, OOL, IOL, asmstr, itin> {
640 let Pattern = pattern;
642 bit RC = 0; // set by isDOT
644 let Inst{6-10} = FRT;
645 let Inst{11-15} = FRA;
646 let Inst{16-20} = FRB;
647 let Inst{21-25} = FRC;
648 let Inst{26-30} = xo;
652 class AForm_2<bits<6> opcode, bits<5> xo, dag OOL, dag IOL, string asmstr,
653 InstrItinClass itin, list<dag> pattern>
654 : AForm_1<opcode, xo, OOL, IOL, asmstr, itin, pattern> {
658 class AForm_3<bits<6> opcode, bits<5> xo, dag OOL, dag IOL, string asmstr,
659 InstrItinClass itin, list<dag> pattern>
660 : AForm_1<opcode, xo, OOL, IOL, asmstr, itin, pattern> {
665 class MForm_1<bits<6> opcode, dag OOL, dag IOL, string asmstr,
666 InstrItinClass itin, list<dag> pattern>
667 : I<opcode, OOL, IOL, asmstr, itin> {
674 let Pattern = pattern;
676 bit RC = 0; // set by isDOT
679 let Inst{11-15} = RA;
680 let Inst{16-20} = RB;
681 let Inst{21-25} = MB;
682 let Inst{26-30} = ME;
686 class MForm_2<bits<6> opcode, dag OOL, dag IOL, string asmstr,
687 InstrItinClass itin, list<dag> pattern>
688 : MForm_1<opcode, OOL, IOL, asmstr, itin, pattern> {
692 class MDForm_1<bits<6> opcode, bits<3> xo, dag OOL, dag IOL, string asmstr,
693 InstrItinClass itin, list<dag> pattern>
694 : I<opcode, OOL, IOL, asmstr, itin> {
700 let Pattern = pattern;
702 bit RC = 0; // set by isDOT
705 let Inst{11-15} = RA;
706 let Inst{16-20} = SH{4,3,2,1,0};
707 let Inst{21-26} = MBE{4,3,2,1,0,5};
708 let Inst{27-29} = xo;
709 let Inst{30} = SH{5};
717 // VAForm_1 - DACB ordering.
718 class VAForm_1<bits<6> xo, dag OOL, dag IOL, string asmstr,
719 InstrItinClass itin, list<dag> pattern>
720 : I<4, OOL, IOL, asmstr, itin> {
726 let Pattern = pattern;
729 let Inst{11-15} = VA;
730 let Inst{16-20} = VB;
731 let Inst{21-25} = VC;
732 let Inst{26-31} = xo;
735 // VAForm_1a - DABC ordering.
736 class VAForm_1a<bits<6> xo, dag OOL, dag IOL, string asmstr,
737 InstrItinClass itin, list<dag> pattern>
738 : I<4, OOL, IOL, asmstr, itin> {
744 let Pattern = pattern;
747 let Inst{11-15} = VA;
748 let Inst{16-20} = VB;
749 let Inst{21-25} = VC;
750 let Inst{26-31} = xo;
753 class VAForm_2<bits<6> xo, dag OOL, dag IOL, string asmstr,
754 InstrItinClass itin, list<dag> pattern>
755 : I<4, OOL, IOL, asmstr, itin> {
761 let Pattern = pattern;
764 let Inst{11-15} = VA;
765 let Inst{16-20} = VB;
767 let Inst{22-25} = SH;
768 let Inst{26-31} = xo;
772 class VXForm_1<bits<11> xo, dag OOL, dag IOL, string asmstr,
773 InstrItinClass itin, list<dag> pattern>
774 : I<4, OOL, IOL, asmstr, itin> {
779 let Pattern = pattern;
782 let Inst{11-15} = VA;
783 let Inst{16-20} = VB;
784 let Inst{21-31} = xo;
787 class VXForm_setzero<bits<11> xo, dag OOL, dag IOL, string asmstr,
788 InstrItinClass itin, list<dag> pattern>
789 : VXForm_1<xo, OOL, IOL, asmstr, itin, pattern> {
795 class VXForm_2<bits<11> xo, dag OOL, dag IOL, string asmstr,
796 InstrItinClass itin, list<dag> pattern>
797 : I<4, OOL, IOL, asmstr, itin> {
801 let Pattern = pattern;
805 let Inst{16-20} = VB;
806 let Inst{21-31} = xo;
809 class VXForm_3<bits<11> xo, dag OOL, dag IOL, string asmstr,
810 InstrItinClass itin, list<dag> pattern>
811 : I<4, OOL, IOL, asmstr, itin> {
815 let Pattern = pattern;
818 let Inst{11-15} = IMM;
820 let Inst{21-31} = xo;
823 /// VXForm_4 - VX instructions with "VD,0,0" register fields, like mfvscr.
824 class VXForm_4<bits<11> xo, dag OOL, dag IOL, string asmstr,
825 InstrItinClass itin, list<dag> pattern>
826 : I<4, OOL, IOL, asmstr, itin> {
829 let Pattern = pattern;
834 let Inst{21-31} = xo;
837 /// VXForm_5 - VX instructions with "0,0,VB" register fields, like mtvscr.
838 class VXForm_5<bits<11> xo, dag OOL, dag IOL, string asmstr,
839 InstrItinClass itin, list<dag> pattern>
840 : I<4, OOL, IOL, asmstr, itin> {
843 let Pattern = pattern;
847 let Inst{16-20} = VB;
848 let Inst{21-31} = xo;
852 class VXRForm_1<bits<10> xo, dag OOL, dag IOL, string asmstr,
853 InstrItinClass itin, list<dag> pattern>
854 : I<4, OOL, IOL, asmstr, itin> {
860 let Pattern = pattern;
863 let Inst{11-15} = VA;
864 let Inst{16-20} = VB;
866 let Inst{22-31} = xo;
869 //===----------------------------------------------------------------------===//
870 class Pseudo<dag OOL, dag IOL, string asmstr, list<dag> pattern>
871 : I<0, OOL, IOL, asmstr, NoItinerary> {
873 let Pattern = pattern;